Formal reasoning with Verilog HDL

Most hardware verification techniques tend to fall under one of two broad, yet separate caps: simulation or formal verification. This paper briefly presents a framework in which formal verification plays a crucial role within the standard approach currently used by the hardware industry. As a basis for this, the formal semantics of Verilog HDL are dened, and properties about synchronization and mutual exclusion algorithms are proved.peer-reviewe

A field programmable gate array based modular motion control platform

The expectations from motion control systems have been rising day by day. As the systems become more complex, conventional motion control systems can not achieve to meet all the specifications with optimized results. This creates the necessity of fundamental changes in the infrastructure of the system. Field programmable gate array (FPGA) technology enables the reconfiguration of the digital hardware, thus dissolving the necessity of infrastructural changes for minor manipulations in the hardware even if the system is deployed. An FPGA based hardware system shrinks the size of the hardware hence the cost. FPGAs also provide better power ratings for the systems as well as a more reliable system with improved performance. As a trade off, the development is rather more difficult than software based systems, which also affects the research and development time of the overall system. In this paper a level of abstraction is introduced in order to diminish the requirement of advanced hardware description language (HDL) knowledge for implementing motion control systems thoroughly on an FPGA. The intellectual property library consists of synthesizable hardware modules specifically implemented for motion control purposes. Other parts of a motion control system, like user interface and trajectory generation, are implemented as software functions in order to protect the modularity of the system. There are also several external hardware designs for interfacing and driving various types of actuators

Impact of Transceiver Impairments on the Capacity of Dual-Hop Relay Massive MIMO Systems

Despite the deleterious effect of hardware impairments on communication systems, most prior works have not investigated their impact on widely used relay systems. Most importantly, the application of inexpensive transceivers, being prone to hardware impairments, is the most cost-efficient way for the implementation of massive multiple-input multiple-output (MIMO) systems. Consequently, the direction of this paper is towards the investigation of the impact of hardware impairments on MIMO relay networks with large number of antennas. Specifically, we obtain the general expression for the ergodic capacity of dual-hop (DH) amplify-and-forward (AF) relay systems. Next, given the advantages of the free probability (FP) theory with comparison to other known techniques in the area of large random matrix theory, we pursue a large limit analysis in terms of number of antennas and users by shedding light to the behavior of relay systems inflicted by hardware impairments.Comment: 6 pages, 4 figures, accepted in IEEE Global Communications Conference (GLOBECOM 2015) - Workshop on Massive MIMO: From theory to practice, 201

Digital signal processing: the impact of convergence on education, society and design flow

Design and development of real-time, memory and processor hungry digital signal processing systems has for decades been accomplished on general-purpose microprocessors. Increasing needs for high-performance DSP systems made these microprocessors unattractive for such implementations. Various attempts to improve the performance of these systems resulted in the use of dedicated digital signal processing devices like DSP processors and the former heavyweight champion of electronics design – Application Specific Integrated Circuits. The advent of RAM-based Field Programmable Gate Arrays has changed the DSP design flow. Software algorithmic designers can now take their DSP algorithms right from inception to hardware implementation, thanks to the increasing availability of software/hardware design flow or hardware/software co-design. This has led to a demand in the industry for graduates with good skills in both Electrical Engineering and Computer Science. This paper evaluates the impact of technology on DSP-based designs, hardware design languages, and how graduate/undergraduate courses have changed to suit this transition

Experimental evaluation of UWB indoor positioning for indoor track cycling

Accurate radio frequency (RF)-based indoor localization systems are more and more applied during sports. The most accurate RF-based localization systems use ultra-wideband (UWB) technology; this is why this technology is the most prevalent. UWB positioning systems allow for an in-depth analysis of the performance of athletes during training and competition. There is no research available that investigates the feasibility of UWB technology for indoor track cycling. In this paper, we investigate the optimal position to mount the UWB hardware for that specific use case. Different positions on the bicycle and cyclist were evaluated based on accuracy, received power level, line-of-sight, maximum communication range, and comfort. Next to this, the energy consumption of our UWB system was evaluated. We found that the optimal hardware position was the lower back, with a median ranging error of 22 cm (infrastructure hardware placed at 2.3 m). The energy consumption of our UWB system is also taken into account. Applied to our setup with the hardware mounted at the lower back, the maximum communication range varies between 32.6 m and 43.8 m. This shows that UWB localization systems are suitable for indoor positioning of track cyclists

Achievable Rate of Rician Large-Scale MIMO Channels with Transceiver Hardware Impairments

Transceiver hardware impairments (e.g., phase noise, in-phase/quadrature-phase (I/Q) imbalance, amplifier non-linearities, and quantization errors) have obvious degradation effects on the performance of wireless communications. While prior works have improved our knowledge on the influence of hardware impairments of single-user multiple-input multiple-output (MIMO) systems over Rayleigh fading channels, an analysis encompassing the Rician fading channel is not yet available. In this paper, we pursue a detailed analysis of regular and large-scale (LS) MIMO systems over Rician fading channels by deriving new, closed-form expressions for the achievable rate to provide several important insights for practical system design. More specifically, for regular MIMO systems with hardware impairments, there is always a finite achievable rate ceiling, which is irrespective of the transmit power and fading conditions. For LS-MIMO systems, it is interesting to find that the achievable rate loss depends on the Rician $K$-factor, which reveals that the favorable propagation in LS-MIMO systems can remove the influence of hardware impairments. However, we show that the non-ideal LS-MIMO system can still achieve high spectral efficiency due to its huge degrees of freedom.Comment: 7 pages, 1 table, 3 figures, accepted to appear in IEEE Transactions on Vehicular Technolog