Recent Advancements on Symmetric Cryptography Techniques -A Comprehensive Case Study

Now a day2019;s Cryptography is one of the broad areas for researchers; because of the conventional block cipher has lost its potency due to the sophistication of modern systems that can break it by brute force. Due to its importance, several cryptography techniques and algorithms are adopted by many authors to secure the data, but still there is a scope to improve the previous approaches. For this necessity, we provide the comprehensive survey which will help the researchers to provide better techniques

Analysis of the Duration and Energy Consumption of AES Algorithms on a Contiki-based IoT Device

With the growing prevalence of the Internet of Things, securing the sheer abundance of devices is critical. The current IoT and security landscapes lack empirical metrics on encryption algorithm implementations that are optimized for constrained devices, such as encryption/decryption duration and energy consumption. In this paper, we achieve two things. First, we survey for optimized implementations of symmetric encryption algorithms. Seconds, we study the performance of various symmetric encryption algorithms on a Contiki-based IoT device. This paper provides encryption and decryption durations and energy consumption results on three implementations of AES: TinyAES, B-Con’s AES, and Contiki’s own built-in AES. In our experiments, we found the algorithms specifically built for constrained devices used about 0.16 the energy and time to perform encryption and decryption when compared to algorithm implementation that weren’t optimized for constrained devices

Locating Encrypted Data Hidden Among Non-Encrypted Data using Statistical Tools

This research tests the security of software protection techniques that use encryption to protect code segments containing critical algorithm implementation to prevent reverse engineering. Using the National Institute of Standards and Technology (NIST) Tests for Randomness encrypted regions hidden among non-encrypted bits of a binary executable file are located. The location of ciphertext from four encryption algorithms (AES, DES, RSA, and TEA) and three block sizes (10, 100, and 500 32-bit words) were tested during the development of the techniques described in this research. The test files were generated from the Win32 binary executable file of Adobe\u27s Acrobat Reader version 7.0.9. The culmination of this effort developed a technique capable of locating 100% of the encryption regions with no false negative error and minimal false positive error with a 95% confidence. The encrypted region must be encrypted with a strong encryption algorithm whose ciphertext appears statistically random to the NIST Tests for Randomness, and the size of the encrypted region must be at least 100 32-bit words (3,200 bits)

IXIAM: ISA EXtension for Integrated Accelerator Management

During the last few years, hardware accelerators have been gaining popularity thanks to their ability to achieve higher performance and efficiency than classic general-purpose solutions. They are fundamentally shaping the current generations of Systems-on-Chip (SoCs), which are becoming increasingly heterogeneous. However, despite their widespread use, a standard, general solution to manage them while providing speed and consistency has not yet been found. Common methodologies rely on OS mediation and a mix of user-space and kernel-space drivers, which can be inefficient, especially for fine-grained tasks. This paper addresses these sources of inefficiencies by proposing an ISA eXtension for Integrated Accelerator Management (IXIAM), a cost-effective HW-SW framework to control a wide variety of accelerators in a standard way, and directly from the cores. The proposed instructions include reservation, work offloading, data transfer, and synchronization. They can be wrapped in a high-level software API or even integrated into a compiler. IXIAM features also a user-space interrupt mechanism to signal events directly to the user process. We implement it as a RISC-V extension in the gem5 simulator and demonstrate detailed support for complex accelerators, as well as the ability to specify sequences of memory transfers and computations directly from the ISA and with significantly lower overhead than driver-based schemes. IXIAM provides a performance advantage that is more evident for small and medium workloads, reaching around 90x in the best case. This way, we enlarge the set of workloads that would benefit from hardware acceleration

McBits Revisited

This paper presents a constant-time fast implementation for a high-security code-based encryption system. The implementation is based on the “McBits” paper by Bernstein, Chou, and Schwabe in 2013: we use the same FFT algorithms for root finding and syndrome computation, similar algorithms for secret permutation, and bitslicing for low-level operations. As opposed to McBits, where a high decryption throughput is achieved by running many decryption operations in parallel, we take a different approach to exploit the internal parallelism in one decryption operation for the use of more applications. As the result, we manage to achieve a slightly better decryption throughput at a much higher security level than McBits. As a minor contribution, we also present a constant-time implementation for encryption and key-pair generation, with similar techniques used for decryption

On the Development of Novel Encryption Methods for Conventional and Biometric Images

Information security refers to the technique of protecting information from unauthorized access, use, disclosure, disruption and modification. Governments, military, corporations, financial institutions, hospitals, and private businesses amass a great deal of confidential information about their employees, customers, products, research, and financial status. Most of this information is now collected, processed and stored on electronic media and transmitted across networks to other computers. Encryption clearly addresses the need for confidentiality of information, in process of storage and transmission. Popular application of multimedia technology and increasingly transmission ability of network gradually leads us to acquire information directly and clearly through images and hence the security of image data has become inevitable. Moreover in the recent years, biometrics is gaining popularity for security purposes in many applications. However, during communication and transmission over insecure network channels it has some risks of being hacked, modified and reused. Hence, there is a strong need to protect biometric images during communication and transmission. In this thesis, attempts have been made to encrypt image efficiently and to enhance the security of biometrics images during transmission. In the first contribution, three different key matrix generation methods invertible, involuntary, and permutation key matrix generation have been proposed. Invertible and involuntary key matrix generation methods solves the key matrix inversion problem in Hill cipher. Permutation key matrix generation method increases the Hill system’s security. The conventional Hill cipher technique fails to encrypt images properly if the image consists of large area covered with same colour or gray level. Thus, it does not hide all features of the image which reveals patterns in the plaintext. Moreover, it can be easily broken with a known plaintext attack revealing weak security. To address these issues two different techniques are proposed, those are advanced Hill cipher algorithm and H-S-X cryptosystem to encrypt the images properly. Security analysis of both the techniques reveals superiority of encryption and decryption of images. On the other hand, H-S-X cryptosystem has been used to instil more diffusion and confusion on the cryptanalysis. FPGA implementation of both the proposed techniques has been modeled to show the effectiveness of both the techniques. An extended Hill cipher algorithm based on XOR and zigzag operation is designed to reduce both encryption and decryption time. This technique not only reduces the encryption and decryption time but also ensures no loss of data during encryption and decryption process as compared to other techniques and possesses more resistance to intruder attack. The hybrid cryptosystem which is the combination of extended Hill cipher technique and RSA algorithm has been implemented to solve the key distribution problem and to enhance the security with reduced encryption and decryption time. Two distinct approaches for image encryption are proposed using chaos based DNA coding along with shifting and scrambling or poker shuffle to create grand disorder between the pixels of the images. In the first approach, results obtained from chaos based DNA coding scheme is shifted and scrambled to provide encryption. On the other hand in the second approach the results obtained from chaos based DNA coding encryption is followed by poker shuffle operation to generate the final result. Simulated results suggest performance superiority for encryption and decryption of image and the results obtained have been compared and discussed. Later on FPGA implementation of proposed cryptosystem has been performed. In another contribution, a modified Hill cipher is proposed which is the combination of three techniques. This proposed modified Hill cipher takes advantage of all the three techniques. To acquire the demands of authenticity, integrity, and non-repudiation along with confidentiality, a novel hybrid method has been implemented. This method has employed proposed modified Hill cipher to provide confidentiality. Produced message digest encrypted by private key of RSA algorithm to achieve other features such as authenticity, integrity, and non-repudiation To enhance the security of images, a biometric cryptosystem approach that combines cryptography and biometrics has been proposed. Under this approach, the image is encrypted with the help of fingerprint and password. A key generated with the combination of fingerprint and password and is used for image encryption. This mechanism is seen to enhance the security of biometrics images during transmission. Each proposed algorithm is studied separately, and simulation experiments are conducted to evaluate their performance. The security analyses are performed and performance compared with other competent schemes

A benchmark for assessing nanosatellite on-board computer power-efficiency and performance

Dissertação (mestrado)—Universidade de Brasília, Faculdade de Tecnologia, Departamento de Engenharia Elétrica, 2019.O presente manuscrito tem como escopo a especificação, implementação e execução de um benchmark para avaliar o desempenho de diferentes microcontroladores de computadores de bordo de nanossatélites. O foco deste trabalho está nas aplicações dos sistemas de determinação e controle de atitude (ADCS, do inglês Attitude Determination and Control System), e portanto, uma revisão de algoritmos de determinação e controle de atitude utilizados em missões espaciais é apresentada, visando a identificação de recursos a serem explorados. A proposta do benchmark especifica uma carga de trabalho, que corresponde a um conjunto de instruções representativas da aplicação em questão, uma métrica para avaliar o desempenho de diferentes arquiteturas e regras operacionais para garantir resultados justos e confiáveis. A implementação foi realizada em linguagem de alto nível, C, e sua validação foi realizada através de sua execução em quatro diferentes arquiteturas, onde medidas de tempo e consumo de potência são utilizados para avaliar o consumo de energia. As plataformas de desenvolvimento avaliadas foram o MSP430FR5994 Launchpad Kit da Texas Instruments, a placa Nucleo-L432KC da STMicroeletronics, o Arduino Uno e o Raspberry Pi 3B. Os resultados obtidos mostram que o Arduino Uno apresenta o maior consumo de energia (1.41mJ) enquanto o Nucleo L432KC possui o menor (0.05mJ). Esses resultados também foram analisados visando a utilização dessas plataformas nos projetos desenvolvidos atualmente no Laboratório de Simulação e Controle de Sistemas Aeroespaciais da Universidade de Brasília, onde o Raspberry Pi foi escolhido para as aplicações do simulador de atitude de nanossatélites e o Nucleo L432KC para as atividades do LAICAnSat.This manuscript is aimed at specifying, implementing and executing a benchmark to evaluate the performance of different microcontrollers of nanosatellite onboard computers. The focus of this work is on Attitude Determination and Control System (ADCS) applications and therefore, a review of common attitude determination and control algorithms is presented in order to identify the main features to be explored. The benchmark proposal specifies a workload, which corresponds to a set of instructions that represent the application in question, a metric for evaluating the performance of different architectures and operational rules to ensure fair and reliable results. The implementation was carried out in a higher-level language, C, and it was validated by running it on four different architectures, where execution time and power measurements were used to evaluate energy consumption. The development platforms evaluated were the Texas Instruments MSP430FR5994 Launchpad Kit, STMicroeletronics Nucleo-L432KC board, Arduino Uno and Raspberry Pi 3B. The results obtained show that Arduino Uno has the highest energy consumption (1.41mJ) while Nucleo L432KC has the lowest (0.05mJ). These results were also analyzed with the purpose of using these platforms in the projects currently developed at the Laboratory of Simulation and Control of Aerospace Systems at the University of Brasilia where the Raspberry Pi was chosen for the applications of the nanosatellite simulator facility and the Nucleo L432KC for LAICAnSat activities