La modélisation de l’immunité des circuits intégrés au-delà de 1 GHz

Electromagnetic Compatibility (EMC) is the faculty of working devices to co-exist electromagnetically. In practice, it turns out to be very complex to create electromagnetically compatible devices. The weapon to succeed the complex challenge of creating First-Time-Right (FTR) compatible devices is modelling. This thesis investigates whether it makes sense to model the conducted immunity of Integrated Circuits (ICs) beyond 1 GHz and how to do that. If the Printed Circuit Board (PCB) traces determine a PCB's radiated immunity, it is interesting to predict their coupling efficiency and to understand how that depends on the trace routing. Because full-wave solvers are slow and do not yield understanding, the existing Taylor cell model is modified to yield another 100 times speedup and an insightful upper bound, for vertically polarised, grazing-incident plane wave illumination of electrically long, multi-segment traces with arbitrary terminal loads. The results up to 20 GHz match with full-wave simulations to within 2.6 dB average absolute error and with Gigahertz Transverse Electromagnetic-cell (GTEM-cell) measurements to within 4.0 dB average absolute error. If the conducted immunity of ICs is interesting above 1 GHz, a measurement method is needed that is valid beyond 1 GHz. There is no standardised method yet, because with rising frequency, the common measurement set-up increasingly obscures the IC's immunity. An attempt to model and remove the set-up's impact on the measurement result proved difficult. Therefore, a simplified set-up and extraction method is proposed and a proof-of-concept of the automatic generation of the set-up's PCB is given. The conducted immunity of an LM7805 voltage regulator is measured up to 4.2 GHz to demonstrate the method. Except for a general trend of rising frequencies, there is only little concrete proof for the relevance of IC immunity modelling beyond 1 GHz. A full-wave simulation suggests that up to 10 GHz, most energy enters the die via the trace. Similarly, the radiated immunity of a microstrip trace and an LM7805 voltage regulator is predicted by concatenating the models developed above. Although this model neglects the radiated immunity of the IC itself, the prediction corresponds with GTEM-cell measurement to within 2.1 dB average absolute error. These experiments suggest the most radiation enters a PCB via its traces, well beyond 1 GHz, hence it is useful to model the conducted immunity of IC beyond 1 GHz. Therefore, the extension of IEC 62132-4 to 10 GHz should be seriously considered. Moreover, the speed and transparency of the modified Taylor model for field-to-trace coupling open up new possibilities for computer-aided design. The semi-automatic generation of lean extraction PCB could facilitate model extraction. There are also critical remaining questions, remaining to be answered.La compatibilité électromagnétique (CEM) est l'aptitude des produits électroniques à coexister au niveau électromagnétique. Dans la pratique, c'est une tâche très complexe que de concevoir des produits compatibles. L'arme permettant de concevoir des produits bon-du-premier-coup est la modélisation. Cette thèse étudie l'utilité et la faisabilité de la modélisation de l'immunité des circuits intégrés (CI) au-delà de 1 GHz. Si les pistes des circuits imprimés déterminent l'immunité rayonnée de ces circuits, il serait pertinent de pouvoir prévoir l'efficacité de couplage et de comprendre comment elle découle du routage des pistes. Les solveurs full-wave sont lents et ne contribuent pas à la compréhension. En conséquence, un modèle existant (la cellule de Taylor) est modifié de manière à ce que son temps de calcul soit divisé par 100. De plus, ce modèle modifié est capable de fournir une explication de la limite supérieure pour le couplage d'une onde plane, rasante et polarisée verticalement vers une piste de plusieurs segments, électriquement longue et avec des terminaisons arbitraires. Les résultats jusqu'à 20 GHz corrèlent avec des simulations fullwave à une erreur absolue moyenne de 2,6 dB près et avec des mesures en cellule GTEM (Gigahertz Transversale Electromagnétique) à une erreur absolue moyenne de 4,0 dB près. Si l'immunité conduite des CI est intéressante au-delà de 1 GHz, il faut une méthode de mesure, valable au-delà de 1 GHz. Actuellement, il n'y a pas de méthode normalisée, car la fréquence élevée fausse les observations faites avec la manipulation normalisée. Il est difficile de modéliser et de compenser le comportement de la manipulation normalisée. Par conséquent, une manipulation simplifiée et sa méthode d'extraction correspondante sont proposées, ainsi qu'une démonstration du principe de génération automatique de la carte d'essai utilisée dans la manipulation simplifiée. Pour illustrer la méthode simplifiée, l'immunité conduite d'un régulateur de tension LM7805 est mesurée jusqu'à 4,2 GHz. À part la tendance générale des fréquences qui montent, il y a peu de preuve concrète qui étaye la pertinence de la modélisation de l'immunité conduite des CI au-delà de 1 GHz. Une simulation full-wave suggère que jusqu'à 10 GHz, la plus grande partie de l'énergie rentre dans la puce à travers la piste. Par concaténation des modèles développés ci-dessus, l'immunité rayonnée d'une piste micro-ruban et d'un régulateur de tension LM7805 est prédite. Bien que ce modèle néglige l'immunité rayonnée du CI lui-même, la prédiction corrèle avec des mesures en cellule GTEM à une erreur absolue de 2,1 dB en moyenne. Ces expériences suggèrent que la plus grande partie du rayonnement entre dans un circuit imprimé à travers ses pistes, bien au-delà de 1 GHz. Dans ce cas, la modélisation de l'immunité conduite au-delà de 1 GHz serait utile. Par conséquent, l'extension jusqu'à 10 GHz de la méthode de mesure CEI 62132-4 devrait être considérée. De plus, la vitesse et la transparence du modèle de Taylor modifié pour le couplage champ-à-ligne permettent des innovations dans la conception assistée par l'ordinateur. La génération semiautomatique des cartes d'essais dites maigres pourrait faciliter l'extraction des modèles. Certaines questions critiques et importantes demeurent ouvertes

Marine Thruster I/O Board Redesign, Prototyping, and Certification

For about 20 years, the company Marine Technologies have used a circuit board called the IOB, which controls input and output signals. The Input Output Board (IOB) uses a logic device to manage the different signals. For the last 20 years this has been an FPGA (Field Programmable Gate Arrays). The manufacture, design, and supply of IOB belonged to another company, but the time came for Marine Technologies to claim the ownership of the IOB and make a design of their own. This was a good opportunity to make design changes and the possibility of using microcontrollers instead of FPGAs became an interesting pursuit. Microcontrollers naturally are cheaper and easier to acquire and have become considerably advanced, making them a possible replacement candidate. This thesis explores the process of implementing a microcontroller with the new IOB design and having the product certified. The new IOB must fulfill Marine Technologies’ set of demands which require it to be functionally identical to the original; it also needs to fulfill the international sets of standards that amongst other things set the demands for environmental robustness and Electromagnetic Compatibility (EMC) performance. To meet this set of demands, I completed an analysis of the current I/O usage of Marine Technologies’ systems and reduced the amount of I/O available to match this actual usage. This proved that a microcontroller have enough resources to handle the actual required I/O load of Marine Technologies’ systems. In terms of EMC, the best one can do is to design a circuit board that follows design guidelines for EMC as closely as possible and test it when the prototype arrives. The number one rule for EMC minded design, is to allow return currents to flow directly under the outgoing signal trace, which is best achieved by having dedicated, proper, and unbroken power and ground planes, placed in the layers between the top and bottom layer of the PCB. The design of the new IOB, called MT-IOB-Mk3-Transit, was done by closely examining the design of the previous two FPGA based iterations of the IOB, called the MT-IOB-Mk1 and MT-IOB-Mk2. The IOB-Mk3-Transit uses elements from both boards, by looking at 20 years of field testing and usage, what works best and what does not, while at the same time considering how the new microcontroller fits within these elements. In most aspects the IOB-Mk3-Transit is a mosaic containing elements from both the IOB-Mk1 and the Mk2, which are known to function reliably for 20 years. During functional testing of the IOB-Mk3-Transit, the crucial functions were working well. The board was tested in a certification lab in Italy, and due to the board being designed with sub optimal EMC practice, we used two attempts in Italy before finally passing the EMC tests, requiring some research at home before travelling for the second attempt. The product was then certified, installed on a vessel and is now in use. Taking the lessons learned from the IOB-Mk3-Transit, the new iteration purely called the MT-IOB-Mk3 has been designed, following the stated EMC guidelines closely to improve performance, and correcting a few minor issues of the IOB-Mk3-Transit. This board has yet to be tested. In the end, the question of using a microcontroller instead of an FPGA to perform the duties of the IOB, is only partially answered. Yes, the microcontroller can perform all the required functions that the FPGA did, and it will be implemented as a part of the Marine Technologies environment for now, but long-term reliability is a question that can only be answered by long-term use and testing.Masteroppgave i fysikkPHYS399MAMN-PHY

Design of a current probe for measuring ball-grid-array packaged devices

A current probe to measure BGA ball currents via magnetic induction has been designed. The probe is manufactured on a 4 layer flex circuit and has been validated by full wave simulations and measurements. The feature size of the probe is very tiny that it almost pushes the limit of flex-circuit technology. Several critical manufacturing problems were happened, and they have been solved now. The probe allows measuring currents of a 1 mm pitch BGA ball directly. Its operating frequency stretched from tens of MHz up to 3GHz. The BGA probe\u27s mutual inductance is approximately 11 pH, and with amplifiers the signal is large enough to be visible in real time on an oscilloscope. Moreover, a frequency-domain-calibration program has been developed to correct the measured data. And a FPGA DUT board is designed and manufactured, to demonstrate the application of the BGA probe. ADS model is also developed to show the principle of how the probe works --Abstract, page iii

Miniaturized guided wave structures and applications

This thesis examines the properties of novel transmission lines and waveguides as well as their practical applications. The research begins with a discussion of metamaterial transmission lines. Two new composite right/left-handed designs formed in shielded striplines are presented and shown to have great left-handed bands. In the waveguides research, we demonstrate the multilayer, narrowband and half-mode folded waveguide with the benefit of guide miniaturization. Due to the almost half metallic surface reduction of half-mode waveguide, a novel planar half-mode substrate integrated waveguide is presented and its properties are analyzed. It has the great integration with planar components and stops the radiation of conventional open waveguides. One application based on this medium is a novel switchable substrate waveguide that can be switched between two types of mode via the biasing of pin diodes. Another application is a tunable phase shifter that has a maximum phase shift of 50 degrees with acceptable insertion loss. A theoretical method for the analysis of planar half-mode waveguides using transverse resonance technique is introduced in this thesis. This method is used to locate the cut-off frequency of the waveguide and analyse the equivalent circuit loaded with discrete components. This novel technique has the advantage of simplicity and compares well with results of electromagnetic simulation and measurement

Antenna integration for wireless and sensing applications

As integrated circuits become smaller in size, antenna design has become the size limiting factor for RF front ends. The size reduction of an antenna is limited due to tradeoffs between its size and its performance. Thus, combining antenna designs with other system components can reutilize parts of the system and significantly reduce its overall size. The biggest challenge is in minimizing the interference between the antenna and other components so that the radiation performance is not compromised. This is especially true for antenna arrays where the radiation pattern is important. Antenna size reduction is also desired for wireless sensors where the devices need to be unnoticeable to the subjects being monitored. In addition to reducing the interference between components, the environmental effect on the antenna needs to be considered based on sensors' deployment. This dissertation focuses on solving the two challenges: 1) designing compact multi-frequency arrays that maintain directive radiation across their operating bands and 2) developing integrated antennas for sensors that are protected against hazardous environmental conditions. The first part of the dissertation addresses various multi-frequency directive antennas arrays that can be used for base stations, aerospace/satellite applications. A cognitive radio base station antenna that maintains a consistent radiation pattern across the operating frequencies is introduced. This is followed by multi-frequency phased array designs that emphasize light-weight and compactness for aerospace applications. The size and weight of the antenna element is reduced by using paper-based electronics and internal cavity structures. The second part of the dissertation addresses antenna designs for sensor systems such as wireless sensor networks and RFID-based sensors. Solar cell integrated antennas for wireless sensor nodes are introduced to overcome the mechanical weakness posed by conventional monopole designs. This can significantly improve the sturdiness of the sensor from environmental hazards. The dissertation also introduces RFID-based strain sensors as a low-cost solution to massive sensor deployments. With an antenna acting as both the sensing device as well as the communication medium, the cost of an RFID sensor is dramatically reduced. Sensors' strain sensitivities are measured and theoretically derived. Their environmental sensitivities are also investigated to calibrate them for real world applications.Ph.D.Committee Chair: Tentzeris, Emmanouil; Committee Member: Akyildiz, Ian; Committee Member: Allen, Mark; Committee Member: Naishadham, Krishna; Committee Member: Peterson, Andrew; Committee Member: Wang, Yan

A FEASIBILITY STUDY OF HIGH-VOLTAGE COMPARATORS USING SILICON METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTORS

The overall trend of transistor scaling has resulted in distinct, application-specific manufacturing processes. Two of these specialized devices scaled complementary metal-oxide-semiconductor field-effect transistors (CMOS) and power transistors, typically have inversely related performance in speed, power handling, and size. This work develops a novel comparator circuit to explore the potential benefits of integrating these two technology schemes to achieve improved power handling capabilities for signal processing and communication systems through the development of a Silicon-based high-voltage comparator. The study produced a final circuit with a flat-band gain of 20dB across the high frequency (HF) range with a projected input voltage tolerance above 10V. The development process indicates that the physical characteristics of the power transistor, a laterally-diffused MOSFET (LDMOS), constrains frequency response and therefore, ultimately, comparator performance. Although the demonstrated device does not achieve the target performance, the investigation suggests that integrating the power transistors at the integrated circuit (IC) level is a promising approach to producing a competitive high-voltage Silicon-based comparator.M.S

Low cost analog signal processing for massive radio telescope arrays

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.Includes bibliographical references (p. 38).Measurement and analysis of redshifted 21cm hydrogen emissions is a developing technique for studying the early universe. The primary time of interest corresponds to a signal in the the 100-200MHz frequency band. The Omniscope is a new type of radio telescope array being developed at MIT which images the entire sky in this band at low resolution using spatial Fourier transforms. In order to gain the maximum benefit from this type of telescope, a regular array of more than 10,000 antennas will eventually be necessary. I detail a low cost analog signal path which was developed to test and refine the signal processing and imaging pathways of the Omniscope. This signal path begins at the output of a preexisting antenna design and ends with digitization.by Eben A. Kunz.M.Eng

A Compact Ultra Wide-Band Radar System for See-Through-Wall Applications

A compact Ultra wide-band (UWB) radar system for through-wall applications has been developed. Lightweight, portable and low in power consumption, it is configurable for both bistatic and monostatic operation. It uses low cost, off-the-shelf surface mount components, and is ideally suited for ranging, 3d-imaging, and wall characterization. Tests show excellent pulse width generation, resulting in very broadband transmission (0.7 – 5.6 GHz) and good receiver dynamic range, resulting in accurate measurement capabilities

Wireless multi-carrier communication system design and implementation using a custom hardware and software FPGA platform

Field Programmable Gate Array (FPGA) devices and high-level hardware development languages represent a new and exciting addition to traditional research tools, where simulation models can be evaluated by the direct implementation of complex algorithms and processes. Signal processing functions that are based on well known and standardised mathematical operations, such as Fast Fourier Transforms (FFTs), are well suited for FPGA implementation. At UCL, research is on-going on the design, modelling and simulation of Frequency Division Multiplexing (FDM) techniques such as Spectrally E - cient Frequency Division Multiplexing (SEFDM) which, for a given data rate, require less bandwidth relative to equivalent Orthogonal Frequency Division Multiplexing (OFDM). SEFDM is based around standard mathematical functions and is an ideal candidate for FPGA implementation. The aim of the research and engineering work reported in this thesis is to design and implement a system that generates SEFDM signals for the purposes of testing and veri cation, in real communication environments. The aim is to use FPGA hardware and Digital to Analogue Converters (DACs) to generate such signals and allow recon gurability using standard interfaces and user friendly software. The thesis details the conceptualisation, design and build of an FPGA-based wireless signal generation platform. The characterisation applied to the system, using the FPGA to drive stimulus signals is reported and the thesis will include details of the FPGA encapsulation of the minimum protocol elements required for communication (of control signals) over Ethernet. Detailed testing of the hardware is reported, together with a newly designed in the loop testing methodology. Veri ed test results are also reported with full details of time and frequency results as well as full FPGA design assessment. Altogether, the thesis describes the engineering design, construction and testing of a new FPGA hardware and software system for use in communication test scenarios, controlled over Ethernet

Modeling and analysis of high-speed sources and serial links for signal integrity

As the computer and electronics industry moves towards higher data rates, signal integrity and electromagnetic interference (EMI) problems always present challenges for designers for high-speed data communication systems. To characterize the entire link path between transmitters and receivers, accurate models for sources, passive link path (such as traces, vias, connectors, etc), and terminations should be built before simulations either in frequency or time domain. Due to the imperfection of model, data corrections are preferred before time-domain simulations to ensure stability. Moreover, data obtained from models should be compared with measurement results to judge the level of agreement for validations. This thesis presents a new approach to model via structures to help design signal link path while maintaining a low insertion loss and minimizing crosstalk, borrowing the concepts from the transmission line theories. For the models of sources, a dipole model is proposed to represent integrated circuit (IC) radiation emissions while a circuit model for I/O current source is proposed for IC conductive emissions. Passivity and causality are two important properties for passive networks. This thesis also presents detailed algorithm to check passivity and causality for networks with arbitrary port numbers. Data corrections in term of passivity and causality enforcement are applied based on matrix perturbation theory. Last but not least, Feature Selective Validation (FSV) technique is expanded in this thesis to quantify the comparisons of data sets and provide quantitative standard for data optimization --Abstract, page iii