Solution-Processed Metal Oxide Gate Dielectrics and Their Implementations in Zinc Oxide Based Thin Film Transistors

Thin-film transistors (TFTs) based on oxide semiconductors are a promising technology for a host of large-volume electronic applications. Whilst progress on solution-processed oxide semiconductors has been rapidly advancing, research efforts towards the development of new dielectrics has been relatively slow, with most of the reported work performed using conventional dielectrics based in SiO2. As a result, the majority of oxide transistors reported to date operate at relatively high voltages and hence consume significantly more power. In order to circumvent this bottleneck, recent work has been focussing on the development of low-voltage oxide transistors, including the use of high-k dielectrics, and several candidates have already been investigated and were mostly deposited by costly vacuum-based techniques. This thesis investigates the properties of high-k metal oxides dielectrics as well as their implementation in TFTs, deposited by spray pyrolysis, a simple and versatile technique that combines high yield and large area compatibility. In particular, the structural, optical, surface and electronic properties of tantalum aluminate (TaAlOx), hafnium titanate (HfTiO4) and zirconium silicate (ZrSiO4) were studied as along with their performance as gate dielectric for TFTs implementing ZnO semiconducting channels. In all cases, stochiometric TaAlOx, HfTiO4 and ZrSiO4 films deposited at < 550 °C were found to be amorphous with surface roughness of < 1 nm. The optical bandgap varies between 4.9 eV and 8.8 eV, 5.8 eV and 3.8 eV, and 5.8 eV and 8 eV for TaAlOx, HfTiO4 and ZrSiO4 films respectively. Their dielectric constant values vary between 24 and 7, 14 and 60, and 23 and 4.2 while their leakage current density at 1 MV/cm were between 10^-6 A/cm^2 and 10^-10 A/cm^2, 10^-7 A/cm^2 and 10 A/cm^2, and 10^-5 A/cm^2 and 10^-4 A/cm^2 respectively. Particularly, the stoichiometric TaAlOx, HfTiO4 and ZrSiO4 films exhibited the bandgap of 5.4 eV, 4.4 eV, 6.1 eV, dielectric constant of 13, 30, 12 and leakage current density at 1 MV/cm of 10^-8 A/cm^2, 0.3 A/cm^2, 10^-7 A/cm^2 respectively. The performance of ZnO – based TFTs employing stoichiometric TaAlOx, HfTiO4 and ZrSiO4 gate dielectric showed promising characteristics such as low voltage operation of 4 V, high electron mobility of 16 cm^2/Vs, 7 cm^2/Vs, 57 cm^2/Vs, high current modulation ratio of 10^5, 10^7, 10^6, low subthreshold swing of 0.56 V/dec, 0.17 V/dec, 0.28 V/dec, interface trap density of 7.7x10^12 cm^-2 ,2.1x10^12 cm^-2, 10^13 cm^-2 and threshold voltage of 3.2V, 0.6V, 0.1 V respectively. In addition, the effect of post-deposition annealing (at 800 °C for 30 mins in air) on HfTiO4 films were investigated. Stochiometric HfTiO4 films were crystalline of an orthorhombic structure, surface roughness of 1.95 nm, optical bandgap of 4.36 eV, dielectric constant of 38 and leakage current density of 5 mA/cm^2 at 1 MV/cm. These remarkable findings significantly demonstrated the achievement of a high- performance high-k metal oxide gate dielectrics as alternatives to the conventional SiO2 for future integration into wide areas of electronic application

Integration of Ferroelectric HfO2 onto a III-V Nanowire Platform

The discovery of ferroelectricity in CMOS-compatible oxides, such as doped hafnium oxide, has opened new possibilities for electronics by reviving the use of ferroelectric implementations on modern technology platforms. This thesis presents the ground-up integration of ferroelectric HfO2 on a thermally sensitive III-V nanowire platform leading to the successful implementation of ferroelectric transistors (FeFETs), tunnel junctions (FTJs), and varactors for mm-wave applications. As ferroelectric HfO2 on III-V semiconductors is a nascent technology, a special emphasis is put on the fundamental integration issues and the various engineering challenges facing the technology.The fabrication of metal-oxide-semiconductor (MOS) capacitors is treated as well as the measurement methods developed to investigate the interfacial quality to the narrow bandgap III-V materials using both electrical and operando synchrotron light source techniques. After optimizing both the films and the top electrode, the gate stack is integrated onto vertical InAs nanowires on Si in order to successfully implement FeFETs. Their performance and reliability can be explained from the deeper physical understanding obtained from the capacitor structures.By introducing an InAs/(In)GaAsSb/GaSb heterostructure in the nanowire, a ferroelectric tunnel field effect transistor (ferro-TFET) is fabricated. Based on the ultra-short effective channel created by the band-to-band tunneling process, the localized potential variations induced by single ultra-scaled ferroelectric domains and individual defects are sensed and investigated. By intentionally introducing a gate-source overlap in the ferro-TFET, a non-volatile reconfigurable single-transistor solution for modulating an input signal with diverse modes including signal transmission, phase shift, frequency doubling, and mixing is implemented.Finally, by fabricating scaled ferroelectric MOS capacitors in the front-end with a dedicated and adopted RF and mm-wave backend-of-line (BEOL) implementation, the ferroelectric behavior is captured at RF and mm-wave frequencies

Solution-processed metal oxide dielectrics and semiconductors for thin film transistor applications

Transparent thin film transistors (TFTs) have been the subject of extensive scientific research over the last couple of decades, for applications in displays and imaging, as their implementation in active-matrix liquid crystal displays backplanes is expected to improve their performance in terms of switching times and stability. To this end, several material systems have emerged as contenders to address this need for a high performance, low power, large-area electronics i.e. thin film silicon, organic semiconductors and metal oxides. The electronic limitations of thin film silicon are well documented, and although organic semiconductors have seen significant improvements in recent years, their persistent low mobility and instability means that they are unlikely to progress beyond niche applications. This thesis is focused on the investigation of the physical properties of metal oxides and their implementation in TFTs. Metal oxide based TFTs were fabricated by spray pyrolysis, a simple and large-area-compatible deposition technique. More precisely, the implementation of titanium-aluminate and niobium-aluminate both wide band gap and high-k gate dielectric metal oxides in solution processed ZnO-based TFTs was studied and high performance, low operational voltage devices were fabricated. ZnO-based TFTs employing stoichiometric Al2O3-TiO2 (k~13, Eg~4.5 eV) or Nb2O5-Al2O3 (k~13.5, Eg~5.1 eV) as gate dielectric exhibited low leakage currents, high on-off current modulation ratios, high field-effect mobilities and low subthreshold voltage swings. Furthermore, the implementation of solution-processed crystalline indium-zinc oxide (c-IZO) as active channel material in TFTs was equally investigated and high-performance c-IZO-based TFTs employing Al2O3 were fabricated. The effects of metal cation doping in c-IZO matrix were investigated in particular, and c-IZO:X (X:Ga,Y,Zr,Nb) based TFTs were fabricated and their properties were assessed for each dopant. Amongst them, Yttrium doped c-IZO (c-YIZO)-based TFTs exhibited the best performance in terms of low off-state currents, high field-effect mobilities and low subthreshold voltage swings

Reliability of HfO2-Based Ferroelectric FETs: A Critical Review of Current and Future Challenges

Ferroelectric transistors (FeFETs) based on doped hafnium oxide (HfO2) have received much attention due to their technological potential in terms of scalability, highspeed, and low-power operation. Unfortunately, however, HfO2-FeFETs also suffer from persistent reliability challenges, specifically affecting retention, endurance, and variability. A deep understanding of the reliability physics of HfO2-FeFETs is an essential prerequisite for the successful commercialization of this promising technology. In this article, we review the literature about the relevant reliability aspects of HfO2-FeFETs. We initially focus on the reliability physics of ferroelectric capacitors, as a prelude to a comprehensive analysis of FeFET reliability. Then, we interpret key reliability metrics of the FeFET at the device level (i.e., retention, endurance, and variability) based on the physical mechanisms previously identified. Finally, we discuss the implications of device-level reliability metrics at both the circuit and system levels. Our integrative approach connects apparently unrelated reliability issues and suggests mitigation strategies at the device, circuit, or system level. We conclude this article by proposing a set of research opportunities to guide future development in this field

Doped And Chemically Transformed Transition Metal Dichalcogenides (tmdcs) For Two-Dimensional (2d) Electronics

Transition metal dichalcogenides (TMDCs) as the semiconductor counterparts of gra-phene have emerged as promising channel materials for flexible electronic and optoelectronic devices. The 2D layer structure of TMDCs enables the ultimate scaling of TMDC-based devices down to atomic thickness. Furthermore, the absence of dangling bonds in these materials helps to form high quality heterostructures with ultra-clean interfaces. The main objective of this work is to develop novel approaches to fabricating TMDC-based 2D electronic devices such as diodes and transistors. In the first part, we have fabricated 2D p-n junction diodes through van der Waals assembly of heavily p-doped MoS2 (WSe2) and lightly n-doped MoS2 to form vertical homo-(hetero-) junctions, which allows to continuously tune the electron concentration on the n-side for a wide range. In sharp contrast to conventional p-n junction diodes, we have observed nearly exponential dependence of the reverse-current on gate-voltage in our 2D p-n junction devices, which can be attributed to band-to-band tunneling through a gate-tunable tunneling barrier. In the second part, we developed a new strategy to engineer high-κ dielectrics by con-verting atomically thin metallic 2D TMDCs into high-κ dielectrics because it remains a signifi-cant challenge to deposit uniform high-κ dielectric thin films on TMDCs with ALD due to the lack of dangling bonds on the surfaces of TMDCs. In our study, we converted mechanically ex-foliated atomically thin layers of a 2D metal, TaS2 (HfSe2) into a high-κ dielectric, Ta2O5 (HfO2) by thermal oxidation. X-ray photoelectron spectroscopy (XPS), transmission electron microscopy (TEM), energy dispersive spectroscopy (EDS), and atomic force microscopy (AFM) were used to understand the phase conversion process. Capacitance-voltage (C-V) measure-ments were carried out to determine the dielectric constant of thermally oxidized dielec-trics. We fabricated MoS2 field-effect transistors (FETs) with thermally oxidized ultra-thin and ultra-smooth Ta2O5 as top-gate and bottom-gate high-κ dielectric layers. We observed promis-ing device performance, including a nearly ideal subthreshold swing of ~ 61 mV/dec at room temperature, negligible hysteresis, drain-current saturation in the output characteristics, a high on/off ratio ~ 106, and a room temperature field-effect mobility exceeding 60 cm2/Vs. To fur-ther reduce the leak current and improve the device performance, we have also investigated the chemical transformation of HfSe2 to HfO2 high-κ dielectric, which has significantly larger band gap than Ta2O5

Investigation of Sputtered Hafnium Oxides for Gate Dielectric Applications in Integrated Circuits

This work investigated high permittivity hafnium based dielectric films for use in future generation metal oxide semiconductor field-effect transistor (MOSFET) technologies. For the sub- 100 nm MOS structure, the conventional Si02 gate dielectric required is becoming too thin ( Two deposition processes were used for investigating hafnium oxide: A traditional reactive sputtering process using a hafnium target and oxygen along with a metal oxidation process in which hafnium metal was deposited and subsequently oxidized in a rapid thermal processor. The films and their interfacial layers were studied using transmission electron microscopy and Rutherford backscattering. Suppression of the interfacial layers was attempted by utilizing various pre-deposition cleaning processes, nitrogen incorporation, and multiple annealing conditions. Statistical analysis was performed on many film properties including: thickness and refractive index by ellipsometry, equivalent oxide thickness (EOT), relative permittivity (sr), total charge density (Nss) via capacitance-voltage analysis (C-V), oxide charge density (Qox) and interface trap charge density (DiT) from surface charge analysis, and breakdown strength vi and leakage current density from current-voltage analysis (I-V). Hafnium oxide was successfully integrated into an RIT sub-micron NMOS process, and operational 0.5 um transistors were fabricated and tested

Optimization of performance and reliability of HZO-based capacitors for ferroelectric memory applications

In an era in which the amount of produced and stored data continues to exponentially grow, standard memory concepts start showing size, power consumption and costs limitation which make the search for alternative device concepts essential. Within a context where new technologies such as DRAM, magnetic RAM, resistive RAM, phase change memories and eFlash are explored and optimized, ferroelectric memory devices like FeRAM seem to showcase a whole range of properties which could satisfy market needs, offering the possibility of creating a non-volatile RAM. In fact, hafnia and zirconia-based ferroelectric materials opened up a new scenario in the memory technology scene, overcoming the dimension scaling limitations and the integration difficulties presented by their predecessors perovskite ferroelectrics. In particular, HfₓZr₁₋ₓO₂ stands out because of high processing flexibility and ease of integration in the standard semiconductor industry process flows for CMOS fabrication. Nonetheless, further understanding is necessary in order tocorrelate device performance and reliability to the establishment of ferroelectricity itself. The aim of this work is to investigate how the composition of the ferroelectric oxide, together with the one of the electrode materials influence the behavior of a ferroelectric RAM. With this goal, different process parameters and reliability properties are considered and an analysis of the polarization reversal is performed. Starting from undoped hafnia and zirconia and subsequently examining their intermixed system, it is shown how surface/volume energy contributions, mechanical stress and oxygen-related defects all concur in the formation of the ferroelectric phase. Based on the process optimization of an HfₓZr₁₋ₓO₂-based capacitor performed within these pages, a 64 kbit 1T1C FeRAM array is demonstrated by Sony Semiconductor Solutions Corporation which shows write voltage and latency as low as 2.0 V and 16 ns, respectively. Outstanding retention and endurance performances are also predicted, which make the addressed device an extremely strong competitor in the semiconductor scene

RESISTIVE SWITCHING CHARACTERISTICS OF NANOSTRUCTURED AND SOLUTION-PROCESSED COMPLEX OXIDE ASSEMBLIES

Miniaturization of conventional nonvolatile (NVM) memory devices is rapidly approaching the physical limitations of the constituent materials. An emerging random access memory (RAM), nanoscale resistive RAM (RRAM), has the potential to replace conventional nonvolatile memory and could foster novel type of computing due to its fast switching speed, high scalability, and low power consumption. RRAM, or memristors, represent a class of two terminal devices comprising an insulating layer, such as a metal oxide, sandwiched between two terminal electrodes that exhibits two or more distinct resistance states that depend on the history of the applied bias. While the sudden resistance reduction into a conductive state in metal oxide insulators has been known for almost 50 years, the fundamental resistive switching mechanism is a complex phenomenon that is still long-debated, complex process. Further improvements to existing memristor performance require a complete understanding of memristive properties under various operation conditions. Additional technical issues also remain, such as the development of facile, low-cost fabrication methods as an alternative to expensive, ultra-high vacuum (UHV) deposition methods. This collection of work explores resistive switching within metal oxide-based memristive material assemblies by analyzing the fundamental physical insulating material properties. Chapter 3 aims to translate the utility and simplicity of the highly ordered anodic aluminum oxide (AAO) template structure to complex, yet more functional (memristive) materials. Functional oxides possessing ordered, scalable nanoporous arrays and nanocapacitor arrays over a large area is of interest to both the fields of next-generation electronics and energy storing/harvesting devices. Here their switching performance will be evaluated using conductive atomic force microscopy (C-AFM). Chapter 4 demonstrates a convective self-assembly fabrication method that effectively enables the synthesis of a low-cost solution processed memristor comprising binary oxide and perovskite ABO3 nanocrystals of varying diameter. Chapter 5 systematically compares the influence of inter-nanoparticle distance on the threshold switching SET voltage of hafnium oxide (HfO2) memristors. Utilizing shorter phosphonic acid ligands with higher binding affinity on the nanocrystal surface enabled a record-low SET voltage to be achieved. Chapter 6 extends the scope to the fine tuning of solution processed memristors with two types of perovskites nanocrystals. The primary advantage of nanocrystal memristors is the ability to draw from additional degrees of freedom by tuning the constituent nanocrystal material properties. Recent advancement of solution phase techniques enables a high degree of controllability over the nanocrystal size and structure. Thus, this work found in this dissertation aims to understand and decouple the effects of the geometric size and substitutional nanocrystal parameters on resistive switching