MIRAI Architecture for Heterogeneous Network

One of the keywords that describe next-generation wireless communications is "seamless." As part of the e-Japan Plan promoted by the Japanese Government, the Multimedia Integrated Network by Radio Access Innovation project has as its goal the development of new technologies to enable seamless integration of various wireless access systems for practical use by 2005. This article describes a heterogeneous network architecture including a common tool, a common platform, and a common access. In particular, software-defined radio technologies are used to develop a multiservice user terminal to access different wireless networks. The common platform for various wireless networks is based on a wireless-supporting IPv6 network. A basic access network, separated from other wireless access networks, is used as a means for wireless system discovery, signaling, and paging. A proof-of-concept experimental demonstration system is available

Software-defined universal microwave photonics processor

We propose, for the first time to our knowledge, a software-defined reconfigurable microwave photonics signal processor architecture that can be integrated on a chip and is capable of performing all the main functionalities by suitable programming of its control signals. The basic configuration is presented and a thorough end-to-end design model derived that accounts for the performance of the overall processor taking into consideration the impact and interdependencies of both its photonic and RF parts. We demonstrate the model versatility by applying it to several relevant application examples.The authors wish to acknowledge the financial support given by the Research Excellency Award Program GVA PROMETEO II/2013/012 and the FPI-UPV Ayudas de Investigacion y Desarrollo (PAID) Program from the Universitat Politecnica de Valencia.Pérez, D.; Gasulla Mestre, I.; Capmany Francoy, J. (2015). Software-defined universal microwave photonics processor. Optics Express. 23(11):14640-14654. https://doi.org/10.1364/OE.23.014640S1464014654231

Toward Programmable Microwave Photonics Processors

[EN] We describe the advances that we, and others, have reported during the last years in the area of programmable microwave photonic processors. Following a brief historical sketch, we provide a detailed account of the salient theoretical and experimental results recently reported on waveguide mesh optical core processors. The incorporation of a waveguide mesh optical core into the general microwave photonics programmable processor architecture is then addressed. We illustrate through different examples how this processor can be programmed to enable the most important functionalities required in microwave photonics.This work was supported in part by the European research Council under Grant ERC-ADG-2016-471715 UMWP-CHIP and in part by the Generalitat Valencia under Project PROMETEO-2017-103.Pérez-López, D.; Gasulla Mestre, I.; Capmany Francoy, J. (2018). Toward Programmable Microwave Photonics Processors. Journal of Lightwave Technology. 36(2):519-532. https://doi.org/10.1109/JLT.2017.2778741S51953236

Integrated Microwave Photonic Processors using Waveguide Mesh Cores

Integrated microwave photonics changes the scaling laws of information and communication systems offering architectural choices that combine photonics with electronics to optimize performance, power, footprint and cost. Application Specific Photonic Integrated Circuits, where particular circuits/chips are designed to optimally perform particular functionalities, require a considerable number of design and fabrication iterations leading to long-development times and costly implementations. A different approach inspired by electronic Field Programmable Gate Arrays is the programmable Microwave Photonic processor, where a common hardware implemented by the combination of microwave, photonic and electronic subsystems, realizes different functionalities through programming. Here, we propose the first-ever generic-purpose Microwave Photonic processor concept and architecture. This versatile processor requires a powerful end-to-end field-based analytical model to optimally configure all their subsystems as well as to evaluate their performance in terms of the radiofrequency gain, noise and dynamic range. Therefore, we develop a generic model for integrated Microwave Photonics systems. The key element of the processor is the reconfigurable optical core. It requires high flexibility and versatility to enable reconfigurable interconnections between subsystems as well as the synthesis of photonic integrated circuits. For this element, we focus on a 2-dimensional photonic waveguide mesh based on the interconnection of tunable couplers. Within the framework of this Thesis, we have proposed two novel interconnection schemes, aiming for a mesh design with a high level of versatility. Focusing on the hexagonal waveguide mesh, we explore the synthesis of a high variety of photonic integrated circuits and particular Microwave Photonics applications that can potentially be performed on a single hardware. In addition, we report the first-ever demonstration of such reconfigurable waveguide mesh in silicon. We demonstrate a world-record number of functionalities on a single photonic integrated circuit enabling over 30 different functionalities from the 100 that could be potentially obtained with a simple seven hexagonal cell structure. The resulting device can be applied to different fields including communications, chemical and biomedical sensing, signal processing, multiprocessor networks as well as quantum information systems. Our work is an important step towards this paradigm and sets the base for a new era of generic-purpose photonic integrated systems.Los dispositivos integrados de fotónica de microondas ofrecen soluciones optimizadas para los sistemas de información y comunicación. Generalmente, están compuestos por diferentes arquitecturas en las que subsistemas ópticos y electrónicos se integran para optimizar las prestaciones, el consumo, el tamaño y el coste del dispositivo final. Hasta ahora, los circuitos/chips de propósito específico se han diseñado para proporcionar una funcionalidad concreta, requiriendo así un número considerable de iteraciones entre las etapas de diseño, fabricación y medida, que origina tiempos de desarrollo largos y costes demasiado elevados. Una alternativa, inspirada por las FPGA (del inglés Field Programmable Gate Array), es el procesador fotónico programable. Este dispositivo combina la integración de subsistemas de microondas, ópticos y electrónicos para realizar, mediante la programación de los mismos y sus interconexiones, diferentes funcionalidades. En este trabajo, proponemos por primera vez el concepto del procesador de propósito general, así como su arquitectura. Además, con el fin de diseñar, optimizar y evaluar las prestaciones básicas del dispositivo, hemos desarrollado un modelo analítico extremo a extremo basado en las componentes del campo electromagnético. El modelo desarrollado proporciona como resultado la ganancia, el ruido y el rango dinámico global para distintas configuraciones de modulación y detección, en función de los subsistemas y su configuración. El elemento principal del procesador es su núcleo óptico reconfigurable. Éste requiere un alto grado de flexibilidad y versatilidad para reconfigurar las interconexiones entre los distintos subsistemas y para sintetizar los circuitos para el procesado óptico. Para este subsistema, proponemos el diseño de guías de onda reconfigurables para la creación de mallados bidimensionales. En el marco de esta tesis, hemos propuesto dos nuevos nodos de interconexión óptica para mallas reconfigurables, con el objetivo de obtener un mayor grado de versatilidad. Una vez escogida la malla hexagonal para el núcleo del procesador, hemos analizado la configuración de un gran número de circuitos fotónicos integrados y de funcionalidades de fotónica de microondas. El trabajo se ha completado con la demonstración de la primera malla reconfigurable integrada en un chip de silicio, demostrando además la síntesis de 30 de las 100 funcionalidades que potencialmente se pueden obtener con la malla diseñada compuesta de 7 celdas hexagonales. Este hecho supone un record frente a los sistemas de propósito específico. El sistema puede aplicarse en diferentes campos como las comunicaciones, los sensores químicos y biomédicos, el procesado de señales, la gestión y procesamiento de redes y los sistemas de información cuánticos. El conjunto del trabajo realizado representa un paso importante en la evolución de este paradigma, y sienta las bases para una nueva era de dispositivos fotónicos de propósito general.Els dispositius integrats de Fotònica de Microones oferixen solucions optimitzades per als sistemes d'informació i comunicació. Generalment, estan compostos per diferents arquitectures en què subsistemes òptics i electrònics s'integren per a optimitzar les prestacions, el consum, la grandària i el cost del dispositiu final. Fins ara, els circuits/xips de propòsit específic s'han dissenyat per a proporcionar una funcionalitat concreta, requerint així un nombre considerable d'iteracions entre les etapes de disseny, fabricació i mesura, que origina temps de desenrotllament llargs i costos massa elevats. Una alternativa, inspirada per les FPGA (de l'anglés Field Programmable Gate Array), és el processador fotònic programable. Este dispositiu combina la integració de subsistemes de microones, òptics i electrònics per a realitzar, per mitjà de la programació dels mateixos i les seues interconnexions, diferents funcionalitats. En este treball proposem per primera vegada el concepte del processador de propòsit general, així com la seua arquitectura. A més, a fi de dissenyar, optimitzar i avaluar les prestacions bàsiques del dispositiu, hem desenrotllat un model analític extrem a extrem basat en els components del camp electromagnètic. El model desenrotllat proporciona com resultat el guany, el soroll i el rang dinàmic global per a distintes configuracions de modulació i detecció, en funció dels subsistemes i la seua configuració. L'element principal del processador és el seu nucli òptic reconfigurable. Este requerix un alt grau de flexibilitat i versatilitat per a reconfigurar les interconnexions entre els distints subsistemes i per a sintetitzar els circuits per al processat òptic. Per a este subsistema, proposem el disseny de guies d'onda reconfigurables per a la creació de mallats bidimensionals. En el marc d'esta tesi, hem proposat dos nous nodes d'interconnexió òptica per a malles reconfigurables, amb l'objectiu d'obtindre un major grau de versatilitat. Una vegada triada la malla hexagonal per al nucli del processador, hem analitzat la configuració d'un gran nombre de circuits fotónicos integrats i de funcionalitats de fotónica de microones. El treball s'ha completat amb la demostració de la primera malla reconfigurable integrada en un xip de silici, demostrant a més la síntesi de 30 de les 100 funcionalitats que potencialment es poden obtindre amb la malla dissenyada composta de 7 cèl·lules hexagonals. Este fet suposa un rècord enfront dels sistemes de propòsit específic. El sistema pot aplicarse en diferents camps com les comunicacions, els sensors químics i biomèdics, el processat de senyals, la gestió i processament de xarxes i els sistemes d'informació quàntics. El conjunt del treball realitzat representa un pas important en l'evolució d'este paradigma, i assenta les bases per a una nova era de dispositius fotónicos de propòsit general.Pérez López, D. (2017). Integrated Microwave Photonic Processors using Waveguide Mesh Cores [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/91232TESI

Impact of physical layer impairments on large ROADM architectures

Most of today’s optical networks, use reconfigurable optical add/drop multiplexers (ROADMs) as nodes. To become more dynamic and flexible, these nodes architectures evolved over the years. The colorless, directionless and contentionless functionalities are now standard, however, current architectures have poor scalability due to limitations on wavelength selective switches dimensions. Hence, due to constant increase in data traffic, current architectures might become a bottleneck to manufacture future large-scale ROADMs. In this work, the hardware cost and in-band crosstalk generation inside different large-scale ROADM architectures, is compared with conventional architectures. Moreover, an analysis of optical filtering, amplified spontaneous emission (ASE) noise and in-band crosstalk impact in the performance of an optical network, with nodes based on the most promising large-scale architecture, the interconnected A architecture, is performed. This performance is assessed through Monte-Carlo simulation with 16 point quadrature amplitude modulation with polarization-division multiplexing (PDM-16QAM) and PDM- 32QAM signals with 200 Gb/s and 250 Gb/s, respectively. Two architectures are considered for the interconnected A express structure, Broadcast and Select (B&S) and Route and Select (R&S). For the add/drop structure, a bank-based structure is considered. The maximum number of cascaded ROADMs, considering all the studied impairments, is 5 and 7 nodes for a 32 GBaud 16QAM signal, respectively, for B&S and R&S architectures. A 32QAM signal reaches 3 and 4 nodes, respectively, for B&S and R&S architectures. The main penalty in transmission is the ASE noise generated by optical amplifiers throughout the network, having the in-band crosstalk and optical filtering penalties a lower contribution.A maioria das redes óticas são atualmente compostas por multiplexadores óticos de inserção/extração reconfiguráveis (ROADMs, em inglês) nos nós, cuja arquitetura tem evoluído para se tornarem mais dinâmicos e flexíveis. As funcionalidades colorless, directionless e contentionless estão hoje normalizadas, no entanto, as arquiteturas atuais tornam-se pouco escaláveis para ROADMs de elevada dimensão, devido a limitações nos comutadores seletivos no comprimento-de-onda. Neste trabalho, a comparação entre os custos associados e a geração de crosstalk homódino em diferentes arquiteturas propostas para ROADMs de elevada dimensão e as arquitecturas tradicionais é efetuada. É também analisado o impacto da filtragem ótica, ruído de emissão espontânea amplificada (ASE, em inglês) e crosstalk homódino no desempenho de uma rede com nós baseados na arquitetura denominada "Interconnected A". A avaliação é feita através de simulação Monte-Carlo com sinais multiplexados por divisão na polarização e modulação de amplitude em quadratura, PDM-16QAM e PDM-32QAM a 200 Gb/s e 250 Gb/s, respetivamente. Foram consideradas duas configurações para os ROADMs estudados, Broadcast and Select e Route and Select (B&S e R&S, em inglês) e uma estrutura de inserção/extração denominada "bank-based". Quando considerados todos os efeitos, o alcance máximo da rede é de 4 e 7 nós para um sinal 16QAM, respetivamente, para configurações B&S e R&S. Para um sinal 32QAM, é de 3 e 4 nós, respetivamente, para configurações B&S e R&S. A principal penalidade na transmissão deve-se ao ruído ASE gerado nos amplificadores óticos ao longo da rede, tendo a penalidade devido ao crosstalk homódino e a filtragem ótica uma menor contribuição

SDN/NFV-enabled satellite communications networks: opportunities, scenarios and challenges

In the context of next generation 5G networks, the satellite industry is clearly committed to revisit and revamp the role of satellite communications. As major drivers in the evolution of (terrestrial) fixed and mobile networks, Software Defined Networking (SDN) and Network Function Virtualisation (NFV) technologies are also being positioned as central technology enablers towards improved and more flexible integration of satellite and terrestrial segments, providing satellite network further service innovation and business agility by advanced network resources management techniques. Through the analysis of scenarios and use cases, this paper provides a description of the benefits that SDN/NFV technologies can bring into satellite communications towards 5G. Three scenarios are presented and analysed to delineate different potential improvement areas pursued through the introduction of SDN/NFV technologies in the satellite ground segment domain. Within each scenario, a number of use cases are developed to gain further insight into specific capabilities and to identify the technical challenges stemming from them.Peer ReviewedPostprint (author's final draft

Design synthesis for dynamically reconfigurable logic systems

Dynamic reconfiguration of logic circuits has been a research problem for over four decades. While applications using logic reconfiguration in practical scenarios have been demonstrated, the design of these systems has proved to be a difficult process demanding the skills of an experienced reconfigurable logic design expert. This thesis proposes an automatic synthesis method which relieves designers of some of the difficulties associated with designing partially dynamically reconfigurable systems. A new design abstraction model for reconfigurable systems is proposed in order to support design exploration using the presented method. Given an input behavioural model, a technology server and a set of design constraints, the method will generate a reconfigurable design solution in the form of a 3D floorplan and a configuration schedule. The approach makes use of genetic algorithms. It facilitates global optimisation to accommodate multiple design objectives common in reconfigurable system design, while making realistic estimates of configuration overheads and of the potential for resource sharing between configurations. A set of custom evolutionary operators has been developed to cope with a multiple-objective search space. Furthermore, the application of a simulation technique verifying the lll results of such an automatic exploration is outlined in the thesis. The qualities of the proposed method are evaluated using a set of benchmark designs taking data from a real reconfigurable logic technology. Finally, some extensions to the proposed method and possible research directions are discussed