Design of Energy-efficient Hierarchical Scheduling for Integrated Modular Avionics Systems

AbstractRecently the integrated modular avionics (IMA) architecture which introduces the concept of resource partitions becomes popular as an alternative to the traditional federated architecture. This study investigates the problem of designing hierarchical scheduling for IMA systems. The proposed scheduler model enables strong temporal partitioning, so that multiple hard real-time applications can be easily integrated into an uniprocessor platform. This paper derives the mathematic relationships among partition cycle, partition capacity and schedulability under the real-time condition, and then proposes an algorithm for optimizing partition parameters. Real-time tasks with arbitrary deadlines are considered for generality. To further improve the basic algorithm and reduce the energy consumption for embedded systems in aircraft, a power optimization approach is also proposed by exploiting the slack time. Experimental results show that the designed system can guarantee the hard real-time requirement and reduce the power consumption by at least 14%

Formal Specification and Design Techniques for Wireless Sensor and Actuator Networks

A current trend in the development and implementation of industrial applications is to use wireless networks to communicate the system nodes, mainly to increase application flexibility, reliability and portability, as well as to reduce the implementation cost. However, the nondeterministic and concurrent behavior of distributed systems makes their analysis and design complex, often resulting in less than satisfactory performance in simulation and test bed scenarios, which is caused by using imprecise models to analyze, validate and design these systems. Moreover, there are some simulation platforms that do not support these models. This paper presents a design and validation method for Wireless Sensor and Actuator Networks (WSAN) which is supported on a minimal set of wireless components represented in Colored Petri Nets (CPN). In summary, the model presented allows users to verify the design properties and structural behavior of the system

Optimal Two-Level Speed Assignment for Real-Time Systems

Reducing energy consumption is one of the main concerns in the design and implementation of embedded real-time systems. For this reason, the current generation of processors allows to vary voltage and operating frequency to balance computational speed and energy consumption. This technique is called dynamic voltage scaling (DVS). When applying DVS tohard real-time systems, it is important to provide the worst-case computational requirement; otherwise the timing constraints may be violated. However, the probability of a task executing for its worst-case execution time is very low. In this paper,we show how to exploit probabilistic information about the execution time of a task in order to reduce the energy consumed by the processor. Optimal speed assignments and transition points are found using a very general model for the processor. The model accounts for the processor idle power and time/energy overheads due to frequency transitions. We also show how these results apply to some significant cases

DEUCON: Distributed End-to-End Utilization Control for Real-Time Systems

This paper presents the Distributed End-to-end Utiization CONtrol (DEUCON) algorithm. DEUCON can dynamically enforce desired CPU utilizations on all processors in a dis-tributed real-time system despite uncertainties in the system workload. In contrast to earlier centralized control schemes, DEUCON is a distributed control algorithm that is system-atically designed based on the Distributed Model Predictive Control theory. We decompose the global multi-processor utilization control problem into a set of localized subprob-lems, and design a peer-to-peer control structure where each local controller only needs to coordinate with a small number of neighbor processors. DEUCON can provide utilization guarantees similar to a centralized control algorithm, while significantly reducing the per-controller run-time overhead in terms of both computation and communication. Further-more, it can tolerate considerable network delay and indi-vidual processor failures. Consequently, DEUCON can pro-vide scalable and robust utilization control services for large distributed real-time systems that operate in unpredictable environments

ARIVU: Power-Aware Middleware for Multiplayer Mobile Games

Ministry of Education, Singapore under its Academic Research Funding Tier

Distributed Utilization Control for Real-time Clusters with Load Balancing

Recent years have seen rapid growth of online services that rely on large-scale server clusters to handle high volume of requests. Such clusters must adaptively control the CPU utilizations of many processors in order to maintain desired soft real-time performance and prevent system overload in face of unpredictable workloads. This paper presents DUC-LB, a novel distributed utilization control algorithm for cluster-based soft real-time applications. Compared to earlier works on utilization control, a distinguishing feature of DUC-LB is its capability to handle system dynamics caused by load balancing, which is a common and essential component of most clusters today. Simulation results and control-theoretic analysis demonstrate that DUC-LB can provide robust utilization control and effective load balancing in large-scale clusters

Feedback-Based Admission Control for Firm Real-Time Task Allocation with Dynamic Voltage and Frequency Scaling

Feedback-based mechanisms can be employed to monitor the performance of Multiprocessor Systems-on-Chips (MPSoCs) and steer the task execution even if the exact knowledge of the workload is unknown a priori. In particular, traditional proportional-integral controllers can be used with firm real-time tasks to either admit them to the processing cores or reject in order not to violate the timeliness of the already admitted tasks. During periods with a lower computational power demand, dynamic voltage and frequency scaling (DVFS) can be used to reduce the dissipation of energy in the cores while still not violating the tasks’ time constraints. Depending on the workload pattern and weight, platform size and the granularity of DVFS, energy savings can reach even 60% at the cost of a slight performance degradation

A hybrid genetic algorithm with mapreduce technique for cloud computing energy efficiency

Computer clouds generally comprise large power-consuming data centers as they are designed to support the elasticity and scalability required by customers. However, while cloud computing reduces energy consumption for customers, it is an issue for providers who have to deal with increasing demand and performance expectations. This creates the need for mechanisms to improve the energy-efficiency of cloud computing data centers while maintaining desired levels of performance. This research seeks to formulate a hybrid algorithm based on Genetic algorithm and MapReduce algorithm techniques to further promote energy efficiency in the cloud computing platform. The function of the MapReduce algorithm is to optimize scheduling performance which is one of the more efficient techniques for handling large data in servers. Genetic algorithm is effective in optimally measuring the value of operations and allows for the minimization of energy efficiency where it includes the formula for single optimization energy efficiency. A series of simulations were developed to evaluate the effectiveness of the proposed algorithm. The evaluation results show the amount of Information Technology equipment power required for Power Usage Effectiveness values to optimize energy usage where the performance of the proposed algorithm is 6% better than the previous genetic algorithm and 5% better than Hadoop MapReduce scheduling on low load conditions. On the other hand, the proposed algorithm improved energy efficiency in comparison with the previous work

Procedimiento de diseño para minimizar el consumo de potencia y los retrasos en WSAN

ResumenActualmente existe un gran interés por el desarrollo de aplicaciones industriales utilizando redes inalámbricas, principalmente por el aumento de la flexibilidad del sistema y la disminución de los costos de implementación. Sin embargo, los retrasos y el jitter que introduce la red de comunicaciones en las aplicaciones de control, han dado lugar a que en algunos casos no se obtenga una buena correspondencia entre los resultados experimentales y los objetivos de control propuestos, esto como consecuencia del uso de modelos imprecisos para analizar y diseñar estos sistemas, métodos de validación poco elaborados y plataformas que no soportan los modelos empleados. En este trabajo se presenta un procedimiento de diseño que permite encontrar un modo de funcionamiento óptimo del sistema, que garantiza el cumplimiento de los plazos de tiempo de las aplicaciones, y minimiza el consumo de potencia y los retrasos