Integrated Silicon Microwave and Millimeterwave Passive Components and Functions

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Design, fabrication and test of integrated micro-scale vibration based electromagnetic generator

This paper discusses the design, fabrication and testing of electromagnetic microgenerators. Three different designs of power generators are partially microfabricated and assembled. Prototype A having a wire-wound copper coil, Prototype B, an electrodeposited copper coil both on a Deep Reactive Ion etched (DRIE) silicon, beam and paddle. Prototype C uses moving NdFeB magnets in between two microfabricated coils. The integrated coil, paddle and beam were fabricated using standard micro-Electro-Mechanical Systems (MEMS) processing techniques. For Prototype A, the maximum measured power output was 148 nW at 8.08 kHz resonant frequency and 3.9 m/s2 acceleration. For prototype B, the microgenerator gave a maximum load power of 23 nW for an acceleration of 9.8 m/s2, at a resonant frequency of 9.83 kHz. This is a substantial improvement in power generated over other microfabricated silicon based generators reported in literature. This generator has a volume of 0.1 cm3 which is lowest of all the silicon based microfabricated electromagnetic power generators reported. To verify the potential of integrated coils in electromagnetic generators, Prototype C was assembled. This generated a maximum load power of 5

Utilisation of microsystems technology in radio frequency and microwave applications

The market trends of the rapidly growing communication systems require new product architectures and services that are only realisable by utilising technologies beyond that of planar integrated circuits. Microsystems technology (MST) is one such technology which can revolutionise radio frequency (RF) and microwave applications. This article discusses the enabling potential of the MST to meet the stringent requirements of modern communication systems. RF MST fabrication technologies and actuation mechanisms empower conventional processes by alleviating the substrate effects on passive devices and provide product designers with high quality versatile microscale components which can facilitate system integration and lead to novel architectures with enhanced robustness and reduced power consumption. An insight on the variety of components that can be fabricated using the MST is given, emphasizing their excellent electrical performance and versatility. Research issues that need to be addressed are also discussed. Finally, this article discusses the main approaches for integrating MST devices in RF and microwave applications together with the difficulties that need to be overcome in order to make such devices readily available for volume-production.peer-reviewe

Tunable microwave filters using ferroelectric thin films

Frequency agile microwave devices based on Barium Strontium Titanate (BST) thin films have gained a lot of interest in recent years. The frequency agility of the ferroelectric devices is based on the external DC electric field controlled permittivity of BST thin film. In this research work, several tunable microwave filters incorporating BST thin film varactors operating in a frequency range between 1 GHz and 25 GHz are designed, tested and analysed. A lumped element lowpass filter incorporating integrated meander line inductors and BST parallel plate capacitors is implemented on a high resistivity silicon substrate and demonstrates 32.1 % tuning of the cut-off frequency at 15 V. A combline bandpass filter employing integrated BST parallel plate varactors as tuning elements is implemented on a MgO substrate and shows a reasonable tuning from about 8 GHz to 12 GHz with 10 V bias of only one resonator. Two pole and four pole coupled resonator bandpass filters with discrete BST or GaAs varactors as tuning elements are implemented in a frequency range of 1 - 3 GHz. The filters based on BST parallel plate capacitors show an insertion loss in line with the GaAs filters, which is also the lowest insertion loss of BST filters ever reported. Future work on improving the BST film and metal film loss at tens of gigahertz range is also discussed

Integrated thin film magnetics in advanced organic substrates

This thesis investigates the challenges of integrating thin film magnetics into advanced organic substrates for Power Supply in Package (PwrSiP) applications. The surface conditions of the substrate on which the thin films were deposited was found to play a critical role in terms of the magnetic performance and efficacy of the material used as the magnetic passive component. Whence, planarization of the underlying substrate, or a release process with which the magnetic core could be deposited, and later liberated from a polymer layer spun on smooth Si were developed in order to address the issue of surface roughness of the underlying substrate. \newline\newline The released magnetic thin films were incorporated into advanced organic substrates by three methods, as follows: 1) the integration of the released magnetic core using wirebonds; 2) the embedding of the released magnetic material using a Flip-Chip approach; 3) fully embedding the released magnetic material between the prepreg layers in the PCB stack. \newline\newline Finally, methods for the modelling and characterisation of the magnetisation dynamics of thin film magnetics were developed. The modelling of the magnetisation dynamics comprises two approaches: 1) development of software which enables large scale numeric modelling of the magnetic thin films using graphical processing units; 2) development of analytical models to characterise the magnetisation dynamics of magnetic thin films. Both the analytic and numeric methods were developed in order to characterise the issue of surface roughness in magnetic thin films, which was found to result in severely degraded magnetic performance. Furthermore, the thickness dependent multimodal behaviour of amorphous CZTB films spanning thickness 80nm – 500nm were investigated using Brown’s continuous diffusion model of magnetic spins. It was found that there is a critical film thickness whereat there is a breakdown in the induced uniaxial anisotropy within the film, and hence, that thickness should be considered the maximum useful thickness of the material in ultra-low loss PwRSiP applications

A SiGe BiCMOS LNA for mm-wave applications

A 5 GHz continuous unlicensed bandwidth is available at millimeter-wave (mm-wave) frequencies around 60 GHz and offers the prospect for multi gigabit wireless applications. The inherent atmospheric attenuation at 60 GHz due to oxygen absorption makes the frequency range ideal for short distance communication networks. For these mm-wave wireless networks, the low noise amplifier (LNA) is a critical subsystem determining the receiver performance i.e., the noise figure (NF) and receiver sensitivity. It however proves challenging to realise high performance mm-wave LNAs in a silicon (Si) complementary metal-oxide semiconductor (CMOS) technology. The mm-wave passive devices, specifically on-chip inductors, experience high propagation loss due to the conductivity of the Si substrate at mm-wave frequencies, degrading the performance of the LNA and subsequently the performance of the receiver architecture. The research is aimed at realising a high performance mm-wave LNA in a Si BiCMOS technology. The focal points are firstly, the fundamental understanding of the various forms of losses passive inductors experience and the techniques to address these issues, and secondly, whether the performance of mm-wave passive inductors can be improved by means of geometry optimising. An associated hypothesis is formulated, where the research outcome results in a preferred passive inductor and formulates an optimised passive inductor for mm-wave applications. The performance of the mm-wave inductor is evaluated using the quality factor (Q-factor) as a figure of merit. An increased inductor Q-factor translates to improved LNA input and output matching performance and contributes to the lowering of the LNA NF. The passive inductors are designed and simulated in a 2.5D electromagnetic (EM) simulator. The electrical characteristics of the passive structures are exported to a SPICE netlist which is included in a circuit simulator to evaluate and investigate the LNA performance. Two LNAs are designed and prototyped using the 13μ-m SiGe BiCMOS process from IBM as part of the experimental process to validate the hypothesis. One LNA implements the preferred inductor structures as a benchmark, while the second LNA, identical to the first, replaces one inductor with the optimised inductor. Experimental verification allows complete characterization of the passive inductors and the performance of the LNAs to prove the hypothesis. According to the author's knowledge, the slow-wave coplanar waveguide (S-CPW) achieves a higher Q-factor than microstrip and coplanar waveguide (CPW) transmission lines at mm-wave frequencies implemented for the 130 nm SiGe BiCMOS technology node. In literature, specific S-CPW transmission line geometry parameters have previously been investigated, but this work optimises the signal-to-ground spacing of the S-CPW transmission lines without changing the characteristic impedance of the lines. Optimising the S-CPW transmission line for 60 GHz increases the Q-factor from 38 to 50 in simulation, a 32 % improvement, and from 8 to 10 in measurements. Furthermore, replacing only one inductor in the output matching network of the LNA with the higher Q-factor inductor, improves the input and output matching performance of the LNA, resulting in a 5 dB input and output reflection coefficient improvement. Although a 5 dB improvement in matching performance is obtained, the resultant noise and gain performance show no significant improvement. The single stage LNAs achieve a simulated gain and NF of 13 dB and 5.3 dB respectively, and dissipate 6 mW from the 1.5 V supply. The LNA focused to attain high gain and a low NF, trading off linearity and as a result obtained poor 1 dB compression of -21.7 dBm. The LNA results are not state of the art but are comparable to SiGe BiCMOS LNAs presented in literature, achieving similar gain, NF and power dissipation figures.Dissertation (MEng)--University of Pretoria, 2012.Electrical, Electronic and Computer Engineeringunrestricte

Characterisation and integration of materials and processes for planar spiral microinductors with permalloy cores

The increasing density of electronics within portable electronic devices provides the motivation to develop more compact power electronics, such as DC-DC converters. Typically, integrated circuits and each passive component, such as inductors, are discreetly packaged and mounted on printed circuit board (PCB), to implement the converter. Hence for further size reduction there has been growing interest for integration schemes such as Power supply in package (PwrSiP). However, the ultimate goal is the monolithic integration of the power supply solution, in an integration scheme known as Power Supply on Chip (PwrSoC). The economic effectiveness of the converter will be determined by the device footprint and number of processing steps required to fabricate the inductor. Hence, the motivation behind this thesis is the need for microinductors with large inductance density (inductance per device footprint) while maintaining low losses, which can be integrated with silicon IC. Furthermore, the need for thick layers will result in issues with yield and reliability of the fabricated device. Hence there is a need to identify, characterise and integrate materials with low residual stress into the microinductor fabrication process. A typical choice of inter-coil dielectric is the photo-definable epoxy SU-8. However, SU-8 suffers from intrinsic issues with high residual stress and adhesion. One possible replacement for SU-8 as a structural and dielectric layer is Parylene-C. The first objective of this thesis proposes a test-bed inductor process, which incorporates Parylene as a structural and dielectric layer and has a short turnaround time of one week. This fabrication process involves the filling of high aspect ratio gaps between copper structures with Parylene and subsequent chemical mechanical planarisation, and a test chip has been designed to characterise these processes. Additionally, Scotch-tape testing has been used to confirm suitable Parylene adhesion to patterned and unpatterned films used in this process. Subsequently, complete microinductors, with magnetic cores, have been fabricated, characterised and benchmarked against other inductor technologies and architectures reported in the literature. Parylene is expected to produce films with low residual stress due to its room temperature deposition process. However, the test-bed inductor process requires thermal treatments up to 140°C. Hence it was necessary to characterise the stress in Parylene films as a result of processing temperature and compare this to stress levels in SU-8 5 and 3005 films. This study has determined the spatial variation of residual stress in Parylene-C and SU-8 films, by combining automated measurements of strain indicator test structures and local nanoindentation measurements of Young’s modulus. These measurements have been used to wafer map strain, Young’s modulus, and subsequently residual stress in these films, as a result of processing parameter variation. It is well known that placing ferromagnetic material in close proximity to current carrying coils can further enhance the measured inductance value. However, the conductive magnetic core is also a source of loss for the microinductor. Hence, magnetic permeability, electrical resistivity and mechanical stress in the magnetic core influence the inductance value, eddy current losses and reliability of the fabricated microinductor, respectively. The ability to characterise these properties on wafer is essential for process control and verification measurements. This thesis details a test chip capable of routine measurements on NiFe films to characterise the spatial variation of these properties. Furthermore, wafer mapping measurements are reported to identify the correlation between high frequency permeability, electrical resistivity, mechanical strain and the chemical composition of two-component Permalloy film (NixFe(100-x)) electroplated on the surface of 100mm silicon wafers. Finally, MEMS-based inductor fabrication processes typically require a number of electrodeposition steps, which require conductive seed layers for the deposition of the coils and magnetic core material. A typical choice of seed layer is copper. However, due to copper’s paramagnetic behaviour (μ = 1) and low electrical resistivity (ρ=6.69μΩ.cm) this layer contributes to eddy current losses, while acting as a thin ‘screening layer’. It is very likely that using a magnetic seed layer, within the magnetic core, will noticeably reduce eddy current related losses. However, detailed systematic experimental studies on any such improvement have not been documented in the literature. This study involves compositional, structural, electrical and magnetic characterisation of Ni80Fe20 films electro-deposited on non-magnetic and magnetic seed layers (i.e. copper and nickel respectively). Mechanical strain test structures and X-ray analysis have been used to characterise the stress levels and structural properties of Ni80Fe20 films electro-deposited on both copper and nickel seed layers. In addition, planar spiral micro-inductors, both with and without patterned magnetic cores, have been fabricated to determine the effect of patterning on their performance. This is in addition to quantifying the improvement in the electrical performance resulting from the enhanced magnetic and resistive contribution provided by magnetic seed layers

Silicon carbide technology for extreme environments

PhD ThesisWith mankind’s ever increasing curiosity to explore the unknown, including a variety of hostile environments where we cannot tread, there exists a need for machines to do work on our behalf. For applications in the most extreme environments and applications silicon based electronics cannot function, and there is a requirement for circuits and sensors to be built from wide band gap materials capable of operation in these domains. This work addresses the initial development of silicon carbide circuits to monitor conditions and transmit information from such hostile environments. The characterisation, simulation and implementation of silicon carbide based circuits utilising proprietary high temperature passives is explored. Silicon carbide is a wide band gap semiconductor material with highly suitable properties for high-power, high frequency and high temperature applications. The bandgap varies depending on polytype, but the most commonly used polytype 4H, has a value of 3.265 eV at room temperature, which reduces as the thermal ionization of electrons from the valence band to the conduction band increases, allowing operation in ambient up to 600°C. Whilst silicon carbide allows for the growth of a native oxide, the quality has limitations and therefore junction field effect transistors (JFETs) have been utilised as the switch in this work. The characteristics of JFET devices are similar to those of early thermionic valve technology and their use in circuits is well known. In conjunction with JFETs, Schottky barrier diodes (SBDs) have been used as both varactors and rectifiers. Simulation models for high temperature components have been created through their characterisation of their electrical parameters at elevated temperatures. The JFETs were characterised at temperatures up to 573K, and values for TO V , β , λ , IS , RS and junction capacitances were extracted and then used to mathematically describe the operation of circuits using SPICE. The transconductance of SiC JFETs at high temperatures has been shown to decrease quadratically indicating a strong dependence upon carrier mobility in the channel. The channel resistance also decreased quadratically as a direct result of both electric field and temperature enhanced trap emission. The JFETs were tested to be operational up to 775K, where they failed due to delamination of an external passivation layer. ii Schottky diodes were characterised up to 573K, across the temperature range and values for ideality factor, capacitance, series resistance and forward voltage drop were extracted to mathematically model the devices. The series resistance of a SiC SBD exhibited a quadratic relationship with temperature indicating that it is dominated by optical phonon scattering of charge carriers. The observed deviation from a temperature independent ideality factor is due to the recombination of carriers in the depletion region affected by both traps and the formation of an interfacial layer at the SiC/metal interface. To compliment the silicon carbide active devices utilised in this work, high temperature passive devices and packaging/circuit boards were developed. Both HfO2 and AlN materials were investigated for use as potential high temperature capacitor dielectrics in metal-insulator-metal (MIM) capacitor structures. The different thicknesses of HfO2 (60nm and 90nm) and 300nm for AlN and the relevance to fabrication techniques are examined and their effective capacitor behaviour at high temperature explored. The HfO2 based capacitor structures exhibited high levels of leakage current at temperatures above 100°C. Along with elevated leakage when subjected to higher electric fields. This current leakage is due to the thin dielectric and high defect density and essentially turns the capacitors into high value resistors in the order of MΩ. This renders the devices unsuitable as capacitors in hostile environments at the scales tested. To address this issue AlN capacitors with a greater dielectric film thickness were fabricated with reduced leakage currents in comparison even at an electric field of 50MV/cm at 600K. The work demonstrated the world’s first high temperature wireless sensor node powered using energy harvesting technology, capable of operation at 573K. The module demonstrated the world’s first amplitude modulation (AM) and frequency modulation (FM) communication techniques at high temperature. It also demonstrated a novel high temperature self oscillating boost converter cable of boosting voltages from a thermoelectric generator also operating at this temperature. The AM oscillator operated at a maximum temperature of 553K and at a frequency of 19.4MHz with a signal amplitude 65dB above background noise. Realised from JFETs and HfO2 capacitors, modulation of the output signal was achieved by varying the load resistance by use of a second SiC JFET. By applying a negative signal voltage of between -2.5 and -3V, a 50% reduction in the signal amplitude and therefore Amplitude Modulation was achieved by modulating the power within the oscillator through the use of this secondary JFET. Temperature drift in the characteristics were also observed, iii with a decrease in oscillation frequency of almost 200 kHz when the temperature changed from 300K to 573K. This decrease is due to the increase in capacitance density of the HfO2 MIM capacitors and increasing junction capacitances of the JFET used as the amplifier within the oscillator circuit. Direct frequency modulation of a SiC Voltage Controlled Oscillator was demonstrated at a temperature of 573K with a oscillation frequency of 17MHz. Realised from an SiC JFET, AlN capacitors and a SiC SBD used as a varactor. It was possible to vary the frequency of oscillations by 100 kHz with an input signal no greater than 1.5V being applied to the SiC SBD. The effects of temperature drift were more dramatic in comparison to the AM circuit at 400 kHz over the entire temperature range, a result of the properties of the AlN film which causes the capacitors to increase in capacitance density by 10%. A novel self oscillating boost converter was commissioned using a counter wound transformer on high temperature ferrite, a SiC JFET and a SiC SBD. Based upon the operation of a free running blocking oscillator, oscillatory behaviour is a result of the electric and magnetic variations in the winding of the transformer and the amplification characteristics of a JFET. It demonstrated the ability to boost an input voltage of 1.3 volts to 3.9 volts at 573K and exhibited an efficiency of 30% at room temperature. The frequency of operation was highly dependent upon the input voltage due to the increased current flow through the primary coil portion of the transformer and the ambient temperature causing an increase in permeability of the ferrite, thus altering the inductance of both primary and secondary windings. However due its simplicity and its ability to boost the input voltage by 250% meant it was capable of powering the transmitters and in conjunction with a Themoelectric Generator so formed the basis for a self powered high temperature silicon carbide sensor node. The demonstration of these high temperature circuits provide the initial stages of being able to produce a high temperature wireless sensor node capable of operation in hostile environments. Utilising the self oscillating boost converter and a high temperature Thermoelectric Generator these prototype circuits were showed the ability to harvest energy from the high temperature ambient and power the silicon carbide circuitry. Along with appropriate sensor technology it demonstrated the feasibility of being able to monitor and transmit information from hazardous locations which is currently unachievable