79 research outputs found

    Characterisation of on-chip electrostatic discharge waveforms with sub-nanosecond resolution: design of a differential high voltage probe with high bandwidth

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    Bliksem werd tot aan de ontdekking van de bliksemafleider (18e eeuw) gezien als een van de gevaarlijkste bedreigingen voor het stadsleven. Door het gebruik van micro-elektronica werden ingenieurs gewaar dat ditzelfde fysische verschijnsel, elektrostatische ontlading of ESD genoemd, zich ook op microscopische schaal voordoet. In de jaren zeventig was meer dan 30% van al het chipfalen te wijten aan ESD. Om dit tegen te gaan werd met het onderzoek naar ESD-protecties en -meetsystemen aangevangen. Om meer informatie over het gedrag van een ESD-protectie te verkrijgen wordt een ESD-puls op dit systeem losgelaten. Het antwoord van de protectie op deze puls wordt dan bepaald m.b.v. spannings- en stroomgolfvormmetingen. In dit werk wordt een nieuwe nauwkeurige ESD-golfvormmeettechniek voorgesteld die directe metingen op protecties kan uitvoeren. De karakterisering van ESD-golfvormen op chip wordt enorm bemoeilijkt door de grote hoeveelheid elektromagnetische interferentie die de ESD-puls veroorzaakt. Dit wordt omzeild door het gewenste signaal naar een veilige omgeving te transporteren, waar een standaard meettoestel de meting kan uitvoeren. Dit transport wordt gerealiseerd m.b.v. optische communicatie, wat immuun is voor elektromagnetische interferentie. Zo kan nauwkeurige in-situ-informatie worden verkregen waarmee de ESD-protecties in de toekomst verbeterd kunnen worden.Up to the 18th century, lightning was considered one of nature’s most dangerous threats in city life. This all ended with the lightning rod, protecting thousands of homes during lightning storms. The large-scale use of microelectronics has made engineers aware of the same physical phenomenon occuring on a microscopic scale. This phenomenon is called electrostatic discharge or ESD. In the seventies, more than 30% of all chip failure was attributed to static electricity. To counter this effect, the research for on-chip ESD protections was born. Today ESD is a buzzing line of research, as with new and faster chip technologies comes a higher ESD vulnerability. This makes ESD protection and measurement increasingly important. Although ESD is now a major subject in chip design, it copes with a lack of accurate device models. To gain more information on the exact operation of an ESD protection, an ESD pulse is unleashed upon this device. The response of the protection on this pulse is then assessed by performing voltage or current waveform measurements. This work presents a waveform measurement technique able to accurately perform direct measurements on the ESD protection. Due to the high amount of electromagnetic interference caused by the ESD pulse, direct waveform characterisation near the protection is hard. This is solved by transporting the target signal into a clean area, where the measurement is performed by standard lab equipment. The key is that this transportation is realized by means of optical communication, which is immune to electromagnetic interference. This way, accurate in situ information can be used to protect tomorrow’s chips

    Non-linear analysis of optical and microwave sources

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    Due to the ever increasing need for better and more capable communication systems, a large quantity of research is focused on the design and simulation of different sections of communication systems including the communication sources. Due to the massive cost of the fabrication involved in designing new communication sources, the accurate modelling and design of these sources using Computer Aided Design is of great interest. In this thesis fundamentals of laser modelling and nonlinear microwave antenna design; followed by reviewing the most important works carried out by other researchers in these fields. The thesis continues by introducing a proposed, accurate model of the Vertical Cavity Surface Emitting Laser (VCSEL). The proposed model integrates the effects of the matching network as well as the parasitics, due to the VCSEL chip and the packaging mounting and the intrinsic VCSEL noise sources. Further in this thesis, a nonlinear Composite Right/Left Handed frequency doubler Leaky Wave Antenna is designed which is capable of transmitting a signal in a direction that can be varied continuously from backfire to endfire, by varying the input frequency to the structure. The novelty of the proposed design is in the inclusion of nonlinear elements in the CRLH structure and also in the use of a quasi-lumped approach when designing the distributed structure. Finally, in this thesis a novel method of combining harmonic balance and EM analysis for the design and optimisation of nonlinear active antennas is developed. This method responds to the restriction of the CAD software in conveniently combining the analysis of nonlinear active antennas with advanced EM simulations such as radiation patterns. The proposed method enables the advanced EM analysis at the harmonic frequencies, generated within the nonlinear microwave structures when the structure is exited at the fundamental frequency, to be combined with full electromagnetic simulators

    Radio over multimode fiber using VCSELS

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    Master'sMASTER OF ENGINEERIN

    Modeling of Photonic Devices and Photonic Integrated Circuits for Optical Interconnect and RF Photonic Front-End Applications

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    Photonic integrated circuits (PICs) offer compelling solutions for applications in many areas due to the sufficient functionality and excellent performance. Optical interconnects and radio frequency (RF) photonics are two areas in which PICs have potential to be widely used. Optical interconnect system efficiency is dependent on the ability to optimize the transceiver circuitry for low-power and high-bandwidth operation, motivating co-simulation environments with compact optical device simulation models. Compact models for vertical-cavity surface-emitting lasers (VCSELs) and silicon carrier-injection/depletion ring modulators which include both non-linear electrical and optical dynamics are presented, and excellent matching between co-simulated and measured optical eye diagrams is achieved. Advanced modulation schemes, such as four-level pulse-amplitude modulation (PAM4), are currently under consideration in both high-speed electrical and optical interconnect systems. How NRZ and PAM4 modulation impacts the energy efficiency of an optical link architecture based on silicon photonic microring resonator modulators and drop filters is analyzed. Two ring modulator device structures are proposed for PAM4 modulation, including a single-segment device driven with a multi-level PAM4 transmitter and a two-segment device driven by two simple NRZ (MSB/LSB) transmitters. Modeling results show that the PAM4 architectures achieve superior energy efficiency at higher data rates due to the relaxed circuit bandwidth. While RF photonics offer the promise of chip-scale opto-electrical systems with high levels of functionality, in order to avoid long and unsuccessful design cycles, efficient models that allow for co-simulation are necessary. In order to address this, an optical element modeling framework is proposed based on Verilog-A which allows for the co-simulation of optical elements with transistor-level circuits in a Cadence design environment. Three components in the RF photonic system, Mach Zehnder (MZ) modulators, 4th order all pass filter (APF)-based optical filters, and jammer-suppression notch filters are presented to demonstrate the capability of efficient system design in co-simulation environments

    Research and design of high-speed advanced analogue front-ends for fibre-optic transmission systems

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    In the last decade, we have witnessed the emergence of large, warehouse-scale data centres which have enabled new internet-based software applications such as cloud computing, search engines, social media, e-government etc. Such data centres consist of large collections of servers interconnected using short-reach (reach up to a few hundred meters) optical interconnect. Today, transceivers for these applications achieve up to 100Gb/s by multiplexing 10x 10Gb/s or 4x 25Gb/s channels. In the near future however, data centre operators have expressed a need for optical links which can support 400Gb/s up to 1Tb/s. The crucial challenge is to achieve this in the same footprint (same transceiver module) and with similar power consumption as today’s technology. Straightforward scaling of the currently used space or wavelength division multiplexing may be difficult to achieve: indeed a 1Tb/s transceiver would require integration of 40 VCSELs (vertical cavity surface emitting laser diode, widely used for short‐reach optical interconnect), 40 photodiodes and the electronics operating at 25Gb/s in the same module as today’s 100Gb/s transceiver. Pushing the bit rate on such links beyond today’s commercially available 100Gb/s/fibre will require new generations of VCSELs and their driver and receiver electronics. This work looks into a number of state‐of-the-art technologies and investigates their performance restraints and recommends different set of designs, specifically targeting multilevel modulation formats. Several methods to extend the bandwidth using deep submicron (65nm and 28nm) CMOS technology are explored in this work, while also maintaining a focus upon reducing power consumption and chip area. The techniques used were pre-emphasis in rising and falling edges of the signal and bandwidth extensions by inductive peaking and different local feedback techniques. These techniques have been applied to a transmitter and receiver developed for advanced modulation formats such as PAM-4 (4 level pulse amplitude modulation). Such modulation format can increase the throughput per individual channel, which helps to overcome the challenges mentioned above to realize 400Gb/s to 1Tb/s transceivers

    A CO-SIMULATION ENVIRONMENT FOR MIXED SIGNAL, MULTI-DOMAIN SYSTEM LEVEL DESIGN EXPLORATION

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    This thesis presents a system-level co-simulation environment for mixed domain design exploration. By employing shared memory IPC (Inter-Process Communication) and utilizing PDES (Parallel Discrete Event Simulation) techniques, we examine two methods of synchronization, lock-step and dynamic. We then compare the performance of these two methods on a series of test systems as well as real designs using the Chatoyant MOEMS (Micro-Electro Mechanical Systems) simulator and the mixed HDL (Hardware Description Language) simulator from Model Technology, ModelSim. The results collected are used to ascertain which method provides the best overall performance with the least overhead
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