Intelligent control of an automated adhesive dispensing cell.

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Intrinsically Evolvable Artificial Neural Networks

Dedicated hardware implementations of neural networks promise to provide faster, lower power operation when compared to software implementations executing on processors. Unfortunately, most custom hardware implementations do not support intrinsic training of these networks on-chip. The training is typically done using offline software simulations and the obtained network is synthesized and targeted to the hardware offline. The FPGA design presented here facilitates on-chip intrinsic training of artificial neural networks. Block-based neural networks (BbNN), the type of artificial neural networks implemented here, are grid-based networks neuron blocks. These networks are trained using genetic algorithms to simultaneously optimize the network structure and the internal synaptic parameters. The design supports online structure and parameter updates, and is an intrinsically evolvable BbNN platform supporting functional-level hardware evolution. Functional-level evolvable hardware (EHW) uses evolutionary algorithms to evolve interconnections and internal parameters of functional modules in reconfigurable computing systems such as FPGAs. Functional modules can be any hardware modules such as multipliers, adders, and trigonometric functions. In the implementation presented, the functional module is a neuron block. The designed platform is suitable for applications in dynamic environments, and can be adapted and retrained online. The online training capability has been demonstrated using a case study. A performance characterization model for RC implementations of BbNNs has also been presented

Advances in PID Control

Since the foundation and up to the current state-of-the-art in control engineering, the problems of PID control steadily attract great attention of numerous researchers and remain inexhaustible source of new ideas for process of control system design and industrial applications. PID control effectiveness is usually caused by the nature of dynamical processes, conditioned that the majority of the industrial dynamical processes are well described by simple dynamic model of the first or second order. The efficacy of PID controllers vastly falls in case of complicated dynamics, nonlinearities, and varying parameters of the plant. This gives a pulse to further researches in the field of PID control. Consequently, the problems of advanced PID control system design methodologies, rules of adaptive PID control, self-tuning procedures, and particularly robustness and transient performance for nonlinear systems, still remain as the areas of the lively interests for many scientists and researchers at the present time. The recent research results presented in this book provide new ideas for improved performance of PID control applications

Methods to improve the reliability and resiliency of near/sub-threshold digital circuits

Energy consumption is one of the primary bottlenecks to both large and small scale modern compute platforms. Reducing the operating voltage of digital circuits to voltages where the supply voltage is near or below the threshold of the transistors has recently gained attention as a method to reduce the energy required for computations by as much as 6 times. However, when operating at near/sub-threshold voltages (where the supply voltage is near or below the threshold of the transistors), imperfections in transistor manufacturing, changes in temperature, and other difficult-to-predict factors cause wide variations in the timing of Complementary Metal-Oxide Semiconductor (CMOS) circuits due to an increased sensitivity at lower voltages. These increased variations result in poor aggregate performance and cause increased rates of error occurrence in computation. This work introduces several new methods to improve the reliability of near/sub-threshold circuits. The first is a design automation technique that is used to aid in low-voltage digital standard cell synthesis. Second, two circuit-level techniques are also introduced that aim to improve the reliability and resiliency of digital circuits by means of completion/error detection. These techniques are shown to improve speed and lower energy consumption at low overheads compared to previous methods. Most importantly, these circuit-level methods are specifically designed to operate at low voltages and can themselves tolerate variations and operation in harsh environments. Finally, a test-chip prototype designed in 65nm-CMOS demonstrates the practicality and feasibility of a proposed current sensing error detector

A Criterion for Designing Emergency Control Schemes to Counteract Communication Failures in Wide-Area Damping Control

© The Authors 2023. This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/Communication failures and transmission delays are two major issues associated with Wide-Area Damping Controllers (WADCs). While transmission delays have been extensively studied and various solutions have been proposed, little research has been done on communication failures and most of the proposed methods are based on preventive controls. However, in today’s liberalized electricity markets, preventive controls are no longer acceptable and the trend is to use emergency controls instead. This paper proposes a novel emergency control scheme to counteract the loss of remote signals related to the input and to the output of the WADC (i.e. sensor and actuator failures). The proposed scheme is based on a simple criterion, which overcomes the complexity of the previous methods. Modal analysis and time domain simulations are performed to verify the performance of the proposed method. The simulation results show that the proposed method performs well in handling communication failures and can maintain good damping performance. This research work is particularly important in view of the trend towards the wide-scale adoption of wide-area measurement technologies, while the vulnerability to cyber-attacks is increasing.Peer reviewe

The Fifth NASA Symposium on VLSI Design

The fifth annual NASA Symposium on VLSI Design had 13 sessions including Radiation Effects, Architectures, Mixed Signal, Design Techniques, Fault Testing, Synthesis, Signal Processing, and other Featured Presentations. The symposium provides insights into developments in VLSI and digital systems which can be used to increase data systems performance. The presentations share insights into next generation advances that will serve as a basis for future VLSI design

Tracking A Nonlinear System Via A Communication Network

In a Networked Control System (NCS), sensors, controller and actuator are connected to the communication network as nodes instead of hardwiring them with point-to-point connection. This system setup has the advantages of low cost, flexibility, less wiring, and the system performance can be remotely controlled from a long distance. Besides a lot of a advantages, a NCS has also shortcomings, induced by the network components, like time delays and data packet loss. Network delays degrade the NCS control performance and destabilize the system. In this thesis, a new tracking control methodology for a special case of nonlinear control systems with time delays induced by inserting the communication network into the forward control loop is presented, which is generated from the use of gain scheduling technique. In this methodology, the design of a gain scheduled tracking controller is based on the use of output feedback control, which also includes designing an estimator for compensating the induced time delays. This methodology is applied to an application of nonlinear systems, that is magnetic ball levitation CE152 and the results showed that the designed controller achieved the desired performance as well as treating the effect of time delays induced by the network

Developments in predictive displays for discrete and continuous tasks

The plan of the thesis is as follows: The introductory chapters review the literature pertaining to human prediction and predictive control models (Chapter 1), and to engineering aspects of predictive displays (Chapter 2). Chapter 3 describes a fundamental study of predictive display parameters in a laboratory scheduling task, Chapter 4 attempts to verify these findings using test data from an actual job shop scheduling problem. Chapter 5 branches into the area of continuous control with a pilot study of predictive displays in a laboratory simulated continuous stirred-tank chemical reactor. Chapter 6 uses the experience gained in the pilot study as the basis for a comprehensive study of predictive display parameters in a further laboratory study of a simplified dual-meter monitoring and control task, and Chapter 7 attempts to test the optimal design in a part-simulated semi-batch chemical reactor using real plant and experienced operators in an industrial setting. The results of the experimental programme are summarized for convenience in Chapter 8. Chapter 9 draws together the threads from the various experiments and discusses the findings in terms of a general hierarchical model of an operator's control and monitoring behaviour. Finally, Chapter 10 presents conclusions and recommendations from the programme of research, together with suggestions for further work