Impact of PWM strategies on RMS current of the DC-link Voltage Capacitor of a dual-three phase drive

The major drawback of usual dual three-phase AC machines, when supplied by a Voltage Source Inverter (VSI), is the occurrence of extra harmonic currents which circulate in the stator windings causing additional losses and constraints on the power component. This paper compares dedicated Pulse Width Modulation (PWM) strategies used for controlling a dual three phase Permanent Magnet Synchronous machine supplied by a six-leg VSI. Since the application is intended for low-voltage (48V) mild-hybrid automotive traction, an additional major constraint arises: the compactness of the drive related to the size of the DC-bus capacitor. Thus, the PWM strategy must be chosen by taking into consideration its impact on both, the motor and the RMS value of DC-bus current

The Essential Role and the Continuous Evolution of Modulation Techniques for Voltage-Source Inverters in the Past, Present, and Future Power Electronics

The cost reduction of power-electronic devices, the increase in their reliability, efficiency, and power capability, and lower development times, together with more demanding application requirements, has driven the development of several new inverter topologies recently introduced in the industry, particularly medium-voltage converters. New more complex inverter topologies and new application fields come along with additional control challenges, such as voltage imbalances, power-quality issues, higher efficiency needs, and fault-tolerant operation, which necessarily requires the parallel development of modulation schemes. Therefore, recently, there have been significant advances in the field of modulation of dc/ac converters, which conceptually has been dominated during the last several decades almost exclusively by classic pulse-width modulation (PWM) methods. This paper aims to concentrate and discuss the latest developments on this exciting technology, to provide insight on where the state-of-the-art stands today, and analyze the trends and challenges driving its future

FPGA-based implementation of the back-EMF symmetric-threshold-tracking sensorless commutation method for brushless DC-machines

The operation of brushless DC permanent-magnet machines requires information of the rotor position to steer the semiconductor switches of the power-supply module which is commonly referred to as Brushless Commutation. Different sensorless techniques have been proposed to estimate the rotor position using current and voltage measurements of the machine. Detection of the back-electromotive force (EMF) zero-crossing moments is one of the methods most used to achieve sensorless control by predicting the commutation moments. Most of the techniques based on this phenomenon have the inherit disadvantage of an indirect detection of commutation moments. This is the result of the commutation moment occurring 30 electrical degrees after the zero-crossing of the induced back-emf in the unexcited phase. Often, the time difference between the zero crossing of the back-emf and the optimal current commutation is assumed constant. This assumption can be valid for steady-state operation, however a varying time difference should be taken into account during transient operation of the BLDC machine. This uncertainty degrades the performance of the drive during transients. To overcome this problem which improves the performance while keeping the simplicity of the back-emf zero-crossing detection method an enhancement is proposed. The proposed sensorless method operates parameterless in a way it uses none of the brushless dc-machine parameters. In this paper different aspects of experimental implementation of the new method as well as various aspects of the FPGA programming are discussed. Proposed control method is implemented within a Xilinx Spartan 3E XC3S500E board

Decoupled digital control of a three-phase four-leg inverter to feed balanced and unbalanced loads

[ES] Este trabajo presenta una estrategia de control digital para inversores trifásicos de cuatro piernas, para cumplir con el requerimiento de normas internacionales de calidad de energía para UPS cuando se alimentan cargas equilibradas y desequilibradas. La estrategia de control propuesta se desarrolla en el marco de referencia dq0 en tiempo discreto, posee un lazo interno para controlar la corriente de los inductores y un lazo externo para controlar la tensión de salida. Se demuestra que utilizando controladores convencionales pueden desacoplarse las variables de los ejes d y q, lo que permite diseñar los controladores del lazo externo de control de tensión como sistemas SISO independientes, cumpliéndose los requerimientos de régimen transitorio y de régimen permanente impuestos por norma. Para mejorar el desempeño del inversor cuando se alimentan cargas desequilibradas, se propone utilizar un controlador Proporcional-Resonante únicamente en el lazo interno del eje 0, lográndose una estrategia de control simple y de bajo costo computacional. Se presentan resultados de simulación y experimentales que permiten validar la estrategia de control propuesta.[EN] This paper presents a digital control strategy for three-phase four-leg inverters to meet the requirements of international power quality standards for UPS, when balanced and unbalanced loads are feeding. The proposed control strategy is developed in the discrete-time dq0-reference frame. It has an inner current loop to control the inductors currents and an outer voltage control loop. The analysis of this paper demonstrates that using conventional controllers, the voltages of d and q axes can be decoupled, into the whole operating range, which allows the outer voltage controllers to be designed as independent SISO systems, meeting the requirements of the transient and permanent regimes imposed by Standards. To improve the performance when the inverter feeds unbalanced loads, this paper proposes to use a Proportional-Resonant controller only in the inner loop of the axis 0, achieving a simple control strategy and, consequently with a low computational cost. Simulation and experimental results allow validating the proposed control strategy.Este trabajo fue soportado por la Secretaría de Ciencia y Técnica de la Universidad Nacional de Río Cuarto (SeCyT, UNRC), la Agencia Nacional de Promoción Científica y Tecnológica (FONCyT) a través del proyecto PICT 1663/2016 y la Red MEIHAPER CYTED.Oggier, E.; Botterón, F.; Oggier, G.; García, G. (2020). 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Analysis and mitigation of dead time harmonics in the single-phase full-bridge PWM converters with repetitive controllers

In order to prevent the power switching devices (e.g., the Insulated-Gate-Bipolar-Transistor, IGBT) from shoot through in voltage source converters during a switching period, the dead time is added either in the hardware driver circuits of the IGBTs or implemented in software in Pulse-Width Modulation (PWM) schemes. Both solutions will contribute to a degradation of the injected current quality. As a consequence, the harmonics induced by the dead time (referred to as "dead time harmonics" hereafter) have to be compensated in order to achieve a satisfactory current quality as required by standards. In this paper, the emission mechanism of dead time harmonics in single-phase PWM inverters is thus presented considering the modulation schemes in details. More importantly, a repetitive controller has been adopted to eliminate the dead time effect in single-phase grid-connected PWM converters. The repetitive controller has been plugged into a proportional resonant-based fundamental current controller so as to mitigate the dead time harmonics and also maintain the control of the fundamental frequency grid current in terms of dynamics. Simulations and experiments are provided, which confirm that the repetitive controller can effectively compensate the dead time harmonics and other low-order distortions, and also it is a simple method without hardware modifications

FPGA implementation of online finite-set model based predictive control for power electronics

Recently there has been an increase in the use of model based predictive control (MBPC) for power-electronic converters. MBPC allows fast and accurate control of multiple controlled variables for hybrid systems such as a power electronic converter and its load. The computational burden for this control scheme however is very high and often restrictive for a good implementation. This means that a suitable technology and design approach should be used. In this paper the implementation of finite-set MBPC (FS-MBPC) in field-programmable gate arrays (FPGAs) is discussed. The control is fully implemented in programmable digital logic by using a high-level design tool. This allows to obtain very good performances (both in control quality, speed and hardware utilization) and have a flexible, modular control configuration. The feasibility and performance of the FPGA implementation of FS-MBPC is discussed in this paper for a 4-level flying-capacitor converter (FCC). This is an interesting application as FS-MBPC allows the simultaneous control of the output current and the capacitor voltages, yet the high number of possible switch states results in a high computational load. The good performance is obtained by exploiting the FPGA’s strong points: parallelism and pipe-lining. In the application discussed in this paper the parallel processing for the three converter phases and a fully pipelined calculation of the prediction stage allow to realize an area-time efficient implementation

Predictive control for active split DC-bus 4-leg inverters

This paper proposes a Predictive Control, formally Dead-Beat (DBC), for a four-leg inverter having an Active Split DC-bus on the fourth leg and LC filters on phase-to-neutral outputs. Such a configuration permits to reduce the voltage ripple on the neutral point connected to inverter grounding. As only few control techniques have been investigated for Active Split DC-bus, the paper proposes to investigate the performance of DBC, which has been widely used for other power electronics applications. The main advantage of DBC over the classical PI or Resonant controller is that no tuning is required for control loop, while obtaining very fast transient response as well it can handle general constrained nonlinear systems with multiple inputs and outputs in a unified and clear manner. These features are highly valuable in power electronic converters used to supply the electrical utility loads in micro-grids. However, one of the main drawback of the DBC is the limited capabilities on harmonics compensations required when supplying unbalanced and non-linear loads. The paper presents continuous-time and discrete-time models of DBC applied to a four-leg VSI with Active Split DC-bus, highlighting the performance through simulation results as well as experimental tests

An area-time efficient FPGA-implementation of online finite-set model based predictive controllers for flying capacitor inverters

Recently there has been an increase in the use of model-based predictive control (MBPC) for power-electronic converters. Especially for flying-capacitor multilevel converters (FCC) this offers an interesting possibility to simultaneously control output current and the capacitor voltages. The computational burden however is very high and often restrictive for a good implementation. In this paper a time and resource efficient design methodology is presented for the FPGA implementation of FCC MBPC. The control is fully implemented in programmable digital logic. Due to a parallel processing for the three converter phases and a fully pipelined calculation of the prediction stage an area-time efficient implementation is realized. Furthermore, this is achieved by using a high-level design tool. The implementation aspects for 3, 4 and 5-level FC inverters are discussed, with a focus on the 4-level case

A Novel Reduced Components Model Predictive Controlled Multilevel Inverter for Grid-Tied Applications

This paper presents an improved single-phase Multilevel Inverter (MLI) which is conceptualized to reduce power switches along with separate DC voltage sources. Compared with recent modular topologies, the proposed MLI employs a reduced number of components. The proposed inverter consists of a combination of two circuits, i.e., the level generation and polarity generation parts. The level generation part is used to synthesize different output voltage levels, while the polarity inversion is performed by a~conventional H-bridge circuit. The performance of the proposed topology has been studied using s single-phase seven-level inverter, which utilizes seven power switches and three independent DC voltage sources. Model Predictive Control (MPC) is applied to inject a sinusoidal current into the utility grid which exhibits low Total Harmonic Distortion (THD). Tests, including a~change in grid current amplitude as well as operation under variation in Power Factor (PF), have been performed to validate the good performance obtained using MPC. The effectiveness of the proposed seven-level inverter has been verified theoretically using MATLAB Simulink. In addition, Real-Time (RT) validation using the dSPACE-CP1103 has been performed to confirm the system performance and system operation using digital platforms. Simulation and RT results show improved THD at 1.23% of injected current

A simple current control strategy for a four-leg indirect matrix converter

In this paper the experimental validation of a predictive current control strategy for a four-leg indirect matrix converter is presented. The four-leg indirect matrix converter can supply energy to an unbalanced three-phase load whilst providing a path for the zero sequence load. The predictive current control technique is based on the optimal selection among the valid switching states of the converter by evaluating a cost function, resulting in a simple approach without the necessity for modulators. Furthermore, zero dc-link current commutation is achieved by synchronizing the state changes in the input stage with the application of a zero voltage space vector in the inverter stage. Simulation results are presented and the strategy is experimentally validated using a laboratory prototype