SVG for Automotive User Interfaces

International audienceIn car cockpits, a wide range of graphic displays, from the low-end multi-functional devices to the most advanced reconfigurable clusters, represent an increasing part of the on-board information systems. We address within the EDONA HMI project the modeling of such human-machine interfaces (HMIs) and the development of an integrated HMI design environment that would improve current development practices. In this article we specifically discuss modeling issues: we explain why the SVG format was selected as the basis of the HMI graphic content description and present domain-specific extensions, mostly related to the HMI functional description, that provide support for a consistent modeling of HMI components

SRAM-Based FPGA Systems for Safety-Critical Applications: A Survey on Design Standards and Proposed Methodologies

As the ASIC design cost becomes affordable only for very large-scale productions, the FPGA technology is currently becoming the leading technology for those applications that require a small-scale production. FPGAs can be considered as a technology crossing between hardware and software. Only a small-number of standards for the design of safety-critical systems give guidelines and recommendations that take the peculiarities of the FPGA technology into consideration. The main contribution of this paper is an overview of the existing design standards that regulate the design and verification of FPGA-based systems in safety-critical application fields. Moreover, the paper proposes a survey of significant published research proposals and existing industrial guidelines about the topic, and collects and reports about some lessons learned from industrial and research projects involving the use of FPGA devices

Exploring formal verification methodology for FPGA-based digital systems.

Abstract Not Provide

Transformations of High-Level Synthesis Codes for High-Performance Computing

Specialized hardware architectures promise a major step in performance and energy efficiency over the traditional load/store devices currently employed in large scale computing systems. The adoption of high-level synthesis (HLS) from languages such as C/C++ and OpenCL has greatly increased programmer productivity when designing for such platforms. While this has enabled a wider audience to target specialized hardware, the optimization principles known from traditional software design are no longer sufficient to implement high-performance codes. Fast and efficient codes for reconfigurable platforms are thus still challenging to design. To alleviate this, we present a set of optimizing transformations for HLS, targeting scalable and efficient architectures for high-performance computing (HPC) applications. Our work provides a toolbox for developers, where we systematically identify classes of transformations, the characteristics of their effect on the HLS code and the resulting hardware (e.g., increases data reuse or resource consumption), and the objectives that each transformation can target (e.g., resolve interface contention, or increase parallelism). We show how these can be used to efficiently exploit pipelining, on-chip distributed fast memory, and on-chip streaming dataflow, allowing for massively parallel architectures. To quantify the effect of our transformations, we use them to optimize a set of throughput-oriented FPGA kernels, demonstrating that our enhancements are sufficient to scale up parallelism within the hardware constraints. With the transformations covered, we hope to establish a common framework for performance engineers, compiler developers, and hardware developers, to tap into the performance potential offered by specialized hardware architectures using HLS

High integrity hardware-software codesign

Programmable logic devices (PLDs) are increasing in complexity and speed, and are being used as important components in safety-critical systems. Methods for developing high-integrity software for these systems are well-known, but this is not true for programmable logic. We propose a process for developing a system incorporating software and PLDs, suitable for safety critical systems of the highest levels of integrity. This process incorporates the use of Synchronous Receptive Process Theory as a semantic basis for specifying and proving properties of programs executing on PLDs, and extends the use of SPARK Ada from a programming language for safety-critical systems software to cover the interface between software and programmable logic. We have validated this approach through the specification and development of a substantial safety-critical system incorporating both software and programmable logic components, and the development of tools to support this work. This enables us to claim that the methods demonstrated are not only feasible but also scale up to realistic system sizes, allowing development of such safety-critical software-hardware systems to the levels required by current system safety standards

Agent and cyber-physical system based self-organizing and self-adaptive intelligent shopfloor

The increasing demand of customized production results in huge challenges to the traditional manufacturing systems. In order to allocate resources timely according to the production requirements and to reduce disturbances, a framework for the future intelligent shopfloor is proposed in this paper. The framework consists of three primary models, namely the model of smart machine agent, the self-organizing model, and the self-adaptive model. A cyber-physical system for manufacturing shopfloor based on the multiagent technology is developed to realize the above-mentioned function models. Gray relational analysis and the hierarchy conflict resolution methods were applied to achieve the self-organizing and self-adaptive capabilities, thereby improving the reconfigurability and responsiveness of the shopfloor. A prototype system is developed, which has the adequate flexibility and robustness to configure resources and to deal with disturbances effectively. This research provides a feasible method for designing an autonomous factory with exception-handling capabilities

Constructivist Multi-Access Lab Approach in Teaching FPGA Systems Design with LabVIEW

Embedded systems play vital role in modern applications [1]. They can be found in autos, washing machines, electrical appliances and even in toys. FPGAs are the most recent computing technology that is used in embedded systems. There is an increasing demand on FPGA based embedded systems, in particular, for applications that require rapid time responses. Engineering education curricula needs to respond to the increasing industrial demand of using FPGAs by introducing new syllabus for teaching and learning this subject. This paper describes the development of new course material for teaching FPGA-based embedded systems design by using ‘G’ Programming Language of LabVIEW. A general overview of FPGA role in engineering education is provided. A survey of available Hardware Programming Languages for FPGAs is presented. A survey about LabVIEW utilization in engineering education is investigated; this is followed by a motivation section of why to use LabVIEW graphical programming in teaching and its capabilities. Then, a section of choosing a suitable kit for the course is laid down. Later, constructivist closed-loop model the FPGA course has been proposed in accordance with [2- 4; 80,86,89,92]. The paper is proposing a pedagogical framework for FPGA teaching; pedagogical evaluation will be conducted in future studies. The complete study has been done at the Faculty of Electrical and Electronic Engineering, Aleppo University

Teaching embedded systems engineering in a software-oriented computing degree

Traditional software-oriented computing degrees do not include courses on embedded systems design in their syllabus, since in the past embedded applications were seen as small-sized solutions developed without the need of engineering approaches. This reality has dramatically changed in the last decade and nowadays several embedded systems are quite complex. Embedded systems present several idiosyncrasies that make their development more difficult and complex than desktop solutions, namely when considering non-functional requirements, time-related deadlines, or the correctness of the solution. To be well prepared for their professions, students of software-oriented computing degrees must acquire skills and competencies in embedded systems engineering. Being able to master high-level programming languages and to develop solutions only for desktop computers means that the students cannot consider numerous opportunities, after graduation. This paper discusses which topics in embedded software design to include in a second cycle degree on Software Engineering that was structured to consider the Bologna Declaration that is now being used in Europe to recast all university degrees. The syllabus of a 15-ECTS module dedicated to teach the fundamental concepts of embedded systems engineering and embedded software development is also described

Targeting Reconfigurable FPGA based SoCs using the MARTE UML profile: from high abstraction levels to code generation

International audienceAs SoC design complexity is escalating to new heights, there is a critical need to find adequate approaches and tools to handle SoC co-design aspects. Additionally, modern reconfigurable SoCs offer advantages over classical SoCs as they integrate adaptivity features to cope with mutable design requirements and environment needs. This paper presents a novel approach to address system adaptivity and reconfigurability. A generic model of reactive control is presented in a SoC codesign framework: Gaspard. Afterwards, control integration at different levels of the framework is illustrated for both functional specification and FPGA synthesis. The presented work is based on Model-Driven Engineering and the UML MARTE profile proposed by Object Management Group, for modeling and analysis of real-time embedded systems. The paper thus presents a complete design flow to move from high level MARTE models to code generation, for implementation of dynamically reconfigurable SoCs

Synchronous design of avionic applications based on model refinements

International audienceIn this article, we address the design of avionic applications based on an approach, which relies on model refinement. This study is done within the synchronous framework, which has solid mathematical foundations enabling formal methods for specification, verification and analysis, transformations, etc. In the proposed approach, we first consider a functional description of a given application using the SIGNAL language. This description is independent of a specific implementation platform. Then, some transformations that fully preserve the semantics of manipulated SIGNAL programs are applied to the description such that a representation reflecting an integrated modular avionics architecture results