78 research outputs found

    Imagined futures of work in the making: the politics of platform workers’ contract classification in Denmark, France, Italy, and the Netherlands

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    A vibrant debate on the digitalisation of the economy has taken place over the last decade. Among the various manifestations of digitalisation, the rise of platform companies has divided scholars over whether a ‘platformised’ future of work would be desirable. The contract classification of platform workers, i.e. whether they should qualify as independent contractors or employees, has been among the top-debated issues. While some have stressed that coverage of freelancer platform workers should be strengthened regardless of their contract classification, others have highlighted how platform work has all the features of dependent work and should therefore qualify as such. Various national regulatory processes resulted in numerous statutory measures and collective agreements. Starting from these developments, and unsatisfied with existing institutionalist accounts of platform work regulation, this dissertation asks two research questions: i) How have national actors problematised and responded to the question of platform workers’ contract classification? ii) What were the drivers of such problematisation and responses? To address such queries, this thesis investigates the politics of platform workers’ contract classification by concentrating on i) the (evolution of) actors’ positions, ii) the building of actor coalitions, iii) the content of regulatory measures in cases they were adopted. It focuses on four actor types, namely governments, social partners, platforms, and independent platform worker organisations. It adopts a qualitative comparative case-study design to study the cases of Denmark, France, Italy and the Netherlands. Such countries represent different ‘varieties of liberalisation’: ‘dualisation’ countries (France – Italy), ‘embedded flexibilisation’ countries (Denmark – Netherlands). Methodologically, this work combines 68 semi-structured elite interviews with selected policy documents and quality newspaper articles. Data was analysed through a thematic analysis using MAXQDA software. Theoretically, an ‘Imaginative Institutional Work’ approach is developed. Such an approach adopts the concept of ‘institutional work’ to understand how ‘uncertain’ actors affect institutions. In this work, institutions are the rules linking contract classification and employment/social protection. To account for the drivers of such an institutional work, this work theorizes learning mechanisms of three kinds, i.e. ‘learning by puzzling’, ‘learning by experimenting’, and ‘learning by researching’. In turn, such mechanisms are conceived of as cognitively bounded by ‘imagined futures’, i.e. expectations on future states of the world. Thus, this dissertation unveils institutional work objectives and practices and associated learning mechanisms that have shaped the rules linking contract classification and employment/social protection. Further, it finds that learning mechanisms were anchored in three ‘imagined futures of work’, i.e. ‘Start-up Nation’, ‘Creative digitalisation’, and ‘Embedded digitalisation’. While the ‘start-up nation’ future was especially relevant in France and to some extent in the Netherlands, ‘creative digitalisation’, and ‘embedded digitalisation’ were prominent in the Italian, Danish and Dutch cases. This shows how processes of imaginative institutional work were often not in line with expectations deriving from the variety of liberalisation profile of selected countries. More broadly, this thesis contributes to the understanding of how the implications of technology are socially shaped by providing a fine-grained account of how future-oriented actors affect the rules governing the use of such a technology. In so doing, actors do not merely enact institutional dictates. Rather, they creatively navigate the uncharted waters of novel technologies, seeking to realize their preferred ‘imagined futures of work’

    1986 July, Memphis State University bulletin

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    Vol. 75, No. 2 of the Memphis State University bulletin containing the graduate catalog of 1986-87, 1986 July.https://digitalcommons.memphis.edu/speccoll-ua-pub-bulletins/1163/thumbnail.jp

    1987 July, Memphis State University bulletin

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    Vol. 76, No. 4 of the Memphis State University bulletin containing the graduate catalog for 1987-88, 1987 July.https://digitalcommons.memphis.edu/speccoll-ua-pub-bulletins/1165/thumbnail.jp

    1985 July, Memphis State University bulletin

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    Vol. 74, No. 2 of the Memphis State University buleltin containing the graduate catalog for 1985-86, 1985.https://digitalcommons.memphis.edu/speccoll-ua-pub-bulletins/1161/thumbnail.jp

    An experiment in high-level microprogramming

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    This thesis describes an experiment in developing a true high-level microprogramming language for the Burroughs B1700 series of computers. Available languages for machine description both at a behavioural level and at a microprogramming level are compared and the conclusion drawn that none were suitable for our purpose and that it was necessary to develop a new language which we call SUILVEN. SUILVEN is a true high-level language with no machine-dependent features. It permits the exact specification of the size of abstract machine data areas (via the BITS declaration) and allows the user to associate structure with these data areas (via the TEMPLATE declaration), SUILVEN only permits the use of structured control statements (if-then-else, while-do etc.) - the go to statement is not a feature of the language. SUILVEN is compiled into microcode for the B1700 range of machines. The compiler is written in SNOBOL4 and uses a top-down recursive descent analysis technique, using abstract machines for PASCAL and the locally developed SASL, SUILVEN was compared with other high and low level languages. The conclusions drawn from this comparison were as follows: - (i) SUILVEN was perfectly adequate for describing simple S-machines (ii) SUILVEN lacked certain features for describing higher-level machines (iii) The needs of a machine description language and a microprogram implementation language are different and that it is unrealistic to attempt to combine these in a single language

    Ramrod: an experimental multi-microprocessor

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    The computer architect of the 80's races apparently intractable dilemma: Computer manufacturers have to contend with the soaring costs incurred in producing custom-made chips, and would prefer to use commercially-available, state-of-the art, large-scale integrated circuits. Product users, however demand highly reliable, realistically- priced systems which are nevertheless flexible enough to meet changing needs

    A machine-independent microprogram development system

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    The aims of this project are twofold. They are firstly, to implement a microprogram development system that allows the programmer to write microcode for any microprogrammable machine, and secondly, to build a microprogrammable machine, incorporating the user friendliness of a simulator, while still providing the 'hands on' experience obtained actual hardware. Microprogram development involves a two stage process. The first step is to describe the target machine, using format descriptions and mnemonic-based template definitions. The second stage involves using the defined mnemonics to write the microcodes for the target machine. This includes an assembly phase to translate the mnemonics into the binary microinstructions. Three main components constitute the microprogrammable machine. The Arithmetic and Logic Unit (ALU) is built using chips from Advanced Micro Devices' Am29ØØ bit-slice family, the action of the Microprogram Control Unit (MCU) is simulated by software running on an IBM Personal Computer, and a section of the IBM PC's main memory acts as the Control Store (CS) for the system. The ALU is built on a prototyping card that plugs into one of the slots on the IBM PC's mother board. A hardware simulator program, that produces the effect of the ALU, has also been developed. A small assembly language has been developed using the system, to test the various functions of the system. A mini-assembler has also been written to facilitate assembly of the above language. A group of honours students at Rhodes University tested the microprogram development system. Their ideas and suggestions have been tabulated in this report and some of them have been used to enhance the system's performance. The concept of allowing 'inline' microinstructions in the macroprogram is also investigated in this report and a method of implementing this is shown

    A Finite Domain Constraint Approach for Placement and Routing of Coarse-Grained Reconfigurable Architectures

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    Scheduling, placement, and routing are important steps in Very Large Scale Integration (VLSI) design. Researchers have developed numerous techniques to solve placement and routing problems. As the complexity of Application Specific Integrated Circuits (ASICs) increased over the past decades, so did the demand for improved place and route techniques. The primary objective of these place and route approaches has typically been wirelength minimization due to its impact on signal delay and design performance. With the advent of Field Programmable Gate Arrays (FPGAs), the same place and route techniques were applied to FPGA-based design. However, traditional place and route techniques may not work for Coarse-Grained Reconfigurable Architectures (CGRAs), which are reconfigurable devices offering wider path widths than FPGAs and more flexibility than ASICs, due to the differences in architecture and routing network. Further, the routing network of several types of CGRAs, including the Field Programmable Object Array (FPOA), has deterministic timing as compared to the routing fabric of most ASICs and FPGAs reported in the literature. This necessitates a fresh look at alternative approaches to place and route designs. This dissertation presents a finite domain constraint-based, delay-aware placement and routing methodology targeting an FPOA. The proposed methodology takes advantage of the deterministic routing network of CGRAs to perform a delay aware placement
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