A Scalable Four-Channel Frequency-Division Multiplexing MIMO Radar Utilizing Single-Sideband Delta-Sigma Modulation

A scalable four-channel multiple-input multiple-output (MIMO) radar that features a modular system architecture and a novel frequency-division multiplexing approach is presented in this article. It includes a single 30-GHz voltage-controlled oscillator (VCO) for the local oscillator signal generation, four cascaded 120-GHz transceivers with a frequency quadrupler, and on-board differential series-fed patch antennas. The utilized uniform antenna configuration results in 16 virtual array elements and enables an angular resolution of 6.2°. The vector modulators in the transmit (TX) paths allow the application of complex bit streams of second-order delta-sigma modulators easily generated on a field-programmable gate array (FPGA) to implement single-sideband (SSB) modulation on the TX signals resulting in orthogonal waveforms for the MIMO operation. Only one phase-locked loop and no digital-To-Analog converter is required. The waveform diversity also allows the simultaneous transmission of the TX signals to reduce the measurement time. The application of the SSB modulation on the frequency-modulated continuous-wave MIMO radar requires only half of the intermediate frequency bandwidth compared with the double-sideband modulation. The issue of the phase and amplitude mismatches at the virtual array elements due to the scalable radar architecture is addressed and a calibration solution is introduced in this article. Radar measurements using different numbers of virtual array elements were compared and the digital-beamforming method was applied to the results to create 2-D images. © 1963-2012 IEEE

A VHDL-AMS Simulation Environment for an UWB Impulse Radio Transceiver

Ultra-Wide-Band (UWB) communication based on the impulse radio paradigm is becoming increasingly popular. According to the IEEE 802.15 WPAN Low Rate Alternative PHY Task Group 4a, UWB will play a major role in localization applications, due to the high time resolution of UWB signals which allow accurate indirect measurements of distance between transceivers. Key for the successful implementation of UWB transceivers is the level of integration that will be reached, for which a simulation environment that helps take appropriate design decisions is crucial. Owing to this motivation, in this paper we propose a multiresolution UWB simulation environment based on the VHDL-AMS hardware description language, along with a proper methodology which helps tackle the complexity of designing a mixed-signal UWB System-on-Chip. We applied the methodology and used the simulation environment for the specification and design of an UWB transceiver based on the energy detection principle. As a by-product, simulation results show the effectiveness of UWB in the so-called ranging application, that is the accurate evaluation of the distance between a couple of transceivers using the two-way-ranging metho

Multirate cascaded discrete-time low-pass ΔΣ modulator for GSM/Bluetooth/UMTS

This paper shows that multirate processing in a cascaded discrete-time ΔΣ modulator allows to reduce the power consumption by up to 35%. Multirate processing is possible in a discrete-time ΔΣ modulator by its adaptibility with the sampling frequency. The power reduction can be achieved by relaxing the sampling speed of the first stage and increasing it appropriately in the second stage. Furthermore, a cascaded ΔΣ modulator enables the power efficient implementation of multiple communication standards.@The advantages of multirate cascaded ΔΣ modulators are demonstrated by comparing the performance of single-rate and multirate implementations using behavioral-level and circuit-level simulations. This analysis has been further validated with the design of a multirate cascaded triple-mode discrete-time ΔΣ modulator. A 2-1 multirate low-pass cascade, with a sampling frequency of 80 MHz in the first stage and 320 MHz in the second stage, meets the requirements for UMTS. The first stage alone is suitable for digitizing Bluetooth and GSM with a sampling frequency of 90 and 50 MHz respectively. This multimode ΔΣ modulator is implemented in a 1.2 V 90 nm CMOS technology with a core area of 0.076 mm2. Measurement results show a dynamic range of 66/77/85 dB for UMTS/ Bluetooth/GSM with a power consumption of 6.8/3.7/3.4 mW. This results in an energy per conversion step of 1.2/0.74/2.86 pJ

Radio-Communications Architectures

Wireless communications, i.e. radio-communications, are widely used for our different daily needs. Examples are numerous and standard names like BLUETOOTH, WiFI, WiMAX, UMTS, GSM and, more recently, LTE are well-known [Baudoin et al. 2007]. General applications in the RFID or UWB contexts are the subject of many papers. This chapter presents radio-frequency (RF) communication systems architecture for mobile, wireless local area networks (WLAN) and connectivity terminals. An important aspect of today's applications is the data rate increase, especially in connectivity standards like WiFI and WiMAX, because the user demands high Quality of Service (QoS). To increase the data rate we tend to use wideband or multi-standard architecture. The concept of software radio includes a self-reconfigurable radio link and is described here on its RF aspects. The term multi-radio is preferred. This chapter focuses on the transmitter, yet some considerations about the receiver are given. An important aspect of the architecture is that a transceiver is built with respect to the radio-communications signals. We classify them in section 2 by differentiating Continuous Wave (CW) and Impulse Radio (IR) systems. Section 3 is the technical background one has to consider for actual applications. Section 4 summarizes state-of-the-art high data rate architectures and the latest research in multi-radio systems. In section 5, IR architectures for Ultra Wide Band (UWB) systems complete this overview; we will also underline the coexistence and compatibility challenges between CW and IR systems

SiGe EAM-based transceivers for datacenter interconnects and radio over fiber

Silicon photonics is a key-enabling technology leveraging decades of effort and infrastructure of the microelectronics CMOS industry resulting in high yield, low cost and potential high volume manufacturing. Furthermore, due to the high index contrast of the platform, very compact, high-complexity photonic integrated circuits can be devised. To benefit from these advantages, high-speed modulators should also be compatible with silicon technology. In this respect, SiGe electro-absorption modulators (EAM) are considered as a promising candidate since they are CMOS-compatible and offer high-speed, compact, low-loss and low-power modulation. In this paper, we discuss SiGe EAM-based transceivers for next-generation datacenter interconnects (DCI) and radio-over-fiber (RoF) fronthaul in next-generation cellular networks

Quadrature sigma-delta modulators for reconfigurable A/D interface and dynamic spectrum access: analysis, design principles and digital post-processing

In the course of development of wireless communications and its modern applications, such as cloud technologies and increased consumption and sharing of multimedia, the radio spectrum has become increasingly congested. However, temporarily and spatially underused spectrum exists at the same time. For increasing the efficiency of spectrum usage, the concept of dynamic spectrum access (DSA) has been proposed. Ultimately, the DSA principle should be exploited also in cognitive radio (CR) receivers. Herein, this paradigm is approached from the receiver architecture point-of-view, considering software-defined radio (SDR) as a platform for the future DSA and CR devices. Particularly, an analog-to-digital converter (ADC) architecture exploiting quadrature ΣΔ modulator (QΣΔM) is studied in detail and proposed as a solution for the A/D interface, being identified as a performance bottleneck in SDRs. By exploiting a complex valued noise transfer function (NTF) enabled by the QΣΔM, the quantization precision of the ADC can be efficiently and flexibly focused on the frequency channels and the signals to be received and detected. At the same time, with a traditional non-noise-shaping ADC, the precision is distributed equally for the whole digitized frequency band containing also noninteresting signals. With a single QΣΔM, it is also possible to design a multiband NTF, allowing reception of multiple noncontiguous frequency channels without parallel receiver chains. Furthermore, with the help of digital control, the QΣΔM response can be reconfigured during operation. These capabilities fit in especially well with the above mentioned DSA and CR schemes, where the temporarily and spatially available channels might be scattered in frequency. From the implementation point-of-view, the effects of inherent implementation inaccuracies in the QΣΔM design need to be thoroughly understood. In this thesis, novel closed-form matrix-algebraic expressions are presented for analyzing the transfer functions of a general multistage QΣΔM with arbitrary number of arbitrary-order stages. Altogether, the signal response of an I/Q mismatched QΣΔM has four components. These are the NTF, an image noise transfer function, a signal transfer function (STF) and an image signal transfer function. The image transfer functions are provoked by the I/Q mismatches and define the frequency profile of the generated mirror-frequency interference (MFI), potentially deteriorating the quality of the received signal. This contribution of the thesis increases the understanding of different QΣΔM structures and allows the designers to study the effects of the implementation inaccuracies in closed form. In order to mitigate the MFI and improve the signal reception, a mirror-frequency rejecting STF design is proposed herein. This design is found to be effective against I/Q mismatches taking place in the feedback branches of the QΣΔM. This is shown with help of the closed-form analysis and confirmed with computer simulations on realistic reception scenarios. When a mismatch location independent MFI suppression is the desired option, it is a logical choice to do this processing in a digital domain, after the whole analog receiver front-end. However, this sets demands for the information to be digitized, i.e., the source of the MFI should be available also in the digital domain. For this purpose, a novel multiband transfer function design is proposed herein. In addition, a QΣΔM specific digital MFI compensation algorithm is developed. The compensation performance is illustrated in practical single- and multiband reception scenarios, considering desired signal bandwidths up to 20 MHz. In the multiband scenario, allowing reception and detection of noncontiguous frequency channels with a single receiver chain, the digital compensation processing is done sub-bandwise, securing reliable functionality also under strongly frequency-selective interference. In the applied single- and multistage QΣΔM architectures, the I/Q mismatches are considered in all the QΣΔM branches as well as in the preceding receiver front-end, modeling the challenging and realistic scenario where the whole receiver chain includes cascaded in-phase/quadrature (I/Q) mismatch sources. As a whole, developing digital MFI compensation is a significant step towards practical receiver implementations with QΣΔM ADCs. In consequence, this allows the exploitation of the multiband and reconfigurability properties. The proposed design can be implemented without additional analog components and is straightforwardly reconfigurable in dynamic signal conditions typical for DSA and CR systems, e.g., in case of frequency hand-off because of a primary user appearance. In addition, the digital post-compensation of the MFI eases the strict demands for the matching of the analog circuits in SDRs

Doctor of Philosophy

dissertationSince the late 1950s, scientists have been working toward realizing implantable devices that would directly monitor or even control the human body's internal activities. Sophisticated microsystems are used to improve our understanding of internal biological processes in animals and humans. The diversity of biomedical research dictates that microsystems must be developed and customized specifically for each new application. For advanced long-term experiments, a custom designed system-on-chip (SoC) is usually necessary to meet desired specifications. Custom SoCs, however, are often prohibitively expensive, preventing many new ideas from being explored. In this work, we have identified a set of sensors that are frequently used in biomedical research and developed a single-chip integrated microsystem that offers the most commonly used sensor interfaces, high computational power, and which requires minimum external components to operate. Included peripherals can also drive chemical reactions by setting the appropriate voltages or currents across electrodes. The SoC is highly modular and well suited for prototyping in and ex vivo experimental devices. The system runs from a primary or secondary battery that can be recharged via two inductively coupled coils. The SoC includes a 16-bit microprocessor with 32 kB of on chip SRAM. The digital core consumes 350 μW at 10 MHz and is capable of running at frequencies up to 200 MHz. The integrated microsystem has been fabricated in a 65 nm CMOS technology and the silicon has been fully tested. Integrated peripherals include two sigma-delta analog-to-digital converters, two 10-bit digital-to-analog converters, and a sleep mode timer. The system also includes a wireless ultra-wideband (UWB) transmitter. The fullydigital transmitter implementation occupies 68 x 68 μm2 of silicon area, consumes 0.72 μW static power, and achieves an energy efficiency of 19 pJ/pulse at 200 MHz pulse repetition frequency. An investigation of the suitability of the UWB technology for neural recording systems is also presented. Experimental data capturing the UWB signal transmission through an animal head are presented and a statistical model for large-scale signal fading is developed

Software-Defined Radio Demonstrators: An Example and Future Trends

Software-defined radio requires the combination of software-based signal processing and the enabling hardware components. In this paper, we present an overview of the criteria for such platforms and the current state of development and future trends in this area. This paper will also provide details of a high-performance flexible radio platform called the maynooth adaptable radio system (MARS) that was developed to explore the use of software-defined radio concepts in the provision of infrastructure elements in a telecommunications application, such as mobile phone basestations or multimedia broadcasters

Design and analysis of optimized CORDIC based GMSK system on FPGA platform

The Gaussian minimum shift keying (GMSK) is one of the best suited digital modulation schemes in the global system for mobile communication (GSM) because of its constant envelop and spectral efficiency characteristics. Most of the conventional GMSK approaches failed to balance the digital modulation with efficient usage of spectrum. In this article, the hardware architecture of the optimized CORDIC-based GMSK system is designed, which includes GMSK Modulation with the channel and GMSK Demodulation. The modulation consists of non-return zero (NRZ) encoder, an integrator followed by Gaussian filtering and frequency modulation (FM). The GMSK demodulation consists of FM demodulator, followed by differentiation and NRZ decoder. The FM Modulation and demodulation use the optimized CORDIC model for an In-phase (I) and quadrature (Q) phase generation. The optimized CORDIC is designed by using quadrant mapping and pipelined structure to improve the hardware and computational complexity in GMSK systems. The GMSK system is designed on the Xilinx platform and implemented on Artix-7 and Spartan-3EFPGA. The hardware constraints like area, power, and timing utilization are summarized. The comparison of the optimized CORDIC model with similar CORDIC approaches is tabulated with improvements