High Performance Low Voltage Power Mosfet For High-frequency Synchronous Buck Converters

Power management solutions such as voltage regulator (VR) mandate DC-DC converters with high power density, high switching frequency and high efficiency to meet the needs of future computers and telecom equipment. The trend towards DC-DC converters with higher switching frequency presents significant challenges to power MOSFET technology. Optimization of the MOSFETs plays an important role in improving low-voltage DC-DC converter performance. This dissertation focuses on developing and optimizing high performance low voltage power MOSFETs for high frequency applications. With an inherently large gate charge, the trench MOSFET suffers significant switching power losses and cannot continue to provide sufficient performance in high frequency applications. Moreover, the influence of parasitic impedance introduced by device packaging and PCB assembly in board level power supply designs becomes more pronounced as the output voltage continues to decrease and the nominal current continues to increase. This eventually raises the need for highly integrated solutions such as power supply in package (PSiP) or on chip (PSoC). However, it is often more desirable in some PSiP architectures to reverse the source/drain electrodes from electrical and/or thermal point of view. In this dissertation, a stacked-die Power Block PSiP architecture is first introduced to enable DC-DC buck converters with a current rating up to 40 A and a switching frequency in the MHz range. New high- and low-side NexFETs are specially designed and optimized for the new PSiP architecture to maximize its efficiency and power density. In particular, a new NexFET structure with iv its source electrode on the bottom side of the die (source-down) is designed to enable the innovative stacked-die PSiP technology with significantly reduced parasitic inductance and package footprint. It is also observed that in synchronous buck converter very fast switching of power MOSFETs sometimes leads to high voltage oscillations at the phase node of the buck converter, which may introduce additional power loss and cause EMI related problems and undesirable electrical stress to the power MOSFET. At the same time, the synchronous MOSFET plays an important role in determining the performance of the synchronous buck converter. The reverse recovery of its body diode and the Cdv/dt induced false trigger-on are two major mechanisms that impact the performance of the SyncFET. This dissertation introduces a new approach to effectively overcome the aforementioned challenges associated with the state-of-art technology. The threshold voltage of the low-side NexFET is intentionally reduced to minimize the conduction and body diode related power losses. Meanwhile, a monolithically integrated gate voltage pull-down circuitry is proposed to overcome the possible Cdv/dt induced turn-on issue inadvertently induced by the low VTH SynFET. Through extensive modeling and simulation, all these innovative concepts are integrated together in a power module and fabricated with a 0.35µm process. With all these novel device technology improvements, the new power module delivers a significant improvement in efficiency and offers an excellent solution for future high frequency, high current density DC-DC converters. Megahertz operation of a Power v Block incorporating these new device techniques is demonstrated with an excellent efficiency observed

Analogue micropower FET techniques review

A detailed introduction to published analogue circuit design techniques using Si and Si/SiGe FET devices for very low-power applications is presented in this review. The topics discussed include sub-threshold operation in FET devices, micro-current mirrors and cascode techniques, voltage level-shifting and class-AB operation, the bulk-drive approach, the floating-gate method, micropower transconductance-capacitance and log-domain filters and strained-channel FET technologies

Reliability-Oriented Strategies for Multichip Module Based Mission Critical Industry Applications

The availability is defined as the portion of time the system remains operational to serve its purpose. In mission critical applications (MCA), the availability of power converters are determinant to ensure continue productivity and avoid financial losses. Multichip Modules (MCM) are widely adopted in such applications due to the high power density and reduced price; however, the high number of dies inside a compact package results in critical thermal deviations among them. Moreover, uneven power flow, inhomogeneous cooling and accumulated degradation, potentially result in thermal deviation among modules, thereby increasing the temperature differences and resulting in extra temperature in specific subset of devices. High temperatures influences multiple failure mechanisms in power modules, especially in highly dynamic load profiles. Therefore, the higher failure probability of the hottest dies drastically reduces the reliability of mission critical power converters. Therefore, this work investigate reliability-oriented solutions for the design and thermal management of MCM-based power converters applied in mission critical applications. The first contribution, is the integration of a die-level thermal and probabilistic analysis on the design for reliability (DFR) procedure, whereby the temperature and failure probability of each die are taken into account during the reliability modeling. It is demonstrated that the dielevel analysis can obtain more realistic system-level reliability of MCM-based power converters. Thereafter, three novel die-level thermal balancing strategies, based on a modified MCM - with more gate-emitter connections - are proposed and investigated. It is proven that the temperatures inside the MCM can be overcame, and the maximum temperate reduced in up to 8 %

In situ diagnostics and prognostics of wire bonding faults in IGBT modules for electric vehicle drives

This paper presents a diagnostic and prognostic condition monitoring method for insulated-gate bipolar transistor (IGBT) power modules for use primarily in electric vehicle applications. The wire-bond-related failure, one of the most commonly observed packaging failures, is investigated by analytical and experimental methods using the on-state voltage drop as a failure indicator. A sophisticated test bench is developed to generate and apply the required current/power pulses to the device under test. The proposed method is capable of detecting small changes in the failure indicators of the IGBTs and freewheeling diodes and its effectiveness is validated experimentally. The novelty of the work lies in the accurate online testing capacity for diagnostics and prognostics of the power module with a focus on the wire bonding faults, by injecting external currents into the power unit during the idle time. Test results show that the IGBT may sustain a loss of half the bond wires before the impending fault becomes catastrophic. The measurement circuitry can be embedded in the IGBT drive circuits and the measurements can be performed in situ when the electric vehicle stops in stop-and-go, red light traffic conditions, or during routine servicing

Design and analysis of SRAMs for energy harvesting systems

PhD ThesisAt present, the battery is employed as a power source for wide varieties of microelectronic systems ranging from biomedical implants and sensor net-works to portable devices. However, the battery has several limitations and incurs many challenges for the majority of these systems. For instance, the design considerations of implantable devices concern about the battery from two aspects, the toxic materials it contains and its lifetime since replacing the battery means a surgical operation. Another challenge appears in wire-less sensor networks, where hundreds or thousands of nodes are scattered around the monitored environment and the battery of each node should be maintained and replaced regularly, nonetheless, the batteries in these nodes do not all run out at the same time. Since the introduction of portable systems, the area of low power designs has witnessed extensive research, driven by the industrial needs, towards the aim of extending the lives of batteries. Coincidentally, the continuing innovations in the field of micro-generators made their outputs in the same range of several portable applications. This overlap creates a clear oppor-tunity to develop new generations of electronic systems that can be powered, or at least augmented, by energy harvesters. Such self-powered systems benefit applications where maintaining and replacing batteries are impossi-ble, inconvenient, costly, or hazardous, in addition to decreasing the adverse effects the battery has on the environment. The main goal of this research study is to investigate energy harvesting aware design techniques for computational logic in order to enable the capa- II bility of working under non-deterministic energy sources. As a case study, the research concentrates on a vital part of all computational loads, SRAM, which occupies more than 90% of the chip area according to the ITRS re-ports. Essentially, this research conducted experiments to find out the design met-ric of an SRAM that is the most vulnerable to unpredictable energy sources, which has been confirmed to be the timing. Accordingly, the study proposed a truly self-timed SRAM that is realized based on complete handshaking protocols in the 6T bit-cell regulated by a fully Speed Independent (SI) tim-ing circuitry. The study proved the functionality of the proposed design in real silicon. Finally, the project enhanced other performance metrics of the self-timed SRAM concentrating on the bit-line length and the minimum operational voltage by employing several additional design techniques.Umm Al-Qura University, the Ministry of Higher Education in the Kingdom of Saudi Arabia, and the Saudi Cultural Burea

Dispositifs innovants à pente sous le seuil abrupte (du TEFT au Z -FET)

Tunnel à effet de champ (TFET) et un nouveau composant MOS à rétroaction que nous avons nommé le Z2-FET.Le Z2-FET est envisagé pour la logique faible consommation et pour les applications mémoire compatibles avecles technologies CMOS avancées. Nous avons étudié de manière systématique des TFETs avec différents oxydesde grille, matériaux et structures de canal, fabriqués sur silicium sur isolant totalement déserté (FDSOI). Lesmesures de bruit à basse fréquence (LFN) sur TFETs montrent la prédominance d'un signal aléatoiretélégraphique (RTS), qui révèle sans ambiguïté le mécanisme d effet tunnel. Un modèle analytique combinantl effet tunnel et le transport dans le canal a été développé, montrant un bon accord entre les résultatsexpérimentaux et les simulations.Nous avons conçu et démontré un nouveau dispositif (Z2-FET, pour pente sous le seuil verticale et zéroionisation par impact), qui présente une commutation extrêmement abrupte (moins de 1 mV par décade decourant), avec un rapport ION / IOFF >109, un large effet de hystérésis et un potentiel de miniaturisation jusqu'à 20nm. La simulation TCAD a été utilisée pour confirmer que la commutation électrique du Z2-FET fonctionne parl'intermédiaire de rétroaction entre les flux des électrons et trous et leurs barrières d'injection respectives. LeZ2-FET est idéalement adapté pour des applications mémoire à un transistor. La mémoire DRAM basée sur leZ2-FET montre des performances très bonnes, avec des tensions d'alimentation jusqu'à 1,1 V, des temps derétention jusqu'à 5,5 s et des vitesses d'accès atteignant 1 ns. Une mémoire SRAM utilisant un seul Z -FET estégalement démontrée sans nécessité de rafraichissement de l information stockée.Notre travail sur le courant GIDL intervenant dans les MOSFETs de type FDSOI a été combiné avec leTFET afin de proposer une nouvelle structure de TFETs optimisés, basée sur l'amplification bipolaire du couranttunnel. Les simulations de nouveau dispostif à injection tunnel amélioré par effet bipolaire (BET-FET) montrentdes résultats prometteurs, avec des ION supérierus à 4mA/ m et des pentes sous le seuil SS inférieures à 60mV/dec sur plus de sept décades de courant, surpassant tous les TFETs silicium rapportés à ce jour.La thèse se conclut par les directions de recherche futures dans le domaine des dispositifs à pente sous leseuil abrupte.This thesis is dedicated to studying sharp switching devices, including the tunneling field-effect-transistor(TFET) and a new feedback device we have named the Z2-FET, for low power logic and memory applicationscompatible with modern silicon technology. We have extensively investigated TFETs with various gate oxides,channel materials and structures, fabricated on fully-depleted silicon-on-insulator (FD-SOI) substrates.Low-frequency noise (LFN) measurements were performed on TFETs, showing the dominance of randomtelegraphy signal (RTS) noise, which reveals the tunneling mechanism. An analytical TFET model combiningtunneling and channel transport has been developed, showing agreement with the experimental and simulationresults.We also conceived and demonstrated a new device named the Z2-FET (for zero subthreshold swing andzero impact ionization), which exhibits extremely sharp switching with subthreshold swing SS 4.10-3 A/ mand SS < 60 mV/dec over 7 decades of current, outperforming all silicon-compatible TFETs reported to date.The thesis concludes with future research directions in the sharp-switching device arena.SAVOIE-SCD - Bib.électronique (730659901) / SudocGRENOBLE1/INP-Bib.électronique (384210012) / SudocGRENOBLE2/3-Bib.électronique (384219901) / SudocSudocFranceF

New gate drive unit concepts for IGBTs and reverse conducting IGBTs

This work presents different novel gate drive unit (GDU) concepts for IGBT and reverse conducting IGBT (RC-IGBT). They have been experimentally tested with medium voltage class IGBT modules (1200...1700V/650…1400A) and a RC-IGBT module (1200V/200A). The switching behaviour of the RC-IGBT was investigated, and a new trigger pulse pattern to drive the RC-IGBT was developed, designed and implemented. The experimental results showed that the switching losses were reduced by 20% in the RC-IGBT compared to the switching losses of a standard diode. Two novel schemes are introduced to estimate the collector current through the IGBT, based on the measurement of the voltage across the internal stray inductance of the IGBT module. Furthermore, a GDU concept was derived to balance the on-state collector currents of parallel-connected IGBTs, reducing the current imbalance to 5%. Also, a new fast short circuit protection method (FSCP) for IGBT modules was developed, designed and implemented in another GDU, allowing turning-off the considered IGBT in less than 1μs, reducing the IGBT stress. Another scheme implemented in a GDU features an improved gate current switching profile of the IGBT, which reduces the switching losses by 25% compared to the standard switching method. In order to reduce the conduction losses, a GDU with an increased turn-on gate-emitter voltage (larger than 20 V) was investigated. In the investigated IGBT, the on-state losses were reduced by 18% when a gate-emitter voltage of 35V is used compared to when a gate-emitter voltage of 15V is used. All these new GDU concepts have been implemented with a simple and inexpensive electronic circuitry, which is an important feature for a possible industrial implementation

Power Converters in Power Electronics

In recent years, power converters have played an important role in power electronics technology for different applications, such as renewable energy systems, electric vehicles, pulsed power generation, and biomedical sciences. Power converters, in the realm of power electronics, are becoming essential for generating electrical power energy in various ways. This Special Issue focuses on the development of novel power converter topologies in power electronics. The topics of interest include, but are not limited to: Z-source converters; multilevel power converter topologies; switched-capacitor-based power converters; power converters for battery management systems; power converters in wireless power transfer techniques; the reliability of power conversion systems; and modulation techniques for advanced power converters