Development of a triple well CMOS MAPS device with in-pixel signal processing and sparsified readout capabilities

none 39 The SLIM5 collaboration has designed, fabricated and tested several prototypes of CMOS Monolithic Active Pixel Sensors (MAPS). The key feature of these devices, with respect to traditional MAPS is to include, at the pixel level, charge amplification and shaping and a first sparsification structure that interfaces with on-chip digital readout circuits. Via the 3-well option of the applied View the MathML source ST-Microelectronics CMOS technology each pixel includes a charge preamplifier, a shaper, a discriminator, an output latch, while retaining a fill factor of the sensitive area close to 90%. The last device of the family was submitted on Q4 2006 and the tests are ongoing. On this sensor, an on-chip, off-pixel digital readout block (streamout data sparsification) was added to implement, to control and to readout a test matrix built up of 4×4 pixels. It is aimed at proposing solutions that will overcome the readout speed limit of future large-matrix MAPS chips. http://dx.doi.org/10.1016/j.nima.2007.07.135 none G. Batignani; S. Bettarini; F. Bosi; G. Calderini; R. Cenci; M. Dell'Orso; F. Forti P. ; M.A. Giorgi; A. Lusiani; G. Marchiori; F. Morsani; N. Neri; E. Paoloni; G. Rizzo1; J. Walsh; L. Gaioni; M. Manghisoni; V. Re; G. Traversi; M. Bruschi; A. Gabrielli; B. Giacobbe; N. Semprini; R. Spighi; M. Villa; A. Zoccoli; G. Verzellesi; C. Andreoli5; E. Pozzati; L. Ratti; V. Speziali; D. Gamba; G. Giraudo; P. Mereu; L. Bosisio; G. Giacomini; L. Lanceri; I. Rachevskaia; L. Vitale G. Batignani; S. Bettarini; F. Bosi; G. Calderini; R. Cenci; M. Dell'Orso; F. Forti P. ; M.A. Giorgi; A. Lusiani; G. Marchiori; F. Morsani; N. Neri; E. Paoloni; G. Rizzo1; J. Walsh; L. Gaioni; M. Manghisoni; V. Re; G. Traversi; M. Bruschi; A. Gabrielli; B. Giacobbe; N. Semprini; R. Spighi; M. Villa; A. Zoccoli; G. Verzellesi; C. Andreoli5; E. Pozzati; L. Ratti; V. Speziali; D. Gamba; G. Giraudo; P. Mereu; L. Bosisio; G. Giacomini; L. Lanceri; I. Rachevskaia; L. Vital

Characterization of HV-CMOS detectors in BCD8 technology and of a controlled hybridization technique

Radiation detectors built in high-voltage and high-resistivity CMOS technology are an interesting option for the large area pixel-trackers sought for the upgrade of the Large Hadron Collider experiments. A characterisation of the BCD8 technology by STMicroelectronics process has been performed to evaluate its suitability for the realisation of CMOS sensors with a depleted region of several tens of micrometer. Sensors featuring 50 7250 \u3bcm2 pixels on a 125 \u3a9cm resistivity substrate have been characterized. The response to ionizing radiation is tested using radioactive sources and an X-ray tune, reading out the detector with an external spectroscopy chain. Irradiation tests were performed up to proton fluences exceeding 5 c51015 p/cm2 and they show the depletion and breakdown voltages increases with irradiation. A hybridization process for capacitive coupling has been developed. Assemblies have been performed using the ATLAS FE-I4 readout ASIC and prototype CMOS sensors. Measurements show a planarity better than 1.5 \u3bcm peak-to-peak on the 5 mm length of the HV-CMOS chip. To evaluate more precisely the achievable uniformity dummy chips of FE-I4 sizes have been made on 6-inch wafers. The measurement of the 24 capacitors on each chip is expected to achieve a precise estimation of the real thickness uniformity. The goal is to achieve less then 10% variation on the glue thickness ( 3c0.5 \u3bcm)

An amorphous silicon photodiode array for glass-based optical MEMS application

A highly sensitive photo-detector array deposited on a glass substrate with an optional integrated optical filter have been presented. The active element is a vertically integrated hydrogenated amorphous silicon photodiode featuring a dark current of less than 1e-10 A/cm2 for -3V polarization and a maximal quantum efficiency of 80% near 580 nm. The prototype was encapsulated and successfully tested optically. It has a fill factor of only 44% which, however, can be easily increased to 90% using flip-chip bonding to an integrated electronic circuit for signal conditioning. The sensor is biocompatible and can be integrated with other glass-based and glass compatible micro-fabricated devices such as optical, microfluidic, lab-on-a-chip, chemical and biological devices in which photo-detection is a desired feature. ©2009 IEEE

Stability and efficiency of a CMOS sensor as detector of low energy beta and gamma particles

Radio Guided Surgery (RGS) is a nuclear medicine technique allowing the surgeon to identify tumor residuals in real time with a millimetric resolution, thanks to a radiopharmaceutical as tracer and a probe as detector. The use of beta(-) emitters, instead of gamma or beta(+), has been recently proposed with the aim to increase the technique sensitivity and reducing both the administered activity to the patient and the medical exposure. In this paper, the possibility to use the commercial CMOS Image Sensor MT9V115, originally designed for visible light imaging, as beta(-) radiation detector RGS is discussed. Being crucial characteristics in a surgical environment, in particular its stability against time, operating temperature, integration time and gain has been studied on laboratory measurements. Moreover, a full Monte Carlo simulation of the detector has been developed. Its validation against experimental data allowed us to obtain efficiency curves for both beta and gamma particles, and also to evaluate the effect of the covering heavy resin protective layer that is present in the "off the shelf" detector. This study suggests that a dedicated CMOS Image Sensor (i.e. one produced without the covering protective layer) represents the ideal candidate detector for RGS, able to massively increase the amount of application cases and the efficacy of this technique

Performance study of a novel 2D imaging beta detector for medical applications

openThe ISOLPHARM project is investigating a novel technology for producing beta-emitter radionuclides with high-purity mass selection at the SPES facility (LNL) to produce radiopharmaceuticals with high specific activity. The project currently focuses on Ag-111, a beta/gamma emitter with potential theranostic use. In this context, the Padova group is developing a new instrument to measure beta activity with high spatial resolution on planar cell cultures using the ALPIDE chips, MAPS detectors developed for the ITS of the ALICE experiment at CERN. The ALPIDE chips will be arranged in a compact planar geometry to create a detector that can measure beta radioactivity in close contact with planar cell cultures in slides or scaffolds, providing 2D activity images with high spatial resolution. This technology will have the potential to investigate the internalization of the ISOLPHARM radiopharmaceutical prototype for future in-vitro experiments. The performance and limits of the detector will be assessed through simulation of the whole system in GEANT4, providing insights into the design of the final setup and potential applications of this instrument.The ISOLPHARM project is investigating a novel technology for producing beta-emitter radionuclides with high-purity mass selection at the SPES facility (LNL) to produce radiopharmaceuticals with high specific activity. The project currently focuses on Ag-111, a beta/gamma emitter with potential theranostic use. In this context, the Padova group is developing a new instrument to measure beta activity with high spatial resolution on planar cell cultures using the ALPIDE chips, MAPS detectors developed for the ITS of the ALICE experiment at CERN. The ALPIDE chips will be arranged in a compact planar geometry to create a detector that can measure beta radioactivity in close contact with planar cell cultures in slides or scaffolds, providing 2D activity images with high spatial resolution. This technology will have the potential to investigate the internalization of the ISOLPHARM radiopharmaceutical prototype for future in-vitro experiments. The performance and limits of the detector will be assessed through simulation of the whole system in GEANT4, providing insights into the design of the final setup and potential applications of this instrument

Design of CMOS Digital Silicon Photomultipliers with ToF for Positron Emission Tomography

This thesis presents a contribution to the design of single-photon detectors for medical imaging. Specifically, the focus has been on the development of a pixel capable of single-photon counting in CMOS technology, and the associated sensor thereof. These sensors can work under low light conditions and provide timing information to determine the time-stamp of the incoming photons. For instance, this is particularly attractive for applications that rely either on time-of-flight measurements or on exponential decay determination of the light source, like positron emission tomography or fluorescence-lifetime imaging, respectively. This thesis proposes the study of the pixel architecture to optimize its performance in terms of sensitivity, linearity and signal to noise ratio. The design of the pixel has followed a bottom-up approach, taking care of the smallest building block and studying how the different architecture choices affect performance. Among the various building blocks needed, special emphasis has been placed on the following: • the Single-Photon Avalanche Diode (SPAD), a photodiode able to detect photons one by one; • the front-end circuitry of this diode, commonly called quenching and recharge circuit; • the Time-to-Digital Converter (TDC), which determines the timing performance of the pixel. The proposed architectural exploration provides a comprehensive insight into the design space of the pixel, allowing to determine the optimum design points in terms of sensor sensitivity, linearity or signal to noise ratio, thus helping designers to navigate through non-straightforward trade-offs. The proposed TDC is based on a voltage-controlled ring oscillator, since this architecture provides moderate time resolutions while keeping the footprint, the power, and conversion time relatively small. Two pseudo-differential delay stages have been studied, one with cross-coupled PMOS transistors and the other with cross-coupled inverters. Analytical studies and simulations have shown that cross-coupled inverters are the most appropriate to implement the TDC because they achieve better time resolution with smaller energy per conversion than cross-coupled PMOS transistor stages. A 1.3×1.3 mm2 pixel has been implemented in an 110 nm CMOS image sensor technology, to have the benefits of sub-micron technologies along with the cleanliness of CMOS image sensor technologies. The fabricated chips have been used to characterize the single-photon avalanche diodes. The results agree with expectations: a maximum photon detection probability of 46 % and a median dark count rate of 0.4 Hz/µm2 with an excess voltage of 3 V. Furthermore, the characterization of the TDC shows that the time resolution is below 100 ps, which agrees with post-layout simulations. The differential non-linearity is ±0.4LSB, and the integral non-linearity is ±6.1LSB. Photoemission occurs during characterization - an indication that the avalanches are not quenched properly. The cause of this has been identified to be in the design of the SPAD and the quenching circuit. SPADs are sensitive devices which maximum reverse current must be well defined and limited by the quenching circuit, otherwise unwanted effects like excessive cross-talk, noise, and power consumption may happen. Although this issue limits the operation of the implemented pixel, the information obtained during the characterization will help to avoid mistakes in future implementations

High voltage CMOS monolithic active pixel sensor for high energy physics experiments

Position sensitive detectors are widely used in the tracking system of High Energy Physics (HEP) experiments such as ATLAS (A Toroidal LHC Apparatus) and CMS (Compact Muon Solenoid) at the Large Hadron Collider (LHC), the world¿s largest particle accelerator at CERN mainly due to their outstanding performance. The future upgrade of the LHC to its high luminosity (HL) will enable the use of maximal physics potential of the facility for searching beyond the Standard Model of particle physics. After ten years of operation, the expected radiation fluence will result in a radiation environment that is beyond the capacity of the present tracking system design. The required upgrade of the silicon central tracker will include higher granularity and radiation hard sensors that can tolerate the increased occupancy and the higher radiation levels. The radiation hardness of new sensors must be roughly ten times higher than in the current LHC detectors. Extensive measurements and simulation studies have been performed to investigate different designs and materials for silicon sensors to cope with such that high radiation hardness. High Voltage CMOS (HV-CMOS) Monolithic Active Pixel Sensor (MAPS) is currently a promising candidate technology for the new inner pixel detector at the LHC. The HV-CMOS MAPS was proposed in 2007, since then it has been very attracting since it has overcome most of the disadvantages of the standard MAPS design. The HV-CMOS MAPS has been demonstrated to have excellent performance for charged particle tracking, such as higher charge collection efficiency, better sensitivity and faster response speed. The capability of fabricating sensors and readout electronics on the same substrate helps to reduce the material budget and the complexity in term of mounting small size pixels. Several prototypes of the HV-CMOS MAPS have been fabricated through a series of large-scale collaboration in the ATLAS and Mu3e program with very promising results. This thesis presents works on numerical simulation studied for the HV-CMOS MAPS design. The simulation process is an essential part of the device development process since it can provide further analysis and optimisation of the design. It can significantly shorten the development time, especially for the new technology with non-standard process of fabrication. A complete Technology Computer Aided Design (TCAD) model of a single pixel HV-CMOS MAPS is developed based on Sentaurus TCAD simulation framework of Synopsys. A single pixel of HV-CMOS MAPS model is used to determine and predict the electrical characteristics and performance of the device regrading device dimensions, doping concentrations of the structural layer and bias conditions. The interaction with Minimum Ionising Particles (MIP) is also simulated to study its effect on the sensors' performance. A comprehensive analysis to study the effect of radiation hardness on a pixel of HV-CMOS MAPS is also performed. The radiation induced damage creates bulk damage in silicon and alters the sensor¿s characteristics, such as an increase in leakage current and a reduction of charge collection efficiency, thus deteriorates the detector performance. The radiation damage simulation, based on a four-level trap model, can reproduce experimentally observed detector characteristics such as leakage current, full depletion voltage and charge collection efficiency. Lastly, a model for multi-channel pixels of HV-CMOS MAPS is developed. The model comprises of nine pixels arranged in a 3×3 array. The model is used to analysing and predicting interpixel crosstalk and charge sharing effects between pixels. The radiation incidents at different positions and directions are simulated to investigate the performance of the HV-CMOS MAPS and the impacts on adjacent cells. The performance degradation of the whole sensor system due to radiation induced damage is also studied. The combined results of this thesis demonstrate the advantage and power of the TCAD simulations of semiconductor radiation detectors as a tool to bridge the gap from experiments to simulations