Local control of multiple module converters with ratings-based load sharing

Multiple module dc-dc converters show promise in meeting the increasing demands on ef- ficiency and performance of energy conversion systems. In order to increase reliability, maintainability, and expandability, a modular approach in converter design is often desired. This thesis proposes local control of multiple module converters as an alternative to using a central controller or master controller. A power ratings-based load sharing scheme that allows for uniform and non-uniform sharing is introduced. Focus is given to an input series, output parallel (ISOP) configuration and modules with a push-pull topology. Sensorless current mode (SCM) control is digitally implemented on separate controllers for each of the modules. The benefits of interleaving the switching signals of the distributed modules is presented. Simulation and experimental results demonstrate stable, ratings-based sharing in an ISOP converter with a high conversion ratio for both uniform and non-uniform load sharing cases

Cumulative Index to NASA Tech Briefs, 1963 - 1966

Cumulative index of NASA Tech Briefs dealing with electrical and electronic, physical science and energy sources, materials and chemistry, life science, and mechanical innovation

Interleaved Buck Converter Based Shunt Active Power Filter with Shoot-through Elimination for Power Quality Improvement

The “shoot-through” phenomenon defined as the rush of current that occurs while both the devices are ON at the same time of a particular limb is one of the most perilous failure modes encountered in conventional inverter circuits of active power filter (APF). Shoot-through phenomenon has few distinct disadvantages like; it introduces typical ringing, increases temperature rise in power switches, causes higher Electromagnetic Interference (EMI) and reduces the efficiency of the circuit. To avert the “shoot-through”, dead time control could be added, but it deteriorates the harmonic compensation level. This dissertation presents active power filters (APFs) based on interleaved buck (IB) converter. Compared to traditional shunt active power filters, the presented IB APFs have enhanced reliability with no shoot-through phenomenon. The instantaneous active and reactive power (p-q) scheme and instantaneous active and reactive current component (id-iq) control scheme has been implemented to mitigate the source current harmonics. Type-1 and Type-2 fuzzy logic controller with different membership functions (MFs) viz. Triangular, Trapezoidal and Gaussian have been implemented for the optimal harmonic compensation by controlling the dc-link voltage and minimizing the undesirable losses occurred inside the APF. Additionally, the adaptive hysteresis band current controller (AHBCC) is being implemented to get the nearly constant switching frequency. The performance of the control strategies and controllers for the presented IB APF topologies has been evaluated in terms of harmonic mitigation and dc-link voltage regulation under sinusoidal, unbalanced sinusoidal and non-sinusoidal voltage source condition. This dissertation is concerned with the different topologies of 3-phase 4-wire IB APFs viz. split capacitor (2C) topology, 4-leg (4L) topology, transformer based full-bridge IB APF or single capacitor based FB IB APF (1C 3 FB IB APF) and full-bridge IB APF (FB IB APF) for low to medium power application. Moreover, APF topology is now being expanded to multilevel VSIs for high power application. Thanks to flexible modular design, transformerless connection, extended voltage and power output, less maintenance and higher fault tolerance, the cascade inverters are good candidates for active power filters with the utility of high power application. The cascaded FB IB APF is modelled with no shoot-through phenomenon by using multicarrier phase shifted PWM scheme. Extensive simulations have been carried out in the MATLAB / Simulink environment and also verified in the OPAL-RT LAB using OP5142-Spartan 3 FPGA to support the feasibility of presented IB APF topologies, control strategies and controllers during steady and dynamic condition. The performance shows that IB-APF topologies bring the THD of the source current well below 5% adhering to IEEE-519 standard. A comparison has also been made, based on SDP (switch device power) between the IB-APF topologies

New optimized electrical architectures of photovoltaic generators with high conversion efficiency

L'objectif de cette thèse est l'optimisation du rendement des chaînes de conversion photovoltaïques (PV). Différentes améliorations de l'architecture électriques et de ses algorithmes de commande ont été développées afin d'obtenir un haut rendement de conversion sur une grande plage de puissance d'entrée. Ces travaux portent également sur l'allongement de la durée de vie de l'étage de conversion électrique. Les avantages et les inconvénients d'un système composé de convertisseurs connectés en parallèle ont été montrés notamment à travers une analyse de pertes. Ces études ont permis la conception d'une nouvelle architecture constituée par des convertisseurs parallélisés. Cette dernière est appelée "Convertisseur Multi-Phase Adaptative" (MPAC). Sa singularité réside dans ses algorithmes de commande qui adaptent les phases actives selon la production de puissance en temps réel et recherchent la configuration la plus efficiente à chaque instant. De cette façon, le MPAC garantit un haut rendement de conversion sur toute la plage de puissance de fonctionnement. Une autre loi de commande permet quant à elle d'uniformiser le temps de fonctionnement de chaque phase par l'implémentation d'un algorithme de rotation de phase. Ainsi, le stress des composants de ces phases est maintenu homogène, assurant un vieillissement homogène pour chacune des phases. Etant donné alors le faible stress appliqué sur chaque composant, la structure MPAC présente une durée de vie plus importante. Les améliorations de l'étage de conversion de puissance ont pu montrer par la réalisation d'un prototype expérimental et par la réalisation de tests expérimentaux la validation globale du système. Pour finir, des tests comparatifs entre une chaîne de conversion PV classique et notre système ont montré une amélioration significative du rendement de conversion.This thesis focuses in the optimization of the efficiency of photovoltaic power conversion chain. In this way, different improvements have been proposed in the electrical architecture and its control algorithms in order to obtain high efficiency in a large rage of input power and long life-time of PV power conversion system. Using loss analysis, the benefits and drawbacks of parallel connection of power structures has been shown. This analysis has allowed the conception of a new optimized architecture constituted by parallelized power converters, called Multi-Phase Adaptive Converter (MPAC). The singularity of these power structures consists on the adaptation of the phases of the converter depending on the power production in real-time and looking for the most efficient configuration all time. In this way, the MPAC guarantees high conversion efficiency for all power ranges. Another control law is also implemented which guarantees a rotation of the phases to keep their working time uniform. Thus, the stress of the components of all the phases is kept homogenous, assuring a homogeneous aging of the phases. Since the global stress of the component is lower, the MPAC presents a longer life-time. The improvements in the power conversion stage are shown by experimental prototypes. Experimental tests have been done for global validation. Comparison with a classical power conversion stage shows the improvement in the global conversion efficiency

Emerging Converter Topologies and Control for Grid Connected Photovoltaic Systems

Continuous cost reduction of photovoltaic (PV) systems and the rise of power auctions resulted in the establishment of PV power not only as a green energy source but also as a cost-effective solution to the electricity generation market. Various commercial solutions for grid-connected PV systems are available at any power level, ranging from multi-megawatt utility-scale solar farms to sub-kilowatt residential PV installations. Compared to utility-scale systems, the feasibility of small-scale residential PV installations is still limited by existing technologies that have not yet properly address issues like operation in weak grids, opaque and partial shading, etc. New market drivers such as warranty improvement to match the PV module lifespan, operation voltage range extension for application flexibility, and embedded energy storage for load shifting have again put small-scale PV systems in the spotlight. This Special Issue collects the latest developments in the field of power electronic converter topologies, control, design, and optimization for better energy yield, power conversion efficiency, reliability, and longer lifetime of the small-scale PV systems. This Special Issue will serve as a reference and update for academics, researchers, and practicing engineers to inspire new research and developments that pave the way for next-generation PV systems for residential and small commercial applications

Cumulative index to NASA Tech Briefs, 1963-1967

Cumulative index to NASA survey on technology utilization of aerospace research outpu

Voyager capsule phase B. Volume IV - Entry science package. Part H - Reliability. Part I - Planetary quarantine, Part J - Operational support equipment. Part K - Interface alternatives Final report

Reliability, planetary quarantine, support equipment, and interface alternatives of Voyager entry science package for Mars atmosphere prob

Família de Conversores CC-CC com Alta Capacidade de Redução de Tentsão Utilizandos Célula Valley-Fill

TCC (graduação) - Universidade Federal de Santa Catarina. Centro Tecnológico. Engenharia Elétrica.Abaixador de Tensão. Valley-Fill. Alta capabilidade. Eficiência. Não-isoladores

Conversores CC-CC não-isolados com alta taxa de conversão baseados no empilhamento de topologias convencionais

Tese (doutorado) - Universidade Federal de Santa Catarina, Centro Tecnológico, Programa de Pós-Graduação em Engenharia Elétrica, Florianópolis, 2020.Esta tese tem como objetivo contribuir no estudo de novas topologias de conversores CC-CC não-isolados abaixadores com alta taxa de conversão. As topologias propostas são geradas a partir do empilhamento de estruturas convencionais e podem ser empregadas em aplicações em que elevados níveis de tensão estão envolvidos. As principais características das topologias propostas são a possibilidade de modularidade da estrutura, balanceamento natural das tensões nos capacitores e reduzidos esforços de tensão nos dispositivos semicondutores, permitindo o uso de interruptores e diodos da baixa tensão. Os conversores propostos também podem ser utilizadas como barramento CC proporcionando um ou mais níveis de tensão de saída, onde diferentes cargas podem ser conectadas em um ou mais capacitores da pilha. Dois tipos de estruturas são estudadas neste trabalho: conversores CC-CC baseados no empilhamento de topologias não-isoladas convencionais e conversores CC-CC baseados no empilhamento de topologias isoladas. Uma análise teórica generalizada com ganho estático, esforços de tensão e corrente nos principais componentes, análise do fluxo de potência e rendimento é apresentada para todas as topologias propostas. Com o objetivo de avaliar o desempenho e validar a análise teórica generalizada, protótipos para os dois tipos de estruturas com 250 W e 4 kW de potência de saída e tensão de entrada de 1200 V foram construídos e testados experimentalmente. Os resultados experimentais obtidos corroboram com a análise teórica e demonstram a viabilidade dos conversores propostos.Abstract: This thesis aims to contribute to the study of new topologies of step-down nonisolated dc-dc converters with high conversion ratio. The proposed topologies are generatedfrom the stacking of conventional structures and they can be employed in applicationswhere high levels of voltage are involved. The main features of the proposed topologies arethe possibility of modularity, natural voltage balance across the capacitors and reducedvoltage stresses on the semiconductor devices, allowing the use of low voltage switchesand diodes. The proposed converters can also be used as dc bus, providing one or severaloutput voltage levels, where different loads can be connected to one or more capacitorsof the stack. Two types of structures are studied in this work: dc-dc converters based onstacking of conventional non-isolated topologies and dc-dc converters based on stackingof conventional isolated topologies. A generalized theoretical analysis with static gain,voltage and current stresses on the main components, power flow analysis and efficiency ispresented for all the proposed topologies. In order to evaluate performance and validatethe theoretical analysis, prototypes for the two types of structures with 250 W and 4kW of output power and 1200 V input voltage were built and tested experimentally. Theexperimental results obtained corroborate the theoretical analysis and they demonstratethe feasibility of the proposed converters

Design and Demonstration of Embedded Inductors for High-Voltage Integrated Voltage Regulators

Increased functionalities and computational capacity of today’s electronic systems have resulted in the need for higher power density. Current multi-stage 48 V to 1 V power delivery networks shows efficiencies of 75% or lower. Substrate-embedded inductors can enable the miniaturization of power modules and Integrated Voltage Regulators (IVRs) making possible single-stage down-conversion of 12 V to 1 V or 48 V to 1 V, improving both the system efficiency and regulation bandwidth. The design rules of inductor for single-stage high-conversion-ratio IVRs are quite different and challenging compared to low voltage converter like 1.7 V to 1 V. With extensive design exploration and experimentation, we have validated a novel inductor and fabrication technology along with a novel design methodology. We have demonstrated over 42 fabricated embedded inductors with 7 different designs and 6 different magnetic materials spanning an inductance range from 10 nH to over 500 nH, DC resistance from 14 mOhm to 40 mOhm, and saturation current from 100 mA to over 5 A. We have proposed and validated a new inductor power loss calculation method that includes the effect of frequency, duty cycle, and large-signal (or hysteresis) losses, and only circuit quantities such as inductance and resistance, current ripple, and power loss need to be measured. This new method evolves in an inductor design framework that allows predicting the performance of complex embedded inductors using a discrete toroidal inductor that takes only one day to fabricate. We have demonstrated an inductor with 60 nH, density of 12 nH/mm2, 23 mOhm of DC resistance, a maximum current of 5A, a current density of 1 A/mm2, and an inductance to DC resistance ratio of 2850 nH/Ohm. However, for 12 V to 1 V single-stage IVRs, more advances need to be made for the magnetic materials. We have determined that the required magnetic material needs a relative permeability of 65, loss tangent less than 0.015, saturation field over 6 kA/m, and large to small signal losses ratio of 4. Finally, a scalable small-signal SPICE model is presented. This model allows obtaining an ultra-wide-bandwidth inductor circuit representation with any amount of inductance (for a given magnetic material) using a single model to measurement fitting. We believe these new technologies will allow obtaining improved designs of inductors, magnetic materials, and IVRs to power the next generation of high-performance computing (HPC) platforms.Ph.D