A Framework to Analyze Energy Efficiency of Multi-Band Spectrum Sensing Algorithms

Cognitive radio (CR) is a device which can detect wireless communication channels that are not in use and adapt its parameters intelligently. Networks with CRs use the available frequency bands much more efficiently and hence have higher data rates compare to traditional radios. Spectrum sensing is the class of techniques used by CRs to understand its wireless environment. Recent research on evaluating multi-band spectrum sensing algorithms is limited to only algorithm complexity and optimization; therefore, the primary goal of the study is to devise a novel framework that analyzes a multi-band spectrum sensing algorithm in terms of energy consumption and algorithm efficiency. The proposed structure leads to a comparison and evaluation of a large class of multi-band spectrum sensing algorithms. Multi-band spectrum sensing search methods such as linear, random and binary are evaluated for energy loss and detection performance using the proposed framework

Learning-Based Hardware Design for Data Acquisition Systems

This multidisciplinary research work aims to investigate the optimized information extraction from signals or data volumes and to develop tailored hardware implementations that trade-off the complexity of data acquisition with that of data processing, conceptually allowing radically new device designs. The mathematical results in classical Compressive Sampling (CS) support the paradigm of Analog-to-Information Conversion (AIC) as a replacement for conventional ADC technologies. The AICs simultaneously perform data acquisition and compression, seeking to directly sample signals for achieving specific tasks as opposed to acquiring a full signal only at the Nyquist rate to throw most of it away via compression. Our contention is that in order for CS to live up its name, both theory and practice must leverage concepts from learning. This work demonstrates our contention in hardware prototypes, with key trade-offs, for two different fields of application as edge and big-data computing. In the framework of edge-data computing, such as wearable and implantable ecosystems, the power budget is defined by the battery capacity, which generally limits the device performance and usability. This is more evident in very challenging field, such as medical monitoring, where high performance requirements are necessary for the device to process the information with high accuracy. Furthermore, in applications like implantable medical monitoring, the system performances have to merge the small area as well as the low-power requirements, in order to facilitate the implant bio-compatibility, avoiding the rejection from the human body. Based on our new mathematical foundations, we built different prototypes to get a neural signal acquisition chip that not only rigorously trades off its area, energy consumption, and the quality of its signal output, but also significantly outperforms the state-of-the-art in all aspects. In the framework of big-data and high-performance computation, such as in high-end servers application, the RF circuits meant to transmit data from chip-to-chip or chip-to-memory are defined by low power requirements, since the heat generated by the integrated circuits is partially distributed by the chip package. Hence, the overall system power budget is defined by its affordable cooling capacity. For this reason, application specific architectures and innovative techniques are used for low-power implementation. In this work, we have developed a single-ended multi-lane receiver for high speed I/O link in servers application. The receiver operates at 7 Gbps by learning inter-symbol interference and electromagnetic coupling noise in chip-to-chip communication systems. A learning-based approach allows a versatile receiver circuit which not only copes with large channel attenuation but also implements novel crosstalk reduction techniques, to allow single-ended multiple lines transmission, without sacrificing its overall bandwidth for a given area within the interconnect's data-path

Image compression and energy harvesting for energy constrained sensors

Title from PDF of title page, viewed on June 21, 2013Dissertation advisor: Walter D. Leon-SalasVitaIncludes bibliographic references (pages 176-[187])Thesis (Ph.D.)--School of Computing and Engineering. University of Missouri--Kansas City, 2013The advances in complementary metal-oxide-semiconductor (CMOS) technology have led to the integration of all components of electronic system into a single integrated circuit. Ultra-low power circuit techniques have reduced the power consumption of circuits. Moreover, solar cells with improved efficiency can be integrated on chip to harvest energy from sunlight. As a result of all the above, a new class of miniaturized electronic systems known as self-powered system on a chip has emerged. There is an increasing research interest in the area of self-powered devices which provide cost-effective solutions especially when these devices are used in the areas that changing or replacing batteries is too costly. Therefore, image compression and energy harvesting are studied in this dissertation. The integration of energy harvesting, image compression, and an image sensor on the same chip provides the energy source to charge a battery, reduces the data rate, and improves the performance of wireless image sensors. Integrated circuits of image compression, solar energy harvesting, and image sensors are studied, designed, and analyzed in this work. In this dissertation, a hybrid image sensor that can perform the tasks of sensing and energy harvesting is presented. Photodiodes of hybrid image sensor can be programmed as image sensors or energy harvesting cells. The hybrid image sensor can harvest energy in between frames, in sleep mode, and even when it is taking images. When sensing images and harvesting energy are both needed at the same time, some pixels have to work as sensing pixels, and the others have to work as solar cells. Since some pixels are devoted to harvest energy, the resolution of the image will be reduced. To preserve the resolution or to keep the fair resolution when a lot of energy collection is needed, image reconstruction algorithms and compressive sensing theory provide solutions to achieve a good image quality. On the other hand, when the battery has enough charge, image compression comes into the picture. Multiresolution decomposition image compression provides a way to compress image data in order to reduce the energy need from data transmission. The solution provided in this dissertation not only harvests energy but also saves energy resulting long lasting wireless sensors. The problem was first studied at the system level to identify the best system-level configuration which was then implemented on silicon. As a proof of concept, a 32 x 32 array of hybrid image sensor, a 32 x 32 array of image sensor with multiresolution decomposition compression, and a compressive sensing converter have been designed and fabricated in a standard 0.5 [micrometer] CMOS process. Printed circuit broads also have been designed to test and verify the proposed and fabricated chips. VHDL and Matlab codes were written to generate the proper signals to control, and read out data from chips. Image processing and recovery were carried out in Matlab. DC-DC converters were designed to boost the inherently low voltage output of the photodiodes. The DC-DC converter has also been improved to increase the efficiency of power transformation.Introduction -- Hybrid imager system and circuit design -- Hybrid imager energy harvesting and image acquisition results and discussion -- Detailed description and mathematical analysis for a circuit of energy harvesting using on-chip solar cells -- Multiresolution decomposition for lossless and near-lossless compression -- An incremental [sigma-delta] converter for compressive sensing -- Detailed description of a sigma-delta random demodulator converter architecture for compressive sensing applications -- Conclusion -- Appendix A. Chip pin-out -- Appendix B. Schematics -- Appendix C. Pictures of custom PC

Exploring information retrieval using image sparse representations:from circuit designs and acquisition processes to specific reconstruction algorithms

New advances in the field of image sensors (especially in CMOS technology) tend to question the conventional methods used to acquire the image. Compressive Sensing (CS) plays a major role in this, especially to unclog the Analog to Digital Converters which are generally representing the bottleneck of this type of sensors. In addition, CS eliminates traditional compression processing stages that are performed by embedded digital signal processors dedicated to this purpose. The interest is twofold because it allows both to consistently reduce the amount of data to be converted but also to suppress digital processing performed out of the sensor chip. For the moment, regarding the use of CS in image sensors, the main route of exploration as well as the intended applications aims at reducing power consumption related to these components (i.e. ADC & DSP represent 99% of the total power consumption). More broadly, the paradigm of CS allows to question or at least to extend the Nyquist-Shannon sampling theory. This thesis shows developments in the field of image sensors demonstrating that is possible to consider alternative applications linked to CS. Indeed, advances are presented in the fields of hyperspectral imaging, super-resolution, high dynamic range, high speed and non-uniform sampling. In particular, three research axes have been deepened, aiming to design proper architectures and acquisition processes with their associated reconstruction techniques taking advantage of image sparse representations. How the on-chip implementation of Compressed Sensing can relax sensor constraints, improving the acquisition characteristics (speed, dynamic range, power consumption) ? How CS can be combined with simple analysis to provide useful image features for high level applications (adding semantic information) and improve the reconstructed image quality at a certain compression ratio ? Finally, how CS can improve physical limitations (i.e. spectral sensitivity and pixel pitch) of imaging systems without a major impact neither on the sensing strategy nor on the optical elements involved ? A CMOS image sensor has been developed and manufactured during this Ph.D. to validate concepts such as the High Dynamic Range - CS. A new design approach was employed resulting in innovative solutions for pixels addressing and conversion to perform specific acquisition in a compressed mode. On the other hand, the principle of adaptive CS combined with the non-uniform sampling has been developed. Possible implementations of this type of acquisition are proposed. Finally, preliminary works are exhibited on the use of Liquid Crystal Devices to allow hyperspectral imaging combined with spatial super-resolution. The conclusion of this study can be summarized as follows: CS must now be considered as a toolbox for defining more easily compromises between the different characteristics of the sensors: integration time, converters speed, dynamic range, resolution and digital processing resources. However, if CS relaxes some material constraints at the sensor level, it is possible that the collected data are difficult to interpret and process at the decoder side, involving massive computational resources compared to so-called conventional techniques. The application field is wide, implying that for a targeted application, an accurate characterization of the constraints concerning both the sensor (encoder), but also the decoder need to be defined

Intelligent Sensor Networks

In the last decade, wireless or wired sensor networks have attracted much attention. However, most designs target general sensor network issues including protocol stack (routing, MAC, etc.) and security issues. This book focuses on the close integration of sensing, networking, and smart signal processing via machine learning. Based on their world-class research, the authors present the fundamentals of intelligent sensor networks. They cover sensing and sampling, distributed signal processing, and intelligent signal learning. In addition, they present cutting-edge research results from leading experts

Development of Ultrasonic Devices for Non-destructive Testing: Ultrasonic Vibro-tactile Sensor and FPGA-Based Research Platform

This thesis is focused on the development of ultrasonic devices for industrial non-destructive testing (NDT). Ultrasound is generated from mechanical vibrations and then propagates through the medium. Ultrasonic devices can make use of the ultrasound in both aspects, vibrations and propagations, to perform inspections of the objects. To this end, two devices were developed in this research, each pertaining to NDT of the objects. The first device is the vibro-tactile sensor which aims to estimate the elastic modules of soft materials with minimally invasive technique. Inspired by load sensitivity studies in the high-power ultrasonic applications, vibration characteristics in resonance were utilized to perform the inspection. Only a minimal force to ensure contact with the object surface needs to be applied for a vibro-tactile sensor to perform inspection of the object; hence, it can be used for in-vivo measurement of the soft materials’ elastic moduli without causing severe surface deformation. The design and analysis of the device were carried out using the electro-mechanical analogy to address the electro-mechanical nature of piezoelectric devices. The designed vibro-tactile sensor resonates at ~40 kHz and can be applied to differentiate the elastic modulus of isotropic soft samples with a range from 10 kPa to 70 kPa. The second device developed is a field-programmable development platform for ultrasonic pulse-echo testing. Ultrasonic testing, utilizing sound wave propagation, is a widely used technique in the industry. The commercially available equipment for industrial NDT is highly dependent on the competence of the inspector and rarely provides the access to raw data. For successful transition from traditional labor-intensive manufacturing to the next generation “smart factory” where intelligent machines replace human labor, inspection equipment with automated in-line data collection and processing capability is highly needed. To this end, a flexible platform which provides the access to raw data for algorithm development and implementation should be established. Therefore, an affordable, versatile, and researcher-friendly development platform based on field-programmable gate array (FPGA) was developed in the research. Both hardware and software development tools and procedures were discussed. In the lab experiment, the developed prototype exhibited its competence in NDT applications and successfully carried out hardware-based auto-detection algorithm for mm-level defects on steel and aluminum specimens. Comparisons with commercial systems were provided to guide future development

Design and application of microstrip leaky wave antennas for radar sensing

textThis dissertation investigates the application of the frequency-scanned beam of a microstrip leaky wave antenna (LWA) to track humans in the two-dimensional (2-D) range-azimuth plane. The history, operating principles and frequency-scanned properties of a microstrip LWA are first reviewed. The basic concept of using a microstrip LWA to track humans is verified by designing, building and testing a broadband microstrip LWA, developing the necessary processing algorithm, and collecting data using a vector network analyzer. A number of topics are then investigated to further advance the concept. First, the idea of combining the frequency-scanned antenna with a short-pulse ultra-wideband (UWB) radar is developed to realize a portable, real-time system for human tracking. The radar concept and the components of the system are discussed in detail. Line-of-sight and through-wall measurements of a human subject are carried out to demonstrate the performance. Second, a new LWA structure is proposed to achieve a narrower azimuth beam, which requires both a small leaky-wave attenuation constant and a long aperture. The transverse resonance method (TRM) is applied to analyze the proposed structure and the results are verified with measurements of a built prototype. Third, a new signal processing technique, compressive sensing, is applied to further improve the resolution in both the azimuth and down range dimensions. The technique is tested with simulation and measurement data and is shown to produce sharper target responses in both the down range and azimuth dimensions. Lastly, the radar cross-section (RCS) of a microstrip LWA is studied. The antenna mode scattering and structural mode scattering are modeled separately. A ray picture is provided to explain the observed time-domain features using the group delay of the leaky wave.Electrical and Computer Engineerin

Integrated Circuits and Systems for Smart Sensory Applications

Connected intelligent sensing reshapes our society by empowering people with increasing new ways of mutual interactions. As integration technologies keep their scaling roadmap, the horizon of sensory applications is rapidly widening, thanks to myriad light-weight low-power or, in same cases even self-powered, smart devices with high-connectivity capabilities. CMOS integrated circuits technology is the best candidate to supply the required smartness and to pioneer these emerging sensory systems. As a result, new challenges are arising around the design of these integrated circuits and systems for sensory applications in terms of low-power edge computing, power management strategies, low-range wireless communications, integration with sensing devices. In this Special Issue recent advances in application-specific integrated circuits (ASIC) and systems for smart sensory applications in the following five emerging topics: (I) dedicated short-range communications transceivers; (II) digital smart sensors, (III) implantable neural interfaces, (IV) Power Management Strategies in wireless sensor nodes and (V) neuromorphic hardware

Improving SLI Performance in Optically Challenging Environments

The construction of 3D models of real-world scenes using non-contact methods is an important problem in computer vision. Some of the more successful methods belong to a class of techniques called structured light illumination (SLI). While SLI methods are generally very successful, there are cases where their performance is poor. Examples include scenes with a high dynamic range in albedo or scenes with strong interreflections. These scenes are referred to as optically challenging environments. The work in this dissertation is aimed at improving SLI performance in optically challenging environments. A new method of high dynamic range imaging (HDRI) based on pixel-by-pixel Kalman filtering is developed. Using objective metrics, it is show to achieve as much as a 9.4 dB improvement in signal-to-noise ratio and as much as a 29% improvement in radiometric accuracy over a classic method. Quality checks are developed to detect and quantify multipath interference and other quality defects using phase measuring profilometry (PMP). Techniques are established to improve SLI performance in the presence of strong interreflections. Approaches in compressed sensing are applied to SLI, and interreflections in a scene are modeled using SLI. Several different applications of this research are also discussed