High Efficiency and High Sensitivity Wireless Power Transfer and Wireless Power Harvesting Systems.

In this dissertation, several approaches to improve the efficiency and sensitivity of wireless power transfer and wireless power harvesting systems, and to enhance their performance in fluctuant and unpredictable circumstances are described. Firstly, a nonlinear resonance circuit described by second-order differential equation with cubic-order nonlinearities (the Duffing equation) is developed. The Duffing nonlinear resonance circuit has significantly wider bandwidth as compared to conventional linear resonators, while achieving a similar level of amplitude. The Duffing resonator is successfully applied to the design of WPT systems to improve their tolerance to coupling factor variations stemming from changes of transmission distance and alignment of coupled coils. Subsequently, a high sensitivity wireless power harvester which collects RF energy from AM broadcast stations for powering the wireless sensors in structural health monitoring systems is introduced. The harvester demonstrates the capability of providing net RF power within 6 miles away from a local 50 kW AM station. The aforementioned Duffing resonator is also used in the design of WPH systems to improve their tolerance to frequency misalignment resulting from component aging, coupling to surrounding objects or variations of environmental conditions (temperature, humidity, etc.). At last, a rectifier array circuit with an adaptive power distribution method for wide dynamic range operation is developed. Adaptive power distribution is achieved through impedance transformation of the rectifiers’ nonlinear impedance with a passive network. The rectifier array achieves high RF-to-DC efficiency within a wide range of input power levels, and is useful in both WPT and WPH applications where levels of the RF power collected by the receiver are subject to unpredictable fluctuations.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/133338/1/tinyfish_1.pd

Orbital Angular Momentum Waves: Generation, Detection and Emerging Applications

Orbital angular momentum (OAM) has aroused a widespread interest in many fields, especially in telecommunications due to its potential for unleashing new capacity in the severely congested spectrum of commercial communication systems. Beams carrying OAM have a helical phase front and a field strength with a singularity along the axial center, which can be used for information transmission, imaging and particle manipulation. The number of orthogonal OAM modes in a single beam is theoretically infinite and each mode is an element of a complete orthogonal basis that can be employed for multiplexing different signals, thus greatly improving the spectrum efficiency. In this paper, we comprehensively summarize and compare the methods for generation and detection of optical OAM, radio OAM and acoustic OAM. Then, we represent the applications and technical challenges of OAM in communications, including free-space optical communications, optical fiber communications, radio communications and acoustic communications. To complete our survey, we also discuss the state of art of particle manipulation and target imaging with OAM beams

ワイヤレス通信のための先進的な信号処理技術を用いた非線形補償法の研究

The inherit nonlinearity in analogue front-ends of transmitters and receivers have had primary impact on the overall performance of the wireless communication systems, as it gives arise of substantial distortion when transmitting and processing signals with such circuits. Therefore, the nonlinear compensation (linearization) techniques become essential to suppress the distortion to an acceptable extent in order to ensure sufficient low bit error rate. Furthermore, the increasing demands on higher data rate and ubiquitous interoperability between various multi-coverage protocols are two of the most important features of the contemporary communication system. The former demand pushes the communication system to use wider bandwidth and the latter one brings up severe coexistence problems. Having fully considered the problems raised above, the work in this Ph.D. thesis carries out extensive researches on the nonlinear compensations utilizing advanced digital signal processing techniques. The motivation behind this is to push more processing tasks to the digital domain, as it can potentially cut down the bill of materials (BOM) costs paid for the off-chip devices and reduce practical implementation difficulties. The work here is carried out using three approaches: numerical analysis & computer simulations; experimental tests using commercial instruments; actual implementation with FPGA. The primary contributions for this thesis are summarized as the following three points: 1) An adaptive digital predistortion (DPD) with fast convergence rate and low complexity for multi-carrier GSM system is presented. Albeit a legacy system, the GSM, however, has a very strict requirement on the out-of-band emission, thus it represents a much more difficult hurdle for DPD application. It is successfully implemented in an FPGA without using any other auxiliary processor. A simplified multiplier-free NLMS algorithm, especially suitable for FPGA implementation, for fast adapting the LUT is proposed. Many design methodologies and practical implementation issues are discussed in details. Experimental results have shown that the DPD performed robustly when it is involved in the multichannel transmitter. 2) The next generation system (5G) will unquestionably use wider bandwidth to support higher throughput, which poses stringent needs for using high-speed data converters. Herein the analog-to-digital converter (ADC) tends to be the most expensive single device in the whole transmitter/receiver systems. Therefore, conventional DPD utilizing high-speed ADC becomes unaffordable, especially for small base stations (micro, pico and femto). A digital predistortion technique utilizing spectral extrapolation is proposed in this thesis, wherein with band-limited feedback signal, the requirement on ADC speed can be significantly released. Experimental results have validated the feasibility of the proposed technique for coping with band-limited feedback signal. It has been shown that adequate linearization performance can be achieved even if the acquisition bandwidth is less than the original signal bandwidth. The experimental results obtained by using LTE-Advanced signal of 320 MHz bandwidth are quite satisfactory, and to the authors’ knowledge, this is the first high-performance wideband DPD ever been reported. 3) To address the predicament that mobile operators do not have enough contiguous usable bandwidth, carrier aggregation (CA) technique is developed and imported into 4G LTE-Advanced. This pushes the utilization of concurrent dual-band transmitter/receiver, which reduces the hardware expense by using a single front-end. Compensation techniques for the respective concurrent dual-band transmitter and receiver front-ends are proposed to combat the inter-band modulation distortion, and simultaneously reduce the distortion for the both lower-side band and upper-side band signals.電気通信大学201

Energy management techniques for ultra-small bio-medical implants

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.Includes bibliographical references (p. 167-174).Trends in the medical industry have created a growing demand for implantable medical devices. In particular, the need to provide medical professionals a means to continuously monitor bio-markers over long time scales with increased precision is paramount to efficient healthcare. To make medical implants more attractive, there is a need to reduce their size and power consumption. Small medical implants would allow for less invasive procedures and greater comfort for patients. The two primary limitations to the size of small medical implants are the batteries that provide energy to circuit and sensor components, and the antennas that enable wireless communication to terminals outside of the body. In this work we present energy management and low-power techniques to help solve the engineering challenges posed by using ultracapacitors for energy storage. A major problem with using any capacitor as an energy source is the fact that its voltage drops rapidly with decreasing charge. This leaves the circuit to cope with a large supply variation and can lead to energy being left on the capacitor when its voltage gets too low to supply a sufficient supply voltage for operation. Rather than use a single ultracapacitor, we demonstrate higher energy utilization by splitting a single capacitor into an array of capacitors that are progressively reconfigured as energy is drawn out. An energy management IC fabricated in 180-nm CMOS implements a stacking procedure that allows for more than 98% of the initial energy stored in the ultracapacitors to be removed before the output voltage drops unsuitably low for circuit operation. The second part of this work develops techniques for wide-input-range energy management. The first chip implementing stacking suffered an efficiency penalty by using a switchedcapacitor voltage regulator with only a single conversion ratio. In a second implementation, we introduce a better solution that preserves efficiency performance by using a multiple conversion ratio switched-capacitor voltage regulator. At any given input voltage from an ultracapcitor array, the switched-capacitor voltage regulator is configured to maximize efficiency. Fabricated in a 180-nm CMOS process, the chip achieves a peak efficiency of 90% and the efficiency does not fall below 70% for input voltages between 1.25 and 3 V.by William R. Sanchez.Ph.D

Measurement of Electromagnetic Interference Rejection Ratio for Precision Instrumentation Amplifiers

Electro-Magnetic Interference(EMI) degrades the perfomance of electronic systems. So, Amplifiers which are the basic building blocks used in the front-end of analog and mixed-signal Integrated Circuits (ICs) must be evaluated for EMI. This work introduces the most intriguing figure of merit, Electro-Magnetic Interference Rejection Ratio (EMIRR) to measure the EMI immunity of precision Instrumentation Amplifiers (INAs) that helps to select the EMI robust INAs for EMI critical applications. In this work, a new EMIRR measurement setup is implemented to measure the immunity of INAs for conducted EMI ranging from 10 MHz to 3 GHz. The shift in the DC offset voltage generated at the output of the INA due to RF rectification, is used to compute EMIRR. As part of the setup, the hardware evaluation board is designed and an automation test software is developed to run EMIRR measurements. Furthermore, EMIRR measurements are performed on several INAs with different specifications to compare and rank them on their EMI immunity levels. Additionally, with the help of EMIRR metric, suitable INAs for developing EMI-sensitive applications are proposed. Finally, the influence of amplifier bandwidth, the input capacitance, 50 Ω termination at the end of RF input trace, INA package parasitics and EMI filter bandwidth on EMIRR is analyzed with the measurement results

GHOST: A Graph Neural Network Accelerator using Silicon Photonics

Graph neural networks (GNNs) have emerged as a powerful approach for modelling and learning from graph-structured data. Multiple fields have since benefitted enormously from the capabilities of GNNs, such as recommendation systems, social network analysis, drug discovery, and robotics. However, accelerating and efficiently processing GNNs require a unique approach that goes beyond conventional artificial neural network accelerators, due to the substantial computational and memory requirements of GNNs. The slowdown of scaling in CMOS platforms also motivates a search for alternative implementation substrates. In this paper, we present GHOST, the first silicon-photonic hardware accelerator for GNNs. GHOST efficiently alleviates the costs associated with both vertex-centric and edge-centric operations. It implements separately the three main stages involved in running GNNs in the optical domain, allowing it to be used for the inference of various widely used GNN models and architectures, such as graph convolution networks and graph attention networks. Our simulation studies indicate that GHOST exhibits at least 10.2x better throughput and 3.8x better energy efficiency when compared to GPU, TPU, CPU and multiple state-of-the-art GNN hardware accelerators

Open Data and Models for Energy and Environment

This Special Issue aims at providing recent advancements on open data and models. Energy and environment are the fields of application.For all the aforementioned reasons, we encourage researchers and professionals to share their original works. Topics of primary interest include, but are not limited to:Open data and models for energy sustainability;Open data science and environment applications;Open science and open governance for Sustainable Development Goals;Key performance indicators of data-aware energy modelling, planning and policy;Energy, water and sustainability database for building, district and regional systems; andBest practices and case studies

Analysis of wideband phased array beamforming at millimeter wave frequencies

Abstract. Industries are undergoing an information and communication technology-driven transformation as the world becomes increasingly digitally and globally linked. 5G technology provides a common basis for providing the multiple vertical sectors with a more cost-effective, open, and wide ecosystem solutions. Due to the generally large attainable bandwidths, high frequency technologies have emerged as a promising solution for future wireless communications and attracted great interest in the literature. The millimeter wave (mmWave), i.e., the frequency range 30–300 GHz, would enable the exploitation of tens of gigahertz transmission bands, resulting in a massive channel capacities of even over one Tbps. However, one of the most challenging issues in high-frequency communication connections is the significant channel losses that require highly directional antennas and, in most cases, line-of-sight link between the transmitter and receiver. In this thesis, we study the beamforming design for wideband systems with different bandwidths. The simulation results show that with a larger bandwidth, the power loss increases with the beamforming angle. The loss of power behavior due to beam squinting effect is quite similar over different distances

Low Power Digital Filter Implementation in FPGA

Digital filters suitable for hearing aid application on low power perspective have been developed and implemented in FPGA in this dissertation. Hearing aids are primarily meant for improving hearing and speech comprehensions. Digital hearing aids score over their analog counterparts. This happens as digital hearing aids provide flexible gain besides facilitating feedback reduction and noise elimination. Recent advances in DSP and Microelectronics have led to the development of superior digital hearing aids. Many researchers have investigated several algorithms suitable for hearing aid application that demands low noise, feedback cancellation, echo cancellation, etc., however the toughest challenge is the implementation. Furthermore, the additional constraints are power and area. The device must consume as minimum power as possible to support extended battery life and should be as small as possible for increased portability. In this thesis we have made an attempt to investigate possible digital filter algorithms those are hardware configurable on low power view point. Suitability of decimation filter for hearing aid application is investigated. In this dissertation decimation filter is implemented using ‘Distributed Arithmetic’ approach.While designing this filter, it is observed that, comb-half band FIR-FIR filter design uses less hardware compared to the comb-FIR-FIR filter design. The power consumption is also less in case of comb-half band FIR-FIR filter design compared to the comb-FIR-FIR filter. This filter is implemented in Virtex-II pro board from Xilinx and the resource estimator from the system generator is used to estimate the resources. However ‘Distributed Arithmetic’ is highly serial in nature and its latency is high; power consumption found is not very low in this type of filter implementation. So we have proceeded for ‘Adaptive Hearing Aid’ using Booth-Wallace tree multiplier. This algorithm is also implemented in FPGA and power calculation of the whole system is done using Xilinx Xpower analyser. It is observed that power consumed by the hearing aid with Booth-Wallace tree multiplier is less than the hearing aid using Booth multiplier (about 25%). So we can conclude that the hearing aid using Booth-Wallace tree multiplier consumes less power comparatively. The above two approached are purely algorithmic approach. Next we proceed to combine circuit level VLSI design and with algorithmic approach for further possible reduction in power. A MAC based FDF-FIR filter (algorithm) that uses dual edge triggered latch (DET) (circuit) is used for hearing aid device. It is observed that DET based MAC FIR filter consumes less power than the traditional (single edge triggered, SET) one (about 41%). The proposed low power latch provides a power saving upto 65% in the FIR filter. This technique consumes less power compared to previous approaches that uses low power technique only at algorithmic abstraction level. The DET based MAC FIR filter is tested for real-time validation and it is observed that it works perfectly for various signals (speech, music, voice with music). The gain of the filter is tested and is found to be 27 dB (maximum) that matches with most of the hearing aid (manufacturer’s) specifications. Hence it can be concluded that FDF FIR digital filter in conjunction with low power latch is a strong candidate for hearing aid application

Design Techniques of Highly Integrated Hybrid-Switched-Capacitor-Resonant Power Converters for LED Lighting Applications

The Light-emitting diodes (LEDs) are rapidly emerging as the dominant light source given their high luminous efficacy, long lift span, and thanks to the newly enacted efficiency standards in favor of the more environmentally-friendly LED technology. The LED lighting market is expected to reach USD 105.66 billion by 2025. As such, the lighting industry requires LED drivers, which essentially are power converters, with high efficiency, wide input/output range, low cost, small form factor, and great performance in power factor, and luminance flicker. These requirements raise new challenges beyond the traditional power converter topologies. On the other hand, the development and improvement of new device technologies such as printed thin-film capacitors and integrated high voltage/power devices opens up many new opportunities for mitigating such challenges using innovative circuit design techniques and solutions. Almost all electric products needs certain power delivery, regulation or conversion circuits to meet the optimized operation conditions. Designing a high performance power converter is a real challenge given the market’s increasing requirements on energy efficiency, size, cost, form factor, EMI performance, human health impact, and so on. The design of a LED driver system covers from high voltage AC/DC and DC/DC power converters, to high frequency low voltage digital controllers, to power factor correction (PFC) and EMI filtering techniques, and to safety solutions such as galvanic isolation. In this thesis, we study design challenges and present corresponding solutions to realize highly integrated and high performance LED drivers combining switched-capacitor and resonant converters, applying re-configurable multi-level circuit topology, utilizing sigma delta modulation, and exploring capacitive galvanic isolation. A hybrid switched-capacitor-resonant (HSCR) LED driver based on a stackable switched-capacitor (SC) converter IC rated for 15 to 20 W applications. Bulky transformers have been replaced with a SC ladder to perform high-efficiency voltage step-down conversion; an L-C resonant output network provides almost lossless current regulation and demonstrates the potential of capacitive galvanic isolation. The integrated SC modules can be stacked in the voltage domain to handle a large range of input voltage ranges that largely exceed the voltage limitation of the medium-voltage-rated 120 V silicon technology. The LED driver demonstrates > 91% efficiency over a rectified input DC voltage range from 160 VDC to 180 VDC with two stacked ICs; using a stack of four ICs > 89.6% efficiency is demonstrated over an input range from 320 VDC to 360 VDC . The LED driver can dim its output power to around 10% of the rated power while maintaining >70% efficiency with a PWM controlled clock gating circuit. Next, the design of AC main rectifier and inverter front end with sigma delta modulation is described. The proposed circuits features a pair of sigma delta controlled multilevel converters. The first is a multilevel rectifier responsible for PFC and dimming. The second is a bidirectional multilevel inverter used to cancel AC power ripple from the DC bus. The system also contains an output stage that powers the LEDs with DC and provides for galvanic isolation. Its functional performance indicates that integrated multilevel converters are a viable topology for lighting and other similar applications