848 research outputs found
CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit
This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS circuit primitives and their respective merits and drawbacks, the paper proposes a synthesis approach for PWL dynamic systems, based on state-variable methods, and identifies the associated analog operators. The GmC approach, combining quasi-linear VCCS's, PWL VCCS's, and capacitors is then explored regarding the implementation of these operators. CMOS basic building blocks for the realization of the quasi-linear VCCS's and PWL VCCS's are presented and applied to design a Chua's circuit IC. The influence of GmC parasitics on the performance of dynamic PWL systems is illustrated through this example. Measured chaotic attractors from a Chua's circuit prototype are given. The prototype has been fabricated in a 2.4- mu m double-poly n-well CMOS technology, and occupies 0.35 mm/sup 2/, with a power consumption of 1.6 mW for a +or-2.5-V symmetric supply. Measurements show bifurcation toward a double-scroll Chua's attractor by changing a bias current
PVT-Robust CMOS Programmable Chaotic Oscillator: Synchronization of Two 7-Scroll Attractors
Designing chaotic oscillators using complementary metal-oxide-semiconductor (CMOS) integrated circuit technology for generating multi-scroll attractors has been a challenge. That way, we introduce a current-mode piecewise-linear (PWL) function based on CMOS cells that allow programmable generation of 2â7-scroll chaotic attractors. The mathematical model of the chaotic oscillator designed herein has four coefficients and a PWL function, which can be varied to provide a high value of the maximum Lyapunov exponent. The coefficients are implemented electronically by designing operational transconductance amplifiers that allow programmability of their transconductances. Design simulations of the chaotic oscillator are provided for the 0.35ÎŒ m CMOS technology. Post-layout and processâvoltageâtemperature (PVT) variation simulations demonstrate robustness of the multi-scroll chaotic attractors. Finally, we highlight the synchronization of two seven-scroll attractors in a masterâslave topology by generalized Hamiltonian forms and observer approach. Simulation results show that the synchronized CMOS chaotic oscillators are robust to PVT variations and are suitable for chaotic secure communication applications.Universidad AutĂłnoma de Tlaxcala CACyPI-UATx-2017Program to Strengthen Quality in Educational Institutions C/PFCE-2016-29MSU0013Y-07-23National Council for Science and Technology 237991 22284
Oscillation-based DFT for Second-order Bandpass OTA-C Filters
This document is the Accepted Manuscript version. Under embargo until 6 September 2018. The final publication is available at Springer via https://doi.org/10.1007/s00034-017-0648-9.This paper describes a design for testability technique for second-order bandpass operational transconductance amplifier and capacitor filters using an oscillation-based test topology. The oscillation-based test structure is a vectorless output test strategy easily extendable to built-in self-test. The proposed methodology converts filter under test into a quadrature oscillator using very simple techniques and measures the output frequency. Using feedback loops with nonlinear block, the filter-to-oscillator conversion techniques easily convert the bandpass OTA-C filter into an oscillator. With a minimum number of extra components, the proposed scheme requires a negligible area overhead. The validity of the proposed method has been verified using comparison between faulty and fault-free simulation results of Tow-Thomas and KHN OTA-C filters. Simulation results in 0.25ÎŒm CMOS technology show that the proposed oscillation-based test strategy for OTA-C filters is suitable for catastrophic and parametric faults testing and also effective in detecting single and multiple faults with high fault coverage.Peer reviewedFinal Accepted Versio
Novel active function blocks and their applications in frequency filters and quadrature oscillators
KmitoÄtovĂ© filtry a sinusoidnĂ oscilĂĄtory jsou lineĂĄrnĂ elektronickĂ© obvody, kterĂ© jsou pouĆŸĂvĂĄny v ĆĄirokĂ© oblasti elektroniky a jsou zĂĄkladnĂmi stavebnĂmi bloky v analogovĂ©m zpracovĂĄnĂ signĂĄlu. V poslednĂ dekĂĄdÄ pro tento ĂșÄel bylo prezentovĂĄno velkĂ© mnoĆŸstvĂ stavebnĂch funkÄnĂch blokĆŻ. V letech 2000 a 2006 na Ăstavu telekomunikacĂ, VUT v BrnÄ byly definovĂĄny univerzĂĄlnĂ proudovĂœ konvejor (UCC) a univerzĂĄlnĂ napÄt'ovĂœ konvejor (UVC) a vyrobeny ve spoluprĂĄci s firmou AMI Semiconductor Czech, Ltd. OvĆĄem, stĂĄle existuje poĆŸadavek na vĂœvoj novĂœch aktivnĂch prvkĆŻ, kterĂ© nabĂzejĂ novĂ© vĂœhody. HlavnĂ pĆĂnos prĂĄce proto spoÄĂvĂĄ v definici dalĆĄĂch pĆŻvodnĂch aktivnĂch stavebnĂch blokĆŻ jako jsou differential-input buffered and transconductance amplifier (DBTA), current follower transconductance amplifier (CFTA), z-copy current-controlled current inverting transconductance amplifier (ZC-CCCITA), generalized current follower differential input transconductance amplifier (GCFDITA), voltage gain-controlled modified current-feedback operational amplifier (VGC-MCFOA), a minus-type current-controlled third-generation voltage conveyor (CC-VCIII-). PomocĂ navrĆŸenĂœch aktivnĂch stavebnĂch blokĆŻ byly prezentovĂĄny pĆŻvodnĂ zapojenĂ fĂĄzovacĂch ÄlĂĄnkĆŻ prvnĂho ĆĂĄdu, univerzĂĄlnĂ filtry druhĂ©ho ĆĂĄdu, ekvivalenty obvodu typu KHN, inverznĂ filtry, aktivnĂ simulĂĄtory uzemnÄnĂ©ho induktoru a kvadraturnĂ sinusoidnĂ oscilĂĄtory pracujĂcĂ v proudovĂ©m, napÄt'ovĂ©m a smĂĆĄenĂ©m mĂłdu. ChovĂĄnĂ navrĆŸenĂœch obvodĆŻ byla ovÄĆena simulacĂ v prostĆedĂ SPICE a ve vybranĂœch pĆĂpadech experimentĂĄlnĂm mÄĆenĂm.Frequency filters and sinusoidal oscillators are linear electric circuits that are used in wide area of electronics and also are the basic building blocks in analogue signal processing. In the last decade, huge number of active building blocks (ABBs) were presented for this purpose. In 2000 and 2006, the universal current conveyor (UCC) and the universal voltage conveyor (UVC), respectively, were designed at the Department of Telecommunication, BUT, Brno, and produced in cooperation with AMI Semiconductor Czech, Ltd. There is still the need to develop new active elements that offer new advantages. The main contribution of this thesis is, therefore, the definition of other novel ABBs such as the differential-input buffered and transconductance amplifier (DBTA), the current follower transconductance amplifier (CFTA), the z-copy current-controlled current inverting transconductance amplifier (ZC-CCCITA), the generalized current follower differential input transconductance amplifier (GCFDITA), the voltage gain-controlled modified current-feedback operational amplifier (VGC-MCFOA), and the minus-type current-controlled third-generation voltage conveyor (CC-VCIII-). Using the proposed ABBs, novel structures of first-order all-pass filters, second-order universal filters, KHN-equivalent circuits, inverse filters, active grounded inductance simulators, and quadrature sinusoidal oscillators working in the current-, voltage-, or mixed-mode are presented. The behavior of the proposed circuits has been verified by SPICE simulations and in selected cases also by experimental measurements.
Integrated chaos generators
This paper surveys the different design issues, from mathematical model to silicon, involved on the design of integrated circuits for the generation of chaotic behavior.ComisiĂłn Interministerial de Ciencia y TecnologĂa 1FD97-1611(TIC)European Commission ESPRIT 3110
Modeling Deterministic Chaos Using Electronic Circuits
This paper brings a note on systematic circuit synthesis methods for modeling the dynamical systems given by mathematical model. Both classical synthesis and integrator based method is demonstrated via the relatively complicated real physical systems with possible chaotic solution. A variety of the different active building blocks are utilized to make the final circuits as simple as possible while preserving easily measurable voltage-mode state variables. Brief experimental verification, i.e. oscilloscope screenshots, is presented. The observed attractors have some structural stability and good relationship to their numerically integrated counterparts
A proportional plus a hysteretic term control design: a throttle experimental emulation to wind turbines pitch control
Pitch control is a relevant issue in wind turbines to properly operate the angle of the blades. Therefore, this control system pitches the blades usually a few degrees every time the wind changes in order to keep the rotor blades at the required angle thus controlling the rotational speed of the turbine. All the same time, the control of the pitch angle is not easy due to the system behavior being highly nonlinear. Consequently, the main objective of this paper is to depict an easy to implement control design based on a proportional controller and a hysteretic term to an emulator pitch control system in wind turbines. This emulator is just an automotive throttle device. This mechanical body dynamically captures some hard non-linearities presented in pitch wind turbine mechanisms, such as backlash, asymmetrical non-lineal effects, friction, and load variations. Even under strong non-linear effects that are difficult to model, a proportional controller and a hysteretic term may satisfy the main control design objective. Hence, a recent control design is developed and applied to a throttle system. We invoke the Lyapunov theory to confirm stability of the resultant closed-loop system. In addition, the proposed control approach is completely implemented by using operational amplifiers. Hence, no digital units are required at all. Moreover, the cost of the developed experimental platform and its outcomes are inexpensive. According to the experimental results, the controller performance seems
acceptable, and validating of the control contribution too. For instance, a settling-time of about 0.03 s to a unit step-response is obtained.Peer ReviewedPostprint (published version
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