Current measurement in power electronic and motor drive applications - a comprehensive study

Current measurement has many applications in power electronics and motor drives. Current measurement is used for control, protection, monitoring, and power management purposes. Parameters such as low cost, accuracy, high current measurement, isolation needs, broad frequency bandwidth, linearity and stability with temperature variations, high immunity to dv/dt, low realization effort, fast response time, and compatibility with integration process are required to ensure high performance of current sensors. Various current sensing techniques based on different physical effects such as Faraday\u27s induction law, Ohm\u27s law, Lorentz force law, magneto-resistance effect, and magnetic saturation are studied in this thesis. Review and examination of these current measurement methods are presented. The most common current sensing method is to insert a sensing resistor in the path of an unknown current. This method incurs significant power loss in a sense resistor at high output currents. Alternatives for accurate and lossless current measurement are presented in this thesis. Various current sensing techniques with self-tuning and self-calibration for accurate and continuous current measurement are also discussed. Isolation and large bandwidth from dc to several kilo-hertz or mega-hertz are the most difficult, but also most crucial characteristics of current measurement. Electromagnetic-based current sensing techniques, which are used to achieve these characteristics, are analyzed. Many applications require average current information for control purposes. Different average current sensing methods of measuring average current are also reviewed. --Abstract, page iii

Low-to-Medium Power Single Chip Digital Controlled DC-DC Regulator for Point-of-Load Applications

A DC-DC converter for generating a DC output voltage includes: a digitally controlled pulse width modulator (DPWM) for controlling a switching power stage to supply a varying voltage to an inductor; and a digital voltage feedback circuit for controlling the DPWM in accordance with a feedback voltage corresponding to the DC output voltage, the digital voltage feedback circuit including: a first voltage controlled oscillator for converting the feedback voltage into a first frequency signal and to supply the first frequency signal to a first frequency discriminator; a second voltage controlled oscillator for converting a reference voltage into a second frequency signal and to supply the second frequency signal to a second frequency discriminator; a digital comparator for comparing digital outputs of the first and second frequency discriminators and for outputting a digital feedback signal; and a controller for controlling the DPWM in accordance with the digital feedback signal

Control And Topology Improvements In Half-bridge Dc-dc Converters

Efficiency and transient response are two key requirements for DC-DC converters. Topology and control are two key topics in this dissertation. A variety of techniques for DC-DC converter performance improvement are presented in this work. Focusing on the efficiency issue, a variety of clamping techniques including both active and passive methods are presented after the ringing issues in DC-DC converters are investigated. By presenting the clamping techniques, a big variety of energy management concepts are introduced. The active bridge-capacitor tank clamping and FET-diode-capacitor tank clamping are close ideas, which transfer the leakage inductor energy to clamping capacitor to prevent oscillation between leakage inductor and junction capacitor of MOSFETs. The two-FET-clamping tank employs two MOSFETs to freewheeling the leakage current when the main MOSFETs of the half-bridge are both off. Driving voltage variation on the secondary side Synchronous Rectifier (SR) MOSFETs in self-driven circuit due to input voltage variation in bus converter applications is also investigated. One solution with a variety of derivations is proposed using zerner-capacitor combination to clamping the voltage while maintaining reasonable power losses. Another efficiency improvement idea comes from phase-shift concept in DC-DC converters. By employing phase-shift scheme, the primary side and the secondary side two MOSFETs have complementary driving signals respectively, which allow the MOSFET to be turned on with Zero Voltage Switching (ZVS). Simulation verified the feasibility of the proposed phase-shifted DC-DC converter. From the control scheme point of view, a novel peak current mode control concept for half-bridge topologies is presented. Aiming at compensating the imbalanced voltage due to peak current mode control in symmetric half-bridge topologies, an additional voltage compensation loop is used to bring the half-bridge capacitor voltage back to balance. In the proposed solutions, one scheme is applied on symmetric half-bridge topology and the other one is applied on Duty-cycle-shifted (DCS) half-bridge topology. Both schemes employ simple circuitry and are suitable for integration. Loop stability issues are also investigated in this work. Modeling work shows the uncompensated half-bridge topology cannot be stabilized under all conditions and the additional compensation loop helps to prevent the voltage imbalance effectively

Image compression and energy harvesting for energy constrained sensors

Title from PDF of title page, viewed on June 21, 2013Dissertation advisor: Walter D. Leon-SalasVitaIncludes bibliographic references (pages 176-[187])Thesis (Ph.D.)--School of Computing and Engineering. University of Missouri--Kansas City, 2013The advances in complementary metal-oxide-semiconductor (CMOS) technology have led to the integration of all components of electronic system into a single integrated circuit. Ultra-low power circuit techniques have reduced the power consumption of circuits. Moreover, solar cells with improved efficiency can be integrated on chip to harvest energy from sunlight. As a result of all the above, a new class of miniaturized electronic systems known as self-powered system on a chip has emerged. There is an increasing research interest in the area of self-powered devices which provide cost-effective solutions especially when these devices are used in the areas that changing or replacing batteries is too costly. Therefore, image compression and energy harvesting are studied in this dissertation. The integration of energy harvesting, image compression, and an image sensor on the same chip provides the energy source to charge a battery, reduces the data rate, and improves the performance of wireless image sensors. Integrated circuits of image compression, solar energy harvesting, and image sensors are studied, designed, and analyzed in this work. In this dissertation, a hybrid image sensor that can perform the tasks of sensing and energy harvesting is presented. Photodiodes of hybrid image sensor can be programmed as image sensors or energy harvesting cells. The hybrid image sensor can harvest energy in between frames, in sleep mode, and even when it is taking images. When sensing images and harvesting energy are both needed at the same time, some pixels have to work as sensing pixels, and the others have to work as solar cells. Since some pixels are devoted to harvest energy, the resolution of the image will be reduced. To preserve the resolution or to keep the fair resolution when a lot of energy collection is needed, image reconstruction algorithms and compressive sensing theory provide solutions to achieve a good image quality. On the other hand, when the battery has enough charge, image compression comes into the picture. Multiresolution decomposition image compression provides a way to compress image data in order to reduce the energy need from data transmission. The solution provided in this dissertation not only harvests energy but also saves energy resulting long lasting wireless sensors. The problem was first studied at the system level to identify the best system-level configuration which was then implemented on silicon. As a proof of concept, a 32 x 32 array of hybrid image sensor, a 32 x 32 array of image sensor with multiresolution decomposition compression, and a compressive sensing converter have been designed and fabricated in a standard 0.5 [micrometer] CMOS process. Printed circuit broads also have been designed to test and verify the proposed and fabricated chips. VHDL and Matlab codes were written to generate the proper signals to control, and read out data from chips. Image processing and recovery were carried out in Matlab. DC-DC converters were designed to boost the inherently low voltage output of the photodiodes. The DC-DC converter has also been improved to increase the efficiency of power transformation.Introduction -- Hybrid imager system and circuit design -- Hybrid imager energy harvesting and image acquisition results and discussion -- Detailed description and mathematical analysis for a circuit of energy harvesting using on-chip solar cells -- Multiresolution decomposition for lossless and near-lossless compression -- An incremental [sigma-delta] converter for compressive sensing -- Detailed description of a sigma-delta random demodulator converter architecture for compressive sensing applications -- Conclusion -- Appendix A. Chip pin-out -- Appendix B. Schematics -- Appendix C. Pictures of custom PC

Double Resonant High-Frequency Converters for Wireless Power Transfer

This thesis describes novel techniques and developments in the design and implementation of a low power radio frequency (40kHz to 1MHz) wireless power transfer (WPT) system, with an application in the wireless charging of autonomous drones without physical connection to its on-board Battery Management System (BMS). The WPT system is developed around a matrix converter exploiting the benefits such as a small footprint (DC-link free), high efficiency and high power density. The overall WPT system topology discussed in this thesis is based on the current state-of-the-art found in literature, but enhancements are made through novel methods to further improve the converter’s stability, reduce control complexity and improve the wireless power efficiency. In this work, each part of the system is analysed and novel techniques are proposed to achieve improvements. The WPT system design methodology presented in this thesis commences with the use of a conventional full-bridge converter. For cost-efficiency and to improve the converters stability, a novel gate drive circuit is presented which provides self-generated negative bias such that a bipolar MOSFET drive can be driven without an additional voltage source or magnetic component. The switching control sequences for both a full-bridge and single phase to single phase matrix converter are analysed which show that the switching of a matrix converter can be considered to be the same as a full-bridge converter under certain conditions. A middleware is then presented that reduces the complexity of the control required for a matrix converter and enables control by a conventional full-bridge controller (i.e. linear controller or microcontroller). A novel technique that can maximise and maintain in real-time the WPT efficiency is presented using a maximum efficiency point tracking approach. A detailed study of potential issues that may affect the implementation of this novel approach are presented and new solutions are proposed. A novel wireless pseudo-synchronous sampling method is presented and implemented on a prototype system to realise the maximum efficiency point tracking approach. Finally, a new hybrid wireless phase-locked loop is presented and implemented to minimise the bandwidth requirements of the maximum efficiency point tracking approach. The performance and methods for implementation of the novel concepts introduced in this thesis are demonstrated through a number of prototypes that were built. These include a matrix converter and two full WPT systems with operating frequencies ranging from sub-megahertz to megahertz level. Moreover, the final prototype is applied to the charging of a quadcopter battery pack to successfully charge the pack wirelessly whilst actively balancing the cells. Hence, fast battery charging and cell balancing, which conventionally requires battery removal, can be achieved without re-balance the weight of the UAV

High-power converters for space applications

Phase 1 was a concept definition effort to extend space-type dc/dc converter technology to the megawatt level with a weight of less than 0.1 kg/kW (220 lb./MW). Two system designs were evaluated in Phase 1. Each design operates from a 5 kV stacked fuel cell source and provides a voltage step-up to 100 kV at 10 A for charging capacitors (100 pps at a duty cycle of 17 min on, 17 min off). Both designs use an MCT-based, full-bridge inverter, gaseous hydrogen cooling, and crowbar fault protection. The GE-CRD system uses an advanced high-voltage transformer/rectifier filter is series with a resonant tank circuit, driven by an inverter operating at 20 to 50 kHz. Output voltage is controlled through frequency and phase shift control. Fast transient response and stability is ensured via optimal control. Super-resonant operation employing MCTs provides the advantages of lossless snubbing, no turn-on switching loss, use of medium-speed diodes, and intrinsic current limiting under load-fault conditions. Estimated weight of the GE-CRD system is 88 kg (1.5 cu ft.). Efficiency of 94.4 percent and total system loss is 55.711 kW operating at 1 MW load power. The Maxwell system is based on a resonance transformer approach using a cascade of five LC resonant sections at 100 kHz. The 5 kV bus is converted to a square wave, stepped-up to a 100 kV sine wave by the LC sections, rectified, and filtered. Output voltage is controlled with a special series regulator circuit. Estimated weight of the Maxwell system is 83.8 kg (4.0 cu ft.). Efficiency is 87.2 percent and total system loss is 146.411 kW operating at 1 MW load power

An Inductor Emulator Approach to Peak Current-mode Control in a 4-Phase Buck Regulator

abstract: High-efficiency DC-DC converters make up one of the important blocks of state-of-the-art power supplies. The trend toward high level of transistor integration has caused load current demands to grow significantly. Supplying high output current and minimizing output current ripple has been a driving force behind the evolution of Multi-phase topologies. Ability to supply large output current with improved efficiency, reduction in the size of filter components, improved transient response make multi-phase topologies a preferred choice for low voltage-high current applications. Current sensing capability inside a system is much sought after for applications which include Peak-current mode control, Current limiting, Overload protection. Current sensing is extremely important for current sharing in Multi-phase topologies. Existing approaches such as Series resistor, SenseFET, inductor DCR based current sensing are simple but their drawbacks such low efficiency, low accuracy, limited bandwidth demand a novel current sensing scheme. This research presents a systematic design procedure of a 5V - 1.8V, 8A 4-Phase Buck regulator with a novel current sensing scheme based on replication of the inductor current. The proposed solution consists of detailed system modeling in PLECS which includes modification of the peak current mode model to accommodate the new current sensing element, derivation of power-stage and Plant transfer functions, Controller design. The proposed model has been verified through PLECS simulations and compared with a transistor-level implementation of the system. The time-domain parameters such as overshoot and settling-time simulated through transistor-level implementation is in close agreement with the results obtained from the PLECS model.Dissertation/ThesisMasters Thesis Electrical Engineering 201

Design and Control of Power Converters for High Power-Quality Interface with Utility and Aviation Grids

Power electronics as a subject integrating power devices, electric and electronic circuits, control, and thermal and mechanic design, requires not only knowledge and engineering insight for each subarea, but also understanding of interface issues when incorporating these different areas into high performance converter design.Addressing these fundamental questions, the dissertation studies design and control issues in three types of power converters applied in low-frequency high-power transmission, medium-frequency converter emulated grid, and high-frequency high-density aviation grid, respectively, with the focus on discovering, understanding, and mitigating interface issues to improve power quality and converter performance, and to reduce the noise emission.For hybrid ac/dc power transmission,• Analyze the interface transformer saturation issue between ac and dc power flow under line unbalances.• Proposed both passive transformer design and active hybrid-line-impedance-conditioner to suppress this issue.For transmission line emulator,• Propose general transmission line emulation schemes with extension capability.• Analyze and actively suppress the effects of sensing/sampling bias and PWM ripple on emulation considering interfaced grid impedance.• Analyze the stability issue caused by interaction of the emulator and its interfaced impedance. A criterion that determines the stability and impedance boundary of the emulator is proposed.For aircraft battery charger,• Investigate architectures for dual-input and dual-output battery charger, and a three-level integrated topology using GaN devices is proposed to achieve high density.• Identify and analyze the mechanisms and impacts of high switching frequency, di/dt, dv/dt on sensing and power quality control; mitigate solutions are proposed.• Model and compensate the distortion due to charging transition of device junction capacitances in three-level converters.• Find the previously overlooked device junction capacitance of the nonactive devices in three-level converters, and analyze the impacts on switching loss, device stress, and current distortion. A loss calculation method is proposed using the data from the conventional double pulse tester.• Establish fundamental knowledge on performance degradation of EMI filters. The impacts and mechanisms of both inductive and capacitive coupling on different filter structures are understood. Characterization methodology including measuring, modeling, and prediction of filter insertion loss is proposed. Mitigation solutions are proposed to reduce inter-component coupling and self-parasitics

Study of the generator/motor operation of induction machines in a high frequency link space power system

Static power conversion systems have traditionally utilized dc current or voltage source links for converting power from one ac or dc form to another since it readily achieves the temporary energy storage required to decouple the input from the output. Such links, however, result in bulky dc capacitors and/or inductors and lead to relatively high losses in the converters due to stresses on the semiconductor switches. The feasibility of utilizing a high frequency sinusoidal voltage link to accomplish the energy storage and decoupling function is examined. In particular, a type of resonant six pulse bridge interface converter is proposed which utilizes zero voltage switching principles to minimize switching losses and uses an easy to implement technique for pulse density modulation to control the amplitude, frequency, and the waveshape of the synthesized low frequency voltage or current. Adaptation of the proposed topology for power conversion to single-phase ac and dc voltage or current outputs is shown to be straight forward. The feasibility of the proposed power circuit and control technique for both active and passive loads are verified by means of simulation and experiment