26 research outputs found

    Ethernet-based AFDX simulation and time delay analysis

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    Nowadays, new civilian aircraft have applied new technology and the amount of embedded systems and functions raised. Traditional avionics data buses design can‘t meet the new transmission requirements regarding weight and complexity due to the number of needed buses. On the other hand, Avionics Full Duplex Switched Ethernet (AFDX) with sufficient bandwidth and guaranteed services is considered as the next generation of avionics data bus. One of the important issues in Avionics Full Duplex Switched Ethernet is to ensure the data total time delay to meet the requirements of the safety-critical systems on aircraft such as flight control system. This research aims at developing an AFDX time delay model which can be used to analyse the total time delay of the AFDX network. By applying network calculus approach, both (σ,ρ) model and Generic Cell Rate Algorithm (GCRA) model are introduced. For tighter time-delay result, GCRA model is applied. Meanwhile, the current AFDX network simulation platform, FACADE, will be enhanced by adding new functions. Moreover, avionics application simulation modules are developed to exchange data with FACADE. The total time delay analysis will be performed on the improved FACADE to validate this AFDX network simulation platform in several scenarios. Moreover, each scenario is appropriated to study the association between total time delay performance and individual variable. The results from updated FACADE reflect the correlation between total time delay and certain variables. Larger BAG and more switches between source and destination end systems introduce larger total time delay while Lmax could also affect the total time delay. However, the results illustrate that the total time delays from updated FACADE are much larger than GCRA time delay model which could up to 10 times which indicates that this updated FACADE needs further improvement

    Interconnection optimization for multi-cluster avionics networks

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    National audienceThe increasing complexity and heterogeneity of avionics networks make resource optimization a challenging task. In contrast to many previous approaches pursuing the optimization of traffic-source mapping and backbone network analysis, our work presented herein mainly focuses on the optimization of interconnection devices for multi-cluster avionics networks. In this paper, we introduce an optimized interconnection device, integrating novel frame packing strategies and schedulability analysis to enhance the communications between an AFDX-like backbone network and various peripheral sensor/actuator networks in terms of resource savings. The performance analysis conducted on a representative avionics communication architecture highlights the efficiency of our proposal to save resources particularly consumed bandwidth. These latter is considered as an important feature for avionics applications to guarantee easy incremental design during the long lifetime of an aircraft

    Analysis and optimiozation of heterogeneous avionics networks

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    The aim of my thesis is to provide a resources-efficient gateway to connect Input/Output (I/O) CAN buses to a backbone network based on AFDX technology, in modern avionics communication architectures. Currently, the Remote Data Concentrator (RDC) is the main standard for gateways in avionics; and the existing implementations do not integrate any resource management mechanism. To handle these limitations, we design an enhanced CAN-AFDX RDC integrating new functions: (i) Frame Packing (FP) allowing to reduce communication overheads with reference to the currently used "1 to 1" frame conversion strategy; (ii) Hierarchical Traffic Shaping (HTS) to reduce contention on the CAN bus. Furthermore, our proposed RDC allows the connection of multiple I/O CAN buses to AFDX while guaranteeing isolation between different criticality levels, using a software partitioning mechanism. To analyze the performance guarantees offered by our proposed RDC, we considered two metrics: the end-to-end latency and the induced AFDX bandwidth consumption. Furthermore, an optimization process was proposed to achieve an optimal configuration of our proposed RDC, i.e., minimizing the bandwidth utilization while meeting the real-time constraints of communication. Finally, the capacity of our proposed RDC to meet the emerging avionics requirements has been validated through a realistic avionics case study

    Analyse et optimisation des réseaux avioniques hétérogÚnes

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    La complexitĂ© des architectures de communication avioniques ne cesse de croĂźtre avec l’augmentation du nombre des terminaux interconnectĂ©s et l’expansion de la quantitĂ© des donnĂ©es Ă©changĂ©es. Afin de rĂ©pondre aux besoins Ă©mergents en terme de bande passante, latence et modularitĂ©, l’architecture de communication avionique actuelle consiste Ă  utiliser le rĂ©seau AFDX (Avionics Full DupleX Switched Ethernet) pour connecter les calculateurs et utiliser des bus d’entrĂ©e/sortie (par exemple le bus CAN (Controller Area Network)) pour connecter les capteurs et les actionneurs. Les rĂ©seaux ainsi formĂ©s sont connectĂ©s en utilisant des Ă©quipements d’interconnexion spĂ©cifiques, appelĂ©s RDC (Remote Data Concentrators) et standardisĂ© sous la norme ARINC655. Les RDCs sont des passerelles de communication modulaires qui sont reparties dans l’avion afin de gĂ©rer l’hĂ©tĂ©rogĂ©nĂ©itĂ© entre le rĂ©seau cƓur AFDX et les bus d’entrĂ©e/sortie. Certes, les RDCs permettent d’amĂ©liorer la modularitĂ© du systĂšme avionique et de rĂ©duire le coĂ»t de sa maintenance; mais, ces Ă©quipements sont devenus un des dĂ©fis majeurs durant la conception de l’architecture avionique afin de garantir les performances requises du systĂšme. Les implĂ©mentations existantes du RDC effectuent souvent une translation direct des trames et n’implĂ©mentent aucun mĂ©canisme de gestion de ressources. Or, une utilisation efficace des ressources est un besoin important dans le contexte avionique afin de faciliter l’évolution du systĂšme et l’ajout de nouvelles fonctions. Ainsi, l’objectif de cette thĂšse est la conception et la validation d’un RDC optimisĂ© implĂ©mentant des mĂ©canismes de gestion des ressources afin d’amĂ©liorer les performances de l’architecture de communication avionique tout en respectant les contraintes temporelles du systĂšme. Afin d’atteindre cet objectif, un RDC pour les architectures rĂ©seaux de type CAN-AFDX est conçu, intĂ©grant les fonctions suivantes: (i) groupement des trames appliquĂ© aux flux montants, i.e., flux gĂ©nĂ©rĂ©s par les capteurs et destinĂ©s Ă  l’AFDX, pour minimiser le coĂ»t des communication sur l’AFDX; (ii) la rĂ©gulation des flux descendants, i.e., flux gĂ©nĂ©rĂ©s par des terminaux AFDX et destinĂ©s aux actionneurs, pour rĂ©duire les contentions sur le bus CAN. Par ailleurs, notre RDC permet de connecter plusieurs bus CAN Ă  la fois tout en garantissant une isolation entre les flux. Par la suite, afin d’analyser l’impact de ce nouveau RDC sur les performances du systĂšme avionique, nous procĂ©dons Ă  la modĂ©lisation de l’architecture CAN-AFDX, et particuliĂšrement le RDC et ses nouvelles fonctions. Ensuite, nous introduisons une mĂ©thode d’analyse temporelle pour calculer des bornes maximales sur les dĂ©lais de bout en bout et vĂ©rifier le respect des contraintes temps-rĂ©el. Plusieurs configurations du RDC peuvent rĂ©pondre aux exigences du systĂšme avionique tout en offrant des Ă©conomies de ressources. Nous procĂ©dons donc au paramĂ©trage du RDC afin de minimiser la consommation de bande passante sur l’AFDX tout en respectant les contraintes temporelles. Ce problĂšme d’optimisation est considĂ©rĂ© comme NP-complet, et l’introduction des heuristiques adĂ©quates s’est avĂ©rĂ©e nĂ©cessaire afin de trouver la meilleure configuration possible du RDC. Enfin, les performances de ce nouveau RDC sont validĂ©es Ă  travers une architecture CAN-AFDX rĂ©aliste, avec plusieurs bus CAN et des centaines de flux Ă©changĂ©s. DiffĂ©rents niveaux d’utilisation des bus CAN ont Ă©tĂ© considĂ©rĂ©s et les rĂ©sultats obtenus ont montrĂ© l’efficacitĂ© de notre RDC Ă  amĂ©liorer la gestion des ressources du systĂšme avionique tout en respectant les contraintes temporelles de communication. En particulier, notre RDC offre une rĂ©duction de la bande passante AFDX allant jusqu’à 40% en comparaison avec le RDC actuellement utilisĂ©. ABSTRACT : The aim of my thesis is to provide a resources-efficient gateway to connect Input/Output (I/O) CAN buses to a backbone network based on AFDX technology, in modern avionics communication architectures. Currently, the Remote Data Concentrator (RDC) is the main standard for gateways in avionics; and the existing implementations do not integrate any resource management mechanism. To handle these limitations, we design an enhanced CAN-AFDX RDC integrating new functions: (i) Frame Packing (FP) allowing to reduce communication overheads with reference to the currently used "1 to 1" frame conversion strategy; (ii) Hierarchical Traffic Shaping (HTS) to reduce contention on the CAN bus. Furthermore, our proposed RDC allows the connection of multiple I/O CAN buses to AFDX while guaranteeing isolation between different criticality levels, using a software partitioning mechanism. To analyze the performance guarantees offered by our proposed RDC, we considered two metrics: the end-to-end latency and the induced AFDX bandwidth consumption. Furthermore, an optimization process was proposed to achieve an optimal configuration of our proposed RDC, i.e., minimizing the bandwidth utilization while meeting the real-time constraints of communication. Finally, the capacity of our proposed RDC to meet the emerging avionics requirements has been validated through a realistic avionics case study

    Worst-case delay analysis of real-time switched Ethernet networks with flow local synchronization

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    Les rĂ©seaux Ethernet commutĂ© full-duplex constituent des solutions intĂ©ressantes pour des applications industrielles. Mais le non-dĂ©terminisme d’un commutateur IEEE 802.1d, fait que l’analyse pire cas de dĂ©lai de flux critiques est encore un problĂšme ouvert. Plusieurs mĂ©thodes ont Ă©tĂ© proposĂ©es pour obtenir des bornes supĂ©rieures des dĂ©lais de communication sur des rĂ©seaux Ethernet commutĂ© full duplex temps rĂ©els, faisant l’hypothĂšse que le trafic en entrĂ©e du rĂ©seau peut ĂȘtre bornĂ©. Le problĂšme principal reste le pessimisme introduit par la mĂ©thode de calcul de cette borne supĂ©rieure du dĂ©lai. Ces mĂ©thodes considĂšrent que tous les flux transmis sur le rĂ©seau sont indĂ©pendants. Ce qui est vrai pour les flux Ă©mis par des nƓuds sources diffĂ©rents car il n’existe pas, dans le cas gĂ©nĂ©ral, d’horloge globale permettant de synchroniser les flux. Mais pour les flux Ă©mis par un mĂȘme nƓud source, il est possible de faire l’hypothĂšse d’une synchronisation locale de ces flux. Une telle hypothĂšse permet de bĂątir un modĂšle plus prĂ©cis des flux et en consĂ©quence Ă©limine des scĂ©narios impossibles qui augmentent le pessimisme du calcul. Le sujet principal de cette thĂšse est d’étudier comment des flux pĂ©riodiques synchronisĂ©s par des offsets peuvent ĂȘtre gĂ©rĂ©s dans le calcul des bornes supĂ©rieures des dĂ©lais sur un rĂ©seau Ethernet commutĂ© temps-rĂ©el. Dans un premier temps, il s’agit de prĂ©senter l’impact des contraintes d’offsets sur le calcul des bornes supĂ©rieures des dĂ©lais de bout en bout. Il s’agit ensuite de prĂ©senter comment intĂ©grer ces contraintes d’offsets dans les approches de calcul basĂ©es sur le Network Calculus et la mĂ©thode des Trajectoires. Une mĂ©thode Calcul RĂ©seau modifiĂ©e et une mĂ©thode Trajectoires modifiĂ©e sont alors dĂ©veloppĂ©es et les performances obtenues sont comparĂ©es. Le rĂ©seau avionique AFDX (Avionics Full-Duplex Switched Ethernet) est pris comme exemple d’un rĂ©seau Ethernet commutĂ© full-duplex. Une configuration AFDX industrielle avec un millier de flux est prĂ©sentĂ©e. Cette configuration industrielle est alors Ă©valuĂ©e Ă  l’aide des deux approches, selon un choix d’allocation d’offsets donnĂ©. De plus, diffĂ©rents algorithmes d’allocation des offsets sont testĂ©s sur cette configuration industrielle, pour trouver un algorithme d’allocation quasi-optimal. Une analyse de pessimisme des bornes supĂ©rieures calculĂ©es est alors proposĂ©e. Cette analyse est basĂ©e sur l’approche des trajectoires (rendue optimiste) qui permet de calculer une sous-approximation du dĂ©lai pire-cas. La diffĂ©rence entre la borne supĂ©rieure du dĂ©lai (calculĂ©e par une mĂ©thode donnĂ©e) et la sous-approximation du dĂ©lai pire cas donne une borne supĂ©rieure du pessimisme de la mĂ©thode. Cette analyse fournit des rĂ©sultats intĂ©ressants sur le pessimisme des approches Calcul RĂ©seau et mĂ©thode des Trajectoires. La derniĂšre partie de la thĂšse porte sur une architecture de rĂ©seau temps rĂ©el hĂ©tĂ©rogĂšne obtenue par connexion de rĂ©seaux CAN via des ponts sur un rĂ©seau fĂ©dĂ©rateur de type Ethernet commutĂ©. Deux approches, une basĂ©e sur les composants et l’autre sur les Trajectoires sont proposĂ©es pour permettre une analyse des dĂ©lais pire-cas sur un tel rĂ©seau. La capacitĂ© de calcul d’une borne supĂ©rieure des dĂ©lais pire-cas dans le contexte d’une architecture hĂ©tĂ©rogĂšne est intĂ©ressante pour les domaines industriels. ABSTRACT : Full-duplex switched Ethernet is a promising candidate for interconnecting real-time industrial applications. But due to IEEE 802.1d indeterminism, the worst-case delay analysis of critical flows supported by such a network is still an open problem. Several methods have been proposed for upper-bounding communication delays on a real-time switched Ethernet network, assuming that the incoming traffic can be upper bounded. The main problem remaining is to assess the tightness, i.e. the pessimism, of the method calculating this upper bound on the communication delay. These methods consider that all flows transmitted over the network are independent. This is true for flows emitted by different source nodes since, in general, there is no global clock synchronizing them. But the flows emitted by the same source node are local synchronized. Such an assumption helps to build a more precise flow model that eliminates some impossible communication scenarios which lead to a pessimistic delay upper bounds. The core of this thesis is to study how local periodic flows synchronized with offsets can be handled when computing delay upper-bounds on a real-time switched Ethernet. In a first step, the impact of these offsets on the delay upper-bound computation is illustrated. Then, the integration of offsets in the Network Calculus and the Trajectory approaches is introduced. Therefore, a modified Network Calculus approach and a modified Trajectory approach are developed whose performances are compared on an Avionics Full-DupleX switched Ethernet (AFDX) industrial configuration with one thousand of flows. It has been shown that, in the context of this AFDX configuration, the Trajectory approach leads to slightly tighter end-to-end delay upper bounds than the ones of the Network Calculus approach. But offsets of local flows have to be chosen. Different offset assignment algorithms are then investigated on the AFDX industrial configuration. A near-optimal assignment can be exhibited. Next, a pessimism analysis of the computed upper-bounds is proposed. This analysis is based on the Trajectory approach (made optimistic) which computes an under-estimation of the worst-case delay. The difference between the upper-bound (computed by a given method) and the under-estimation of the worst-case delay gives an upper-bound of the pessimism of the method. This analysis gives interesting comparison results on the Network Calculus and the Trajectory approaches pessimism. The last part of the thesis, deals with a real-time heterogeneous network architecture where CAN buses are interconnected through a switched Ethernet backbone using dedicated bridges. Two approaches, the component-based approach and the Trajectory approach, are developed to conduct a worst-case delay analysis for such a network. Clearly, the ability to compute end-to-end delays upper-bounds in the context of heterogeneous network architecture is promising for industrial domains

    Heterogeneous models and analyses in the design of real-time embedded systems - an avionic case-study

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    The development of embedded systems according to Model-Driven Development relies on two complementary activities: system mod- eling on the one hand and analysis of the non-functional properties, such as timing properties, on the other hand. Yet, the coupling be- tween models and analyses remains largely disregarded so far: e.g. how to apply an analysis on a model? How to manage the analysis process? This paper presents an application of our research on this topic. In particular, we show that our approach makes it possible to combine heterogeneous models and analyses in the design of an avionic system. We use two languages to model the system at di erent levels of abstraction: the industry standard AADL (Ar- chitecture Analysis and Design Language) and the more recent implementation-oriented CPAL language (Cyber-Physical Action Language). We then combine di erent real-time scheduling analy- ses so as to gradually de ne the task and network parameters and nally validate the schedulability of all activities of the system

    End-to-end latency and temporal consistency analysis in networked real-time systems

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    International audienceCritical embedded systems are often designed as a set of real-time tasks, running on shared computing modules, and communicating through networks. Because of their critical nature, such systems have to meet strict timing properties. To help the designers to prove the correctness of their system, the real-time systems community has developed numerous approaches for analysing the worst case scenarios either on the processors (e.g., worst case response time of a task) or on the networks (e.g., worst case traversal time of a message). These approaches provide results only for local components behaviours. However, there is a growing need for having a global view of the system, in order to determine end-to-end properties. Such a property applies to functional chains which describe the behaviour of sequences of tasks. We propose an approach to analyse worst case behaviour along functional chains in critical embedded systems. It is based on mixed integer linear programming (MILP) and is general in the sense that it can be applied to a variety of end-to-end properties. This paper focuses on two essential properties: end-to-end latency and temporal consistency. This work was supported by the French National Research Agency within the SATRIMMAP project

    Response Time Analysis for RT-MQTT Protocol Grounded on SDN

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    The current industry trend is to replace the use of custom components with standards-based Commercially available Off-The-Shelf (COTS) based hardware and protocols. Furthermore, the emergence of new industrial paradigms, such as Industry 4.0 and the Industrial Internet of Things, sets additional requirements regarding e.g. scale, transparency, agility, flexibility and efficiency. Therefore, in these domains, application layer protocols such as Message Queuing Telemetry Transport protocol (MQTT) are gaining popularity, in result of their simplicity, scalability, low resource-usage and decoupling between end nodes. However, such protocols were not designed for real-time applications, missing key features such as determinism and latency bounds. A recent work proposed extending MQTT with real-time services, taking advantage of Software Defined Networking (SDN) to manage the network resource. These extensions allow applications to specify real-time requirements that are then captured by a resource manager and used to reserve the necessary resources at the network layer. This paper shows that such MQTT extended architecture is analyzable from a worst-case timing perspective. We derive a system model that captures the real-time features and we present a response-time analysis to assess the schedulability of the real-time traffic. Finally, we validate the analysis with a set of experimental results

    Timing verification of real­time automotive Ethernet networks: what can we expect from simulation?

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    Switched Ethernet is a technology that is profoundly reshaping automotive communication architectures as it did in other application domains such as avionics with the use of AFDX backbones. Early stage timing verification of critical embedded networks typically relies on simulation and worst-case schedulability analysis. When the modeling power of schedulability analysis is not sufficient, there are typically two options: either make pessimistic assumptions or ignore what cannot be modeled. Both options are unsatisfactory because they are either inefficient in terms of resource usage or potentially unsafe. To overcome those issues, we believe it is a good practice to use simulation models, which can be more realistic, along with schedulability analysis. The two basic questions that we aim to study here is what can we expect from simulation, and how to use it properly? This empirical study explores these questions on realistic case-studies and provides methodological guidelines for the use of simulation in the design of switched Ethernet networks. A broader objective of the study is to compare the outcomes of schedulability analyses and simulation, and conclude about the scope of usability of simulation in the design of critical Ethernet networks
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