Configurable multiple value encoders using semi floating-gate

This thesis presents a new multiple-valued encoder with re-configurable radix. The proposed circuits utilize serial cyclic D/A conversion and semi floatinggate (SFG) inverters for compact design and a high functional capacity per device. A re-configurable radix is not supported by existing SFG inverter based multiple-valued encoders which make use of parallel binary weight D/A conversion. The study covers least significant bit-first (LSB), least significant bit-first with alternate bit inversion (LSB ABI) and most significant bit-first (MSB) digital input codes. The serial cyclic D/A converters with LSB and LSB ABI input codes are implemented in a double-poly 0.35um AMS process. Measured results are provided and analyzed using standard static D/A converter performance measures. Circuits are tested using the practical radices 4, 8 and 16. Experimental results demonstrate that serial cyclic D/A converters using SFG inverters are feasible. Compared to related work on cyclic D/A conversion, the proposed circuits feature both a reduced number of devices and a reduction in the required die area. Several new techniques are identified for extending the resolution beyond radix 4, 8 and 16 MVL applications. This includes an error correction algorithm called least significant bit-first with alternate bit inversion (LSB ABI), a sample and hold clock scheme and a Dual Data-Rate (DDR) mode of D/A converter operation. The techniques are implemented on a chip and measured results are provided. The thesis also includes simulation work on several new SFG based circuits. A ternary serial D/A converter, a MSB-first serial D/A converter and a multiple-valued frequency divider which features re-configurable modulus

Communication and energy delivery architectures for personal medical devices

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.Includes bibliographical references (p. 219-232).Advances in sensor technologies and integrated electronics are revolutionizing how humans access and receive healthcare. However, many envisioned wearable or implantable systems are not deployable in practice due to high energy consumption and anatomically-limited size constraints, necessitating large form-factors for external devices, or eventual surgical re-implantation procedures for in-vivo applications. Since communication and energy-management sub-systems often dominate the power budgets of personal biomedical devices, this thesis explores alternative usecases, system architectures, and circuit solutions to reduce their energy burden. For wearable applications, a system-on-chip is designed that both communicates and delivers power over an eTextiles network. The transmitter and receiver front-ends are at least an order of magnitude more efficient than conventional body-area networks. For implantable applications, two separate systems are proposed that avoid reimplantation requirements. The first system extracts energy from the endocochlear potential, an electrochemical gradient found naturally within the inner-ear of mammals, in order to power a wireless sensor. Since extractable energy levels are limited, novel sensing, communication, and energy management solutions are proposed that leverage duty-cycling to achieve enabling power consumptions that are at least an order of magnitude lower than previous work. Clinical measurements show the first system demonstrated to sustain itself with a mammalian-generated electrochemical potential operating as the only source of energy into the system. The second system leverages the essentially unlimited number of re-charge cycles offered by ultracapacitors. To ease patient usability, a rapid wireless capacitor charging architecture is proposed that employs a multi-tapped secondary inductive coil to provide charging times that are significantly faster than conventional approaches.by Patrick Philip Mercier.Ph.D

Challenges and Solutions to Next-Generation Single-Photon Imagers

Detecting and counting single photons is useful in an increasingly large number of applications. Most applications require large formats, approaching and even far exceeding 1 megapixel. In this thesis, we look at the challenges of massively parallel photon-counting cameras from all performance angles. The thesis deals with a number of performance issues that emerge when the number of pixels exceeds about 1/4 of megapixels, proposing characterization techniques and solutions to mitigate performance degradation and non-uniformity. Two cameras were created to validate the proposed techniques. The first camera, SwissSPAD, comprises an array of 512 x 128 SPAD pixels, each with a one-bit memory and a gating mechanism to achieve 5ns high precision time windows with high uniformity across the array. With a massively parallel readout of over 10 Gigabit/s and positioning of the integration time window accurate to the pico-second range, fluorescence lifetime imaging and fluorescence correlation spectroscopy imaging achieve a speedup of several orders of magnitude while ensuring high precision in the measurements. Other possible applications include wide-field time-of-flight imaging and the generation of quantum random numbers at highest bit-rates. Lately super-resolution microscopy techniques have also used SwissSPAD. The second camera, LinoSPAD, takes the concepts of SwissSPAD one step further by moving even more 'intelligence' to the FPGA and reducing the sensor complexity to the bare minimum. This allows focusing the optimization of the sensor on the most important metrics of photon efficiency and fill factor. As such, the sensor consists of one line of SPADs that have a direct connection each to the FPGA where complex photon processing algorithms can be implemented. As a demonstration of the capabilities of current lowcost FPGAs we implemented an array of time-to-digital converters that can handle up to 8.5 billion photons per second, measuring each one of them and accounting them in high precision histograms. Using simple laser diodes and a circuit to generate light pulses in the picosecond range, we demonstrate a ubiquitous 3D time-of-flight sensor. The thesis intends to be a first step towards achieving the world's first megapixel SPAD camera, which, we believe, is in grasp thanks to the architectural and circuital techniques proposed in this thesis. In addition, we believe that the applications proposed in this thesis offer a wide variety of uses of the sensors presented in this thesis and in future ones to come

Neural networks-on-chip for hybrid bio-electronic systems

PhD ThesisBy modelling the brains computation we can further our understanding of its function and develop novel treatments for neurological disorders. The brain is incredibly powerful and energy e cient, but its computation does not t well with the traditional computer architecture developed over the previous 70 years. Therefore, there is growing research focus in developing alternative computing technologies to enhance our neural modelling capability, with the expectation that the technology in itself will also bene t from increased awareness of neural computational paradigms. This thesis focuses upon developing a methodology to study the design of neural computing systems, with an emphasis on studying systems suitable for biomedical experiments. The methodology allows for the design to be optimized according to the application. For example, di erent case studies highlight how to reduce energy consumption, reduce silicon area, or to increase network throughput. High performance processing cores are presented for both Hodgkin-Huxley and Izhikevich neurons incorporating novel design features. Further, a complete energy/area model for a neural-network-on-chip is derived, which is used in two exemplar case-studies: a cortical neural circuit to benchmark typical system performance, illustrating how a 65,000 neuron network could be processed in real-time within a 100mW power budget; and a scalable highperformance processing platform for a cerebellar neural prosthesis. From these case-studies, the contribution of network granularity towards optimal neural-network-on-chip performance is explored

Photodetectors

In this book some recent advances in development of photodetectors and photodetection systems for specific applications are included. In the first section of the book nine different types of photodetectors and their characteristics are presented. Next, some theoretical aspects and simulations are discussed. The last eight chapters are devoted to the development of photodetection systems for imaging, particle size analysis, transfers of time, measurement of vibrations, magnetic field, polarization of light, and particle energy. The book is addressed to students, engineers, and researchers working in the field of photonics and advanced technologies

Investigations into High Temperature Components and Packaging

The purpose of this report is to document the work that was performed at the Oak Ridge National Laboratory (ORNL) in support of the development of high temperature power electronics and components with monies remaining from the Semikron High Temperature Inverter Project managed by the National Energy Technology Laboratory (NETL). High temperature electronic components are needed to allow inverters to operate in more extreme operating conditions as required in advanced traction drive applications. The trend to try to eliminate secondary cooling loops and utilize the internal combustion (IC) cooling system, which operates with approximately 105 C water/ethylene glycol coolant at the output of the radiator, is necessary to further reduce vehicle costs and weight. The activity documented in this report includes development and testing of high temperature components, activities in support of high temperature testing, an assessment of several component packaging methods, and how elevated operating temperatures would impact their reliability. This report is organized with testing of new high temperature capacitors in Section 2 and testing of new 150 C junction temperature trench insulated gate bipolar transistor (IGBTs) in Section 3. Section 4 addresses some operational OPAL-GT information, which was necessary for developing module level tests. Section 5 summarizes calibration of equipment needed for the high temperature testing. Section 6 details some additional work that was funded on silicon carbide (SiC) device testing for high temperature use, and Section 7 is the complete text of a report funded from this effort summarizing packaging methods and their reliability issues for use in high temperature power electronics. Components were tested to evaluate the performance characteristics of the component at different operating temperatures. The temperature of the component is determined by the ambient temperature (i.e., temperature surrounding the device) plus the temperature increase inside the device due the internal heat that is generated due to conduction and switching losses. Capacitors and high current switches that are reliable and meet performance specifications over an increased temperature range are necessary to realize electronics needed for hybrid-electric vehicles (HEVs), fuel cell (FC) and plug-in HEVs (PHEVs). In addition to individual component level testing, it is necessary to evaluate and perform long term module level testing to ascertain the effects of high temperature operation on power electronics

NASA Tech Briefs, February 2001

The topics include: 1) Application Briefs; 2) National Design Engineering Show Preview; 3) Marketing Inventions to Increase Income; 4) A Personal-Computer-Based Physiological Training System; 5) Reconfigurable Arrays of Transistors for Evolvable Hardware; 6) Active Tactile Display Device for Reading by a Blind Person; 7) Program Automates Management of IBM VM Computer Systems; 8) System for Monitoring the Environment of a Spacecraft Launch; 9) Measurement of Stresses and Strains in Muscles and Tendons; 10) Optical Measurement of Temperatures in Muscles and Tendons; 11) Small Low-Temperature Thermometer With Nanokelvin Resolution; 12) Heterodyne Interferometer With Phase-Modulated Carrier; 13) Rechargeable Batteries Based on Intercalation in Graphite; 14) Signal Processor for Doppler Measurements in Icing Research; 15) Model Optimizes Drying of Wet Sheets; 16) High-Performance POSS-Modified Polymeric Composites; 17) Model Simulates Semi-Solid Material Processing; 18) Modular Cryogenic Insulation; 19) Passive Venting for Alleviating Helicopter Tail-Boom Loads; 20) Computer Program Predicts Rocket Noise; 21) Process for Polishing Bare Aluminum to High Optical Quality; 22) External Adhesive Pressure-Wall Patch; 23) Java Implementation of Information-Sharing Protocol; 24) Electronic Bulletin Board Publishes Schedules in Real Time; 25) Apparatus Would Extract Water From the Martian Atmosphere; 26) Review of Research on Supercritical vs Subcritical Fluids; 27) Hybrid Regenerative Water-Recycling System; 28) Study of Fusion-Driven Plasma Thruster With Magnetic Nozzle; 29) Liquid/Vapor-Hydrazine Thruster Would Produce Small Impulses; and 30) Thruster Based on Sublimation of Solid Hydrazin

NASA Tech Briefs, Winter 1983

Topics include: NASA TU Services: Technology Utilization services that can assist you in learning about and applying NASA technology. New Product Ideas: A summary of selected innovations of value to manufacturers for the development of new products; Electronic Components and Circuits; Electronic Systems; Physical Sciences; Materials; Life Sciences; Mechanics; Machinery; Fabrication Technology; Mathematics and Information Sciences