A high efficiency BPSK receiver for short range wireless network

In this paper, a 910MHz high efficiency BPSK receiver is presented with Colpitts oscillator for short range wireless network. In this research, with injection-lock technique and using Colpitts oscillator, the efficiency of receiver has been improved. And also, behavior of an oscillator under injection of another signal has been investigated. Also, variation of output signal amplitude versus injected signal phase variation, the effect of varying the amplitude of injected signal and quality factor of the oscillator has been investigated. The designed receiver has 0.474 mW dc power and -60 dBm sensitivity. Data rate of receiver is 5 Mbps. The FOM of receiver is 94 pJ/bit. This receiver was designed and simulated in 0.18 μm RFCMOS technology. This proposed receiver can be used in short range wireless network for example, Wireless Body array network and wireless sensor network

Superregeneration revisited: from principles to current applications

© 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Wireless communications play a central role in our modern connected lives; at the same time, they constitute a very broad and deep area of research. The elements that make wireless communications possible are a transmitter, which sends information through electromagnetic waves; a medium that is able to transport these waves; and, finally, a receiver, which extracts the information from the-usually very small-amount of energy it is able to collect from the medium.Peer ReviewedPostprint (author's final draft

Noise analysis of super-regenerative oscillators in linear and nonlinear modes

A rigorous analysis of noise effects in super-regenerative oscillators (SROs), operating in both linear and nonlinear modes, is presented. For operation in the linear mode, two different analysis methods are presented. One is based on the calculation of linear-time variant (LTV) transfer function with respect to the input signal and the noise sources. The second method is based on a compact semianalytical formulation of the pulsed oscillator under the effect of the quench signal. The compact formulation also enables the analysis of the SRO in the nonlinear mode. It constitutes a fully new mathematical description of SROs, with general applicability, as it is not restricted to a particular oscillator topology. It relies on a numerical nonlinear black-box model of the stand-alone free-running oscillator, extracted from harmonic-balance simulations. This model is introduced into an envelope-domain formulation of the SRO at the fundamental frequency. Both the method based on LTV transfer functions and the semianalytical formulation take into account the cyclostationary nature of the SRO response to the noise sources. In the nonlinear mode, the variances of the amplitude and phase are calculated linearizing the formulation of the pulsed steady-state solution. The particular time variation of the phase variance is explained in detail and related to the onset and extinction of the oscillation in the presence of an RF input signal. The new analysis methods have been validated with both independent circuit-level simulations and measurements.This work was supported by the Spanish Ministry of Economy and Competitiveness and the European Regional Development Fund (ERDF/FEDER) under Project TEC2017-88242-C3-1-R

A Fully Integrated CMOS Receiver.

The rapidly growing wireless communication market is creating an increasing demand for low-cost highly-integrated radio frequency (RF) communication systems. This dissertation focuses on techniques to enable fully-integrated, wireless receivers incorporating all passive components, including the antenna, and also incorporating baseband synchronization on-chip. Not only is the receiver small in size and requires very low power, but it also delivers synchronized demodulated data. This research targets applications such as implantable neuroprosthetic devices and environmental wireless sensors, which need short range, low data-rate wireless communications but a long lifetime. To achieve these goals, the super-regenerative architecture is used, since power consumption with this architecture is low due to the simplified receiver architecture. This dissertation presents a 5GHz single chip receiver incorporating a compact on-chip 5 GHz slot antenna (50 times smaller than traditional dipole antennas) and a digital received data synchronization. A compact capacitively-loaded 5 GHz standing-wave resonator is used to improve the energy efficiency. An all-digital PLL timing scheme synchronizes the received data clock. A new type of low-power envelope detector is incorporated to increase the data rate and efficiency. The receiver achieves a data rate up to 1.2 Mb/s, dissipates 6.6 mW from a 1.5 V supply. The novel on-chip capacitively-loaded, transmission-line-standing-wave resonator is employed instead of a conventional low-Q on-chip inductor. The simulated quality factor of the resonator is very high (35), and is verified by phase-noise measurements of a prototype 5GHz Voltage Control Oscillator (VCO) incorporating this resonator. The prototype VCO, implemented in 0.13 µm CMOS, dissipates 3 mW from a 1.2 V supply, and achieves a measured phase noise of -117 dBc/Hz at a 1 MHz offset. In the on-chip antenna an efficient shielding technique is used to shield the antenna from the low-resistivity substrate underneath. Two standalone on-chip slot antenna prototypes were designed and fabricated in 0.13 µm CMOS. The 9 GHz prototype occupies a die area of only 0.3 mm2, has an active gain of -4.4 dBi and an efficiency of 9%. The second prototype occupies a die area of 0.47 mm2, and achieves a passive gain of approximately -17.0 dBi at 5 GHz.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/60739/1/shid_1.pd

Low power rf transceivers

This thesis details the analysis and design of ultra-low power radio transceivers operating at microwave frequencies. Hybrid prototypes and Monolithic Microwave Integrated Circuits (MMICs) which achieve power consumptions of less than 1 mW and theoretical operating ranges of over 10 m are described. The motivation behind the design of circuits exhibiting ultra low power consumption and, in the case of the MMICs, small size is the emerging technology of Wireless Sensor Networks (WSN). WSNs consist of spatially distributed ‘nodes’ or ‘specks’ each with their own renewable energy source, one or more sensors, limited memory, processing capability and radio or optical link. The idea is that specks within a ‘speckzone’ cooperate and share computational resources to perform complex tasks such as monitoring fire hazards, radiation levels or for motion tracking. The radio section must be ultra low power e.g. sub 1 mW in order not to drain the limited battery capacity. The radio must also be small in size e.g. less than 5 x 5 mm so that the overall speck size is small. Also, the radio must still be able to operate over a range of at least a metre so as to allow radio contact between, for example, rooms or relatively distant specks. The unsuitability of conventional homodyne topologies to WSNs is discussed and more efficient methods of modulation (On-Off Keying) and demodulation (non-coherent) are presented. Furthermore, it is shown how Super-Regenerative Receivers (SRR) can be used to achieve relatively large output voltages for small input powers. This is important because baseband Op-Amps connected at the RF receiver output generally cannot amplify small signals at the input without the output being saturated in noise (10mV is the smallest measured input for 741 Op-Amp). Instrumentation amplifiers are used in this work as they can amplify signals below 1mV. The thesis details the analysis and design of basic RF building blocks: amplifiers, oscillators, switches and detectors. It also details how the circuits can be put together to make transceivers as well as describing various strategies to lower power consumption. In addition, novel techniques in both circuit and system design are presented which allow the power consumption of the radio to be reduced by as much as 97% whilst still retaining adequate performance. These techniques are based on duty cycling the transmitter and receiver and are possible because of the discontinuous nature of the On-Off Keying signal. In order to ease the sensitivity requirements of the baseband receive amplifier a design methodology for large output voltage receivers is presented. The designed receiver is measured to give a 5 mV output for an input power of -90 dBm and yet consumes less than 0.7 mW. There is also an appendix on the non linear modelling of the Glasgow University 50nm InP meta-morphic High Electron Mobility Transistor (50nm mHEMT) and one on the non linear modelling of a commercial Step Recovery diode (SRD). Models for the 50 nm mHEMT and the SRD are useful in the analysis, simulation and design of oscillators and pulse generators respectively