Pseudo-Random Single Photon Counting for Time-Resolved Optical Measurements

Ph.DDOCTOR OF PHILOSOPH

Radiation Hardened by Design Methodologies for Soft-Error Mitigated Digital Architectures

abstract: Digital architectures for data encryption, processing, clock synthesis, data transfer, etc. are susceptible to radiation induced soft errors due to charge collection in complementary metal oxide semiconductor (CMOS) integrated circuits (ICs). Radiation hardening by design (RHBD) techniques such as double modular redundancy (DMR) and triple modular redundancy (TMR) are used for error detection and correction respectively in such architectures. Multiple node charge collection (MNCC) causes domain crossing errors (DCE) which can render the redundancy ineffectual. This dissertation describes techniques to ensure DCE mitigation with statistical confidence for various designs. Both sequential and combinatorial logic are separated using these custom and computer aided design (CAD) methodologies. Radiation vulnerability and design overhead are studied on VLSI sub-systems including an advanced encryption standard (AES) which is DCE mitigated using module level coarse separation on a 90-nm process with 99.999% DCE mitigation. A radiation hardened microprocessor (HERMES2) is implemented in both 90-nm and 55-nm technologies with an interleaved separation methodology with 99.99% DCE mitigation while achieving 4.9% increased cell density, 28.5 % reduced routing and 5.6% reduced power dissipation over the module fences implementation. A DMR register-file (RF) is implemented in 55 nm process and used in the HERMES2 microprocessor. The RF array custom design and the decoders APR designed are explored with a focus on design cycle time. Quality of results (QOR) is studied from power, performance, area and reliability (PPAR) perspective to ascertain the improvement over other design techniques. A radiation hardened all-digital multiplying pulsed digital delay line (DDL) is designed for double data rate (DDR2/3) applications for data eye centering during high speed off-chip data transfer. The effect of noise, radiation particle strikes and statistical variation on the designed DDL are studied in detail. The design achieves the best in class 22.4 ps peak-to-peak jitter, 100-850 MHz range at 14 pJ/cycle energy consumption. Vulnerability of the non-hardened design is characterized and portions of the redundant DDL are separated in custom and auto-place and route (APR). Thus, a range of designs for mission critical applications are implemented using methodologies proposed in this work and their potential PPAR benefits explored in detail.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

Design, implementation and experimental validation of a 5G energy-aware reconfigurable hotspot

Flexibility and energy efficiency are considered two principal requirements of future fifth generation (5G) systems. From an architectural point of view, centralized processing and a dense deployment of small cells will play a vital role in enabling the efficient and dynamic operation of 5G networks. In this context, reconfigurable hotspots will provide on-demand services and adapt their operation in accordance to traffic re quirements, constituting a vital element of the heterogeneous 5G network infrastructure. In this paper we present a reconfigurable hotspot which is able to flexibly distribute its underlying communication functions across the network, as well as to adapt various parameters affecting the generation of the transmitted signal. The reconfiguration of the hotspot focuses on minimizing its energy footprint, while accounting for the current operative requirements. A real-time hotspot prototype has been developed to facilitate the realistic evaluation of the energy saving gains of the proposed scheme. The development flexibly combines software (SW) and hardware (HW) accelerated (HWA) functions in order to enable the agile reconfiguration of the hotspot. Actual power consumption measurements are presented for various relevant 5G networking scenarios and hotspot configurations. This thorough characterization of the energy footprint of the different subsystems of the prototype allows to map reconfiguration strategies to different use cases. Finally, the energy-aware design and implementation of the hotspot prototype is widely detailed in an effort to underline its importance to the provision of the flexibility and energy efficiency to future 5G systems.This work was supported by the European Commission in the framework of the H2020-ICT-2014-2 project Flex5Gware (Grant agreement no. 671563). The work of CTTC was also partially supported by the Generalitat de Catalunya (2017 SGR 891) and by the Spanish Government under project TEC2014-58341-C4-4-R

Mapping multiplexing technique (MMT): a novel intensity modulated transmission format for high-speed optical communication systems

There is a huge rapid growth in the deployment of data centers, mainly driven from the increasing demand of internet services as video streaming, e-commerce, Internet Of Things (IOT), social media, and cloud computing. This led data centers to experience an expeditious increase in the amount of network traffic that they have to sustain due to requirement of scaling with the processing speed of Complementary metal–oxide–semiconductor (CMOS) technology. On the other side, as more and more data centers and processing cores are on demand, as the power consumption is becoming a challenging issue. Unless novel power efficient methodologies are innovated, the information technology industry will be more liable to a future power crunch. As such, low complex novel transmission formats featuring both power efficiency and low cost are considered the major characteristics enabling large-scale, high performance data transmission environment for short-haul optical interconnects and metropolitan range data networks. In this thesis, a novel high-speed Intensity-Modulated Direct-Detection (IM/DD) transmission format named “Mapping Multiplexing Technique (MMT)” for high-speed optical fiber networks, is proposed and presented. Conceptually, MMT design challenges the high power consumption issue that exists in high-speed short and medium range networks. The proposed novel scheme provides low complex means for increasing the power efficiency of optical transceivers at an impactful tradeoff between power efficiency, spectral efficiency, and cost. The novel scheme has been registered as a patent (Malaysia PI2012700631) that can be employed for applications related but not limited to, short-haul optical interconnects in data centers and Metropolitan Area networks (MAN). A comprehensive mathematical model for N-channel MMT modulation format has been developed. In addition, a signal space model for the N-channel MMT has been presented to serve as a platform for comparison with other transmission formats under optical channel constraints. Especially, comparison with M-PAM, as meanwhile are of practical interest to expand the capacity for optical interconnects deployment which has been recently standardized for Ethernet IEEE 802.3bs 100Gb/s and in today ongoing investigation activities by IEEE 802.3 400Gb/s Ethernet Task Force. Performance metrics have been considered by the derivation of the average electrical and optical power for N-channel MMT symbols in comparison with Pulse Amplitude Modulation (M-PAM) format with respect to the information capacity. Asymptotic power efficiency evaluation in multi-dimensional signal space has been considered. For information capacity of 2, 3 and 4 bits/symbol, 2-channel, 3-channel and 4-channel MMT modulation formats can reduce the power penalty by 1.76 dB, 2.2 dB and 4 dB compared with 4-PAM, 8-PAM and 16-PAM, respectively. This enhancement is equivalent to 53%, 60% and 71% energy per bit reduction to the transmission of 2, 3 and 4 bits per symbol employing 2-, 3- and 4-channel MMT compared with 4-, 8- and 16-PAM format, respectively. One of the major dependable parameters that affect the immunity of a modulation format to fiber non-linearities, is the system baud rate. The propagation of pulses in fiber with bitrates in the order > 10G, is not only limited by the linear fiber impairments, however, it has strong proportionality with fiber intra-channel non-linearities (Self Phase Modulation (SPM), Intra-channel Cross-Phase Modulation (IXPM) and Intra-channel Four-Wave Mixing (IFWM)). Hence, in addition to the potential application of MMT in short-haul networks, the thesis validates the practicality of implementing N-channel MMT system accompanied by dispersion compensation methodologies to extend the reach of error free transmission (BER ≤ 10-12) for Metro-networks. N-Channel MMT has been validated by real environment simulation results to outperform the performance of M-PAM in tolerating fiber non-linearities. By the employment of pre-post compensation to tolerate both residual chromatic dispersion and non-linearity, performance above the error free transmission limit at 40Gb/s bit rate have been attained for 2-, 3- and 4-channel MMT over spans lengths of up to 1200Km, 320 Km and 320 Km, respectively. While, at an aggregated bit rate of 100 Gb/s, error free transmission can be achieved for 2-, 3- and 4-channel MMT over spans lengths of up to 480 Km, 80 Km and 160 Km, respectively. At the same spectral efficiency, 4-channel MMT has realized a single channel maximum error free transmission over span lengths up to 320 Km and 160 Km at 40Gb/s and 100Gb/s, respectively, in contrast with 4-PAM attaining 240 Km and 80 Km at 40Gb/s and 100Gb/s, respectively

Mapping multiplexing technique (MMT): a novel intensity modulated transmission format for high-speed optical communication systems

There is a huge rapid growth in the deployment of data centers, mainly driven from the increasing demand of internet services as video streaming, e-commerce, Internet Of Things (IOT), social media, and cloud computing. This led data centers to experience an expeditious increase in the amount of network traffic that they have to sustain due to requirement of scaling with the processing speed of Complementary metal–oxide–semiconductor (CMOS) technology. On the other side, as more and more data centers and processing cores are on demand, as the power consumption is becoming a challenging issue. Unless novel power efficient methodologies are innovated, the information technology industry will be more liable to a future power crunch. As such, low complex novel transmission formats featuring both power efficiency and low cost are considered the major characteristics enabling large-scale, high performance data transmission environment for short-haul optical interconnects and metropolitan range data networks. In this thesis, a novel high-speed Intensity-Modulated Direct-Detection (IM/DD) transmission format named “Mapping Multiplexing Technique (MMT)” for high-speed optical fiber networks, is proposed and presented. Conceptually, MMT design challenges the high power consumption issue that exists in high-speed short and medium range networks. The proposed novel scheme provides low complex means for increasing the power efficiency of optical transceivers at an impactful tradeoff between power efficiency, spectral efficiency, and cost. The novel scheme has been registered as a patent (Malaysia PI2012700631) that can be employed for applications related but not limited to, short-haul optical interconnects in data centers and Metropolitan Area networks (MAN). A comprehensive mathematical model for N-channel MMT modulation format has been developed. In addition, a signal space model for the N-channel MMT has been presented to serve as a platform for comparison with other transmission formats under optical channel constraints. Especially, comparison with M-PAM, as meanwhile are of practical interest to expand the capacity for optical interconnects deployment which has been recently standardized for Ethernet IEEE 802.3bs 100Gb/s and in today ongoing investigation activities by IEEE 802.3 400Gb/s Ethernet Task Force. Performance metrics have been considered by the derivation of the average electrical and optical power for N-channel MMT symbols in comparison with Pulse Amplitude Modulation (M-PAM) format with respect to the information capacity. Asymptotic power efficiency evaluation in multi-dimensional signal space has been considered. For information capacity of 2, 3 and 4 bits/symbol, 2-channel, 3-channel and 4-channel MMT modulation formats can reduce the power penalty by 1.76 dB, 2.2 dB and 4 dB compared with 4-PAM, 8-PAM and 16-PAM, respectively. This enhancement is equivalent to 53%, 60% and 71% energy per bit reduction to the transmission of 2, 3 and 4 bits per symbol employing 2-, 3- and 4-channel MMT compared with 4-, 8- and 16-PAM format, respectively. One of the major dependable parameters that affect the immunity of a modulation format to fiber non-linearities, is the system baud rate. The propagation of pulses in fiber with bitrates in the order > 10G, is not only limited by the linear fiber impairments, however, it has strong proportionality with fiber intra-channel non-linearities (Self Phase Modulation (SPM), Intra-channel Cross-Phase Modulation (IXPM) and Intra-channel Four-Wave Mixing (IFWM)). Hence, in addition to the potential application of MMT in short-haul networks, the thesis validates the practicality of implementing N-channel MMT system accompanied by dispersion compensation methodologies to extend the reach of error free transmission (BER ≤ 10-12) for Metro-networks. N-Channel MMT has been validated by real environment simulation results to outperform the performance of M-PAM in tolerating fiber non-linearities. By the employment of pre-post compensation to tolerate both residual chromatic dispersion and non-linearity, performance above the error free transmission limit at 40Gb/s bit rate have been attained for 2-, 3- and 4-channel MMT over spans lengths of up to 1200Km, 320 Km and 320 Km, respectively. While, at an aggregated bit rate of 100 Gb/s, error free transmission can be achieved for 2-, 3- and 4-channel MMT over spans lengths of up to 480 Km, 80 Km and 160 Km, respectively. At the same spectral efficiency, 4-channel MMT has realized a single channel maximum error free transmission over span lengths up to 320 Km and 160 Km at 40Gb/s and 100Gb/s, respectively, in contrast with 4-PAM attaining 240 Km and 80 Km at 40Gb/s and 100Gb/s, respectively

Satellite Networks: Architectures, Applications, and Technologies

Since global satellite networks are moving to the forefront in enhancing the national and global information infrastructures due to communication satellites' unique networking characteristics, a workshop was organized to assess the progress made to date and chart the future. This workshop provided the forum to assess the current state-of-the-art, identify key issues, and highlight the emerging trends in the next-generation architectures, data protocol development, communication interoperability, and applications. Presentations on overview, state-of-the-art in research, development, deployment and applications and future trends on satellite networks are assembled

Recent Trends in Communication Networks

In recent years there has been many developments in communication technology. This has greatly enhanced the computing power of small handheld resource-constrained mobile devices. Different generations of communication technology have evolved. This had led to new research for communication of large volumes of data in different transmission media and the design of different communication protocols. Another direction of research concerns the secure and error-free communication between the sender and receiver despite the risk of the presence of an eavesdropper. For the communication requirement of a huge amount of multimedia streaming data, a lot of research has been carried out in the design of proper overlay networks. The book addresses new research techniques that have evolved to handle these challenges

Proceedings of the First International Workshop on HyperTransport Research and Applications (WHTRA2009)

Proceedings of the First International Workshop on HyperTransport Research and Applications (WHTRA2009) which was held Feb. 12th 2009 in Mannheim, Germany. The 1st International Workshop for Research on HyperTransport is an international high quality forum for scientists, researches and developers working in the area of HyperTransport. This includes not only developments and research in HyperTransport itself, but also work which is based on or enabled by HyperTransport. HyperTransport (HT) is an interconnection technology which is typically used as system interconnect in modern computer systems, connecting the CPUs among each other and with the I/O bridges. Primarily designed as interconnect between high performance CPUs it provides an extremely low latency, high bandwidth and excellent scalability. The definition of the HTX connector allows the use of HT even for add-in cards. In opposition to other peripheral interconnect technologies like PCI-Express no protocol conversion or intermediate bridging is necessary. HT is a direct connection between device and CPU with minimal latency. Another advantage is the possibility of cache coherent devices. Because of these properties HT is of high interest for high performance I/O like networking and storage, but also for co-processing and acceleration based on ASIC or FPGA technologies. In particular acceleration sees a resurgence of interest today. One reason is the possibility to reduce power consumption by the use of accelerators. In the area of parallel computing the low latency communication allows for fine grain communication schemes and is perfectly suited for scalable systems. Summing up, HT technology offers key advantages and great performance to any research aspect related to or based on interconnects. For more information please consult the workshop website (http://whtra.uni-hd.de)

Proceedings of the First International Workshop on HyperTransport Research and Applications (WHTRA2009)(revised 08/2009)

Proceedings of the First International Workshop on HyperTransport Research and Applications (WHTRA2009) which was held Feb. 12th 2009 in Mannheim, Germany. The 1st International Workshop for Research on HyperTransport is an international high quality forum for scientists, researches and developers working in the area of HyperTransport. This includes not only developments and research in HyperTransport itself, but also work which is based on or enabled by HyperTransport. HyperTransport (HT) is an interconnection technology which is typically used as system interconnect in modern computer systems, connecting the CPUs among each other and with the I/O bridges. Primarily designed as interconnect between high performance CPUs it provides an extremely low latency, high bandwidth and excellent scalability. The definition of the HTX connector allows the use of HT even for add-in cards. In opposition to other peripheral interconnect technologies like PCI-Express no protocol conversion or intermediate bridging is necessary. HT is a direct connection between device and CPU with minimal latency. Another advantage is the possibility of cache coherent devices. Because of these properties HT is of high interest for high performance I/O like networking and storage, but also for co-processing and acceleration based on ASIC or FPGA technologies. In particular acceleration sees a resurgence of interest today. One reason is the possibility to reduce power consumption by the use of accelerators. In the area of parallel computing the low latency communication allows for fine grain communication schemes and is perfectly suited for scalable systems. Summing up, HT technology offers key advantages and great performance to any research aspect related to or based on interconnects. For more information please consult the workshop website (http://whtra.uni-hd.de)