Fundamental considerations of three-level DC-DC converters : topologies, analyses, and control

Author name used in this publication: Chi K. Tse2008-2009 > Academic research: refereed > Publication in refereed journalVersion of RecordPublishe

Design and Control of Power Converters 2020

In this book, nine papers focusing on different fields of power electronics are gathered, all of which are in line with the present trends in research and industry. Given the generality of the Special Issue, the covered topics range from electrothermal models and losses models in semiconductors and magnetics to converters used in high-power applications. In this last case, the papers address specific problems such as the distortion due to zero-current detection or fault investigation using the fast Fourier transform, all being focused on analyzing the topologies of high-power high-density applications, such as the dual active bridge or the H-bridge multilevel inverter. All the papers provide enough insight in the analyzed issues to be used as the starting point of any research. Experimental or simulation results are presented to validate and help with the understanding of the proposed ideas. To summarize, this book will help the reader to solve specific problems in industrial equipment or to increase their knowledge in specific fields

Design of Analog-to-Digital Converters with Embedded Mixing for Ultra-Low-Power Radio Receivers

In the field of radio receivers, down-conversion methods usually rely on one (or more) explicit mixing stage(s) before the analog-to-digital converter (ADC). These stages not only contribute to the overall power consumption but also have an impact on area and can compromise the receiver’s performance in terms of noise and linearity. On the other hand, most ADCs require some sort of reference signal in order to properly digitize an analog input signal. The implementation of this reference signal usually relies on bandgap circuits and reference buffers to generate a constant, stable, dc signal. Disregarding this conventional approach, the work developed in this thesis aims to explore the viability behind the usage of a variable reference signal. Moreover, it demonstrates that not only can an input signal be properly digitized, but also shifted up and down in frequency, effectively embedding the mixing operation in an ADC. As a result, ADCs in receiver chains can perform double-duty as both a quantizer and a mixing stage. The lesser known charge-sharing (CS) topology, within the successive approximation register (SAR) ADCs, is used for a practical implementation, due to its feature of “pre-charging” the reference signal prior to the conversion. Simulation results from an 8-bit CS-SAR ADC designed in a 0.13 μm CMOS technology validate the proposed technique

An Ultra Low Power Digital to Analog Converter Optimized for Small Format LCD Applications

Liquid crystal displays (LCDs) for mobile applications present a unique design challenge. These small format displays can be found primarily in cell phones and PDAs which are devices that have particularly stringent power requirements. At the same time, the displays are increasing in resolution with every generation. This is creating demand for new LCD display technologies. The predominant amorphous thin film transistor technology is no longer feasible in the new high resolution small format screens due to the fact that the displays require too many connections to the driver and the aperture ratios do not allow high density displays. New technologies such as low temperature polysilicon (LTPS) displays continue to shrink in size and increase in resolution. LTPS technology enables the display manufacturer to create relatively high quality transistors on the glass. This allows for a display architecture which integrates the gate driver on the glass. Newer LTPS LCDs also enable a high level of multiplexing the sources lines on the glass which allows for a much simpler connection to the display driver chip. The electronic drivers for these display applications must adhere to strict power and area budgets. This work describes a low-power, area efficient, scalable, digital-to-analog conversion (DAC) integrated circuit architecture optimized for driving small format LCDs. The display driver is based on a twelve channel, 9-bit DAC driver. This architecture, suitable for % VGA resolution displays, exhibited a 2 MSPS conversion rate, less than 300 pW power dissipation per channel using a 5 V supply, and a die area of 0.042 mm per DAC. A new performance standard is set for DAC display drivers in joules per bit areal density

A bandpass sigma delta modulator IF receiver

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1997.Includes bibliographical references (leaves 170-173).by Emilija Simic.M.Eng

Extreme Temperature Switch Mode Power Supply Based on Vee-square Control Using Silicon Carbide, Silicon on Sapphire, Hybrid Technology

Switch mode power supplies, commonly known as SMPS are basic building blocks of the electronic systems. SMPS performs power regulation by accepting a raw input voltage and transforming it to required voltage at output with desired characteristics. Electronic systems used in applications such as deep well oil drilling, geothermal wells and deep space explorations is expected to operate under extremely harsh conditions like elevated temperature, high pressure and radiation prone environments. To support the onboard electronics in these applications, SMPS capable of operating at extreme temperatures are of high interest.This research work deals with the design and development of a switch mode power supply capable of operating over the temperature range of 300 degree centigrade (�C). Silicon carbide field effect transistors are used as power devices in the design to tolerate these extreme high ambient temperatures without compromising power handling capability. The simplest yet robust vee square control architecture is adopted for control mechanism. The control electronics are implemented as an integrated circuit in 0.5 �m silicon on sapphire process. The supporting components like high temperature tolerant inductors and capacitors are identified by evaluating various samples at elevated temperature. This is the first demonstration of SMPS capable of operating at 275�C as a standalone component. Also for the first time, a gate drive mechanism based on planar transformer architecture is studied and presented for high temperature operation. A low cost packaging technique suited for harsh environment operation is proposed based on gold on aluminum nitride thin film technology. The basic analog building blocks of the system, such as comparator, voltage reference and rail-to-rail amplifiers are made available in discrete packages for use at temperatures above 275�C. A SMPS prototype on a 1.8 square inches substrate is developed and tested. Test results indicate that the system is capable of operating continuously at 275�C for extended period of time, providing the desired performance characteristics.School of Electrical & Computer Engineerin