16 research outputs found

    Modeling and Design of Digital Electronic Systems

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    The paper is concerned with the modern methodologies for holistic modeling of electronic systems enabling system-on-chip design. The method deals with the functional modeling of complete electronic systems using the behavioral features of Hardware Description Languages or high level languages then targeting programmable devices - mainly Field Programmable Gate Arrays (FPGAs) - for the rapid prototyping of digital electronic controllers. This approach offers major advantages such as: a unique modeling and evaluation environment for complete power systems, the same environment is used for the rapid prototyping of the digital controller, fast design development, short time to market, a CAD platform independent model, reusability of the model/design, generation of valuable IP, high level hardware/software partitioning of the design is enabled, Concurrent Engineering basic rules (unique EDA environment and common design database) are fulfilled. The recent evolution of such design methodologies is marked through references to case studies of electronic system modeling,simulation, controller design and implementation. Pointers for future trends / evolution of electronic design strategies and tools are given

    Double-hybrid spread-spectrum technique for conducted-EMI reduction in DC-DC switching regulators with FPGA-based controller

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    The purpose of this paper is to present a novel technique for conducted-noise reduction in de-de switching regulators. In order to effectively spread the conducted-noise frequency spectrum and, at the same time, attain a satisfactory voltage regulation, two parameters (carrier frequency and pulse position) have been randomized, and the third parameter (duty ratio) has been controlled by a digital compensator. Furthermore, the effect of using the proposed controller on common-mode, differential-mode, and total conducted-noise characteristics of the converter has been experimentally investigated. The converter\u27s performance with using the proposed technique has been experimentally investigated. It is assumed that the implementation technology is a field programmable gate array (FPGA) which is becoming increasingly adopted in industrial electronic applications.INTELEC 2009 - 2009 International Telecommunications Energy Conference : Incheon, South Korea, 2009.10.18-2009.10.2

    SOM neural network design – a new Simulink library based approach targeting FPGA implementation

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    The paper presents a method for FPGA implementation of Self-Organizing Map (SOM) artificial neural networks with on-chip learning algorithm. The method aims to build up a specific neural network using generic blocks designed in the MathWorks Simulink environment. The main characteristics of this original solution are: on-chip learning algorithm implementation, high reconfiguration capability and operation under real time constraints. An extended analysis has been carried out on the hardware resources used to implement the whole SOM network, as well as each individual component block

    Power conversion and signal transmission integration method based on dual modulation of DC-DC converters

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    For the development of communication systems such as Internet of Things, integrating communication with power supplies is an attractive solution to reduce supply cost. This paper presents a novel method of power/signal dual modulation (PSDM), by which signal transmission is integrated with power conversion. This method takes advantage of the intrinsic ripple initiated in switch mode power supplies as signal carriers, by which cost-effective communications can be realized. The principles of PSDM are discussed, and two basic dual modulation methods (specifically PWM/FSK and PWM/PSK) are concluded. The key points of designing a PWM/FSK system, including topology selection, carrier shape, and carrier frequency, are discussed to provide theoretical guidelines. A practical signal modulation-demodulation method is given, and a prototype system provides experimental results to verify the effectiveness of the proposed solution

    FPGAs in Industrial Control Applications

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    The aim of this paper is to review the state-of-the-art of Field Programmable Gate Array (FPGA) technologies and their contribution to industrial control applications. Authors start by addressing various research fields which can exploit the advantages of FPGAs. The features of these devices are then presented, followed by their corresponding design tools. To illustrate the benefits of using FPGAs in the case of complex control applications, a sensorless motor controller has been treated. This controller is based on the Extended Kalman Filter. Its development has been made according to a dedicated design methodology, which is also discussed. The use of FPGAs to implement artificial intelligence-based industrial controllers is then briefly reviewed. The final section presents two short case studies of Neural Network control systems designs targeting FPGAs

    A flexible experimental laboratory for distributed generation networks based on power inverters

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    In the recently deregulated electricity market, distributed generation based on renewable sources is becoming more and more relevant. In this area, two main distributed scenarios are focusing the attention of recent research: grid-connected mode, where the generation sources are connected to a grid mainly supplied by big power plants, and islanded mode, where the distributed sources, energy storage devices, and loads compose an autonomous entity that in its general form can be named a microgrid. To conduct a successful research in these two scenarios, it is essential to have a flexible experimental setup. This work deals with the description of a real laboratory setup composed of four nodes that can emulate both scenarios of a distributed generation network. A comprehensive description of the hardware and software setup will be done, focusing especially in the dual-core DSP used for control purposes, which is next to the industry standards and able to emulate real complexities. A complete experimental section will show the main features of the system.Peer ReviewedPostprint (published version

    Estudio de la influencia de las redes de comunicación en las redes inteligentes de energía

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    Las Redes Inteligentes de Energía (RRII) deben garantizar la calidad y la disponibilidad de energía, así como los nuevos servicios destinados a los usuarios finales y a las compañías eléctricas. El soporte básico de las RRII son los sistemas de comunicación, cercanos al tiempo real, entre los sistemas de generación, consumo y control de la red eléctrica. Esta tesis aborda, en primera instancia, un estudio sobre las necesidades de comunicaciones en los diferentes ámbitos de las RRII y las características de ancho de banda y latencia necesarias para dar soporte a la gran variedad de casos de uso que se pueden contemplar. La problemática del modelado de los diferentes canales y medios físicos habituales en las comunicaciones de las RRII es siguiente objetivo de esta tesis. Cada canal tiene unos parámetros característicos que es preciso cuantificar, para analizar su idoneidad para los diferentes ámbitos de comunicación y funciones dentro de la red inteligente. La latencia, el ancho de banda, la variabilidad de estos a lo largo del tiempo y la disponibilidad, deben cumplir unos requisitos mínimos en función del ámbito de red y el caso de uso al que se destine. Se muestra cómo los parámetros de cada canal pueden ser modelados en el caso de que la red de datos sea conocida. Además, dado que en la mayoría de los casos la red de datos es heterogénea y compuesta de diferentes medios, en este trabajo, amén de analizar el comportamiento de los canales de comunicación más utilizados en las RRII, se propone un método de análisis que permite derivar las características principales del canal de comunicaciones. En última instancia, esta tesis recoge un análisis de la influencia de las comunicaciones en dos casos de uso de gran importancia en las RRII, proponiendo y diseñando un entorno de pruebas, una metodología de análisis propia y ofreciendo alternativas para solventar los problemas que las comunicaciones introducen. En el primero ellos se estudia la influencia de las comunicaciones en los índices de calidad de la red eléctrica de distribución. El segundo caso aborda la influencia de las comunicaciones en el control, dentro de una red de área extensa, de un compensador estático trabajando como sistema de soporte de red eléctrica

    Investigation on the Benefits of Safety Margin Improvement in CANDU Nuclear Power Plant Using an FPGA-based Shutdown System

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    The relationship between response time and safety margin of CANadian Deuterium Uranium (CANDU) nuclear power plant (NPP) is investigated in this thesis. Implementation of safety shutdown system using Field Programmable Gate Array (FPGA) is explored. The fast data processing capability of FPGAs shortens the response time of CANDU shutdown systems (SDS) such that the impact of accident transient can be reduced. The safety margin, which is closely related to the reactor behavior in the event of an accident, is improved as a result of such a faster shutdown process. Theoretical analysis based on neutron dynamic theory is carried out to establish the fact that a faster shutdown process can mitigate accidental consequences. To provide more realistic test cases from a thermalhydraulic perspective, an industry grade simulation tool known as CATHENA is used to generate comparable accident-shutdown transients for different SDS response times. Results from both verification methods explicitly prove the feasibility of improving the safety margin via faster shutdown process. To demonstrate this concept, a prototype of the proposed faster SDS is constructed. The trip logic of CANDU shutdown system No.1 (SDS1) is converted into a digital hardware design and implemented within chosen FPGA platform. The functionality of the FPGA-based SDS1 is implemented, and the response times are tested and compared to those of the existing CANDU SDS1. The achieved 10.5 ms response time of the FPGA-based SDS1 is again applied to the CATHENA simulation process to quantitatively present the 26.98% improvement in the safety margin. To investigate potential improvement in safety margin by using FPGA technology, hardware-in-the-loop (HIL) simulation is performed by connecting the FPGA-based SDS1 to an NPP training simulator. The 6.26% improvement in safety margin has been verified, based on which a 10% potential power upgrade is discussed as another benefit of applying FPGA technology to CANDU NPPs
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