Discrete-Time Chaotic-Map Truly Random Number Generators: Design, Implementation, and Variability Analysis of the Zigzag Map

In this paper, we introduce a novel discrete chaotic map named zigzag map that demonstrates excellent chaotic behaviors and can be utilized in Truly Random Number Generators (TRNGs). We comprehensively investigate the map and explore its critical chaotic characteristics and parameters. We further present two circuit implementations for the zigzag map based on the switched current technique as well as the current-mode affine interpolation of the breakpoints. In practice, implementation variations can deteriorate the quality of the output sequence as a result of variation of the chaotic map parameters. In order to quantify the impact of variations on the map performance, we model the variations using a combination of theoretical analysis and Monte-Carlo simulations on the circuits. We demonstrate that even in the presence of the map variations, a TRNG based on the zigzag map passes all of the NIST 800-22 statistical randomness tests using simple post processing of the output data.Comment: To appear in Analog Integrated Circuits and Signal Processing (ALOG

Integrated chaos generators

This paper surveys the different design issues, from mathematical model to silicon, involved on the design of integrated circuits for the generation of chaotic behavior.Comisión Interministerial de Ciencia y Tecnología 1FD97-1611(TIC)European Commission ESPRIT 3110

Measurement of small signal variations using one-dimensional chaotic maps

A novel electronic signal Measurement System (MS) based on one-dimensional chaotic maps (Logistic Map (LM) and Tent Map (TM)) has been developed, analysed and tested. Firstly, an in-depth theoretical analysis of each map was performed using MATLAB based computation, and the results demonstrated that the high sensitivity, to initial conditions, of each map was suitable for small signal change detection and measurement. A new 3D representation of chaos map output for varying initial input was also developed allowing the suitability of any one-dimensional chaotic map to be determined. An electronic implementation of the chaotic maps, using low noise and low cost components was developed along with a feedback and a series based MS. The implementations were tested and the experimental results demonstrate a matching within ±1 %, between theory and the electronic implementations, both maps exhibiting behaviour identical to the theoretical maps, ranging from fixed point stability, periodicity and chaos. Each map implementation was tested separately and as part of a complete MS and the results reveal that the proposed measurement technique can detect and measure input signals changes as low as 5 over a 10 V input range, which yields a greater resolution than a MS using an 20 bit Analogue to Digital Converter (ADC) over the same input range. The main advantage of the presented MS is that the accuracy of the measurement is independent of the input range which is not the case with classical approach to measurement based on conditioning circuitry followed by an ADC as the minimum detectable change is directly proportional to the input range

A 2D Chaotic Oscillator for Analog IC

In this paper, we have proposed the design of an analog two-dimensional (2D) discrete-time chaotic oscillator. 2D chaotic systems are studied because of their more complex chaotic behavior compared to one-dimensional (1D) chaotic systems. The already published works on 2D chaotic systems are mainly focused either on the complex analytical combinations of familiar 1D chaotic maps such as Sine map, Logistic map, Tent map, and so on, or off-the-shelf component-based analog circuits. Due to complex hardware requirements, neither of them is feasible for hardware-efficient integrated circuit (IC) implementations. To the best of our knowledge, this proposed work is the first-ever report of an analog 2D discrete-time chaotic oscillator design that is suitable for hardware-constrained IC implementations. The chaotic performance of the proposed design is analyzed with bifurcation plots, the transient response, 2D Lyapunov exponent, and correlation coefficient measurements. It is demonstrated that the proposed design exhibits promising chaotic behavior with low hardware cost. The real-world application of the proposed 2D chaotic oscillator is presented in a random number generator (RNG) design. The applicability of the RNG in cryptography is verified by passing the generated random sequence through four standard statistical tests namely, NIST, FIPS, TestU01, and Diehard

Design of Discrete-time Chaos-Based Systems for Hardware Security Applications

Security of systems has become a major concern with the advent of technology. Researchers are proposing new security solutions every day in order to meet the area, power and performance specifications of the systems. The additional circuit required for security purposes can consume significant area and power. This work proposes a solution which utilizes discrete-time chaos-based logic gates to build a system which addresses multiple hardware security issues. The nonlinear dynamics of chaotic maps is leveraged to build a system that mitigates IC counterfeiting, IP piracy, overbuilding, disables hardware Trojan insertion and enables authentication of connecting devices (such as IoT and mobile). Chaos-based systems are also used to generate pseudo-random numbers for cryptographic applications.The chaotic map is the building block for the design of discrete-time chaos-based oscillator. The analog output of the oscillator is converted to digital value using a comparator in order to build logic gates. The logic gate is reconfigurable since different parameters in the circuit topology can be altered to implement multiple Boolean functions using the same system. The tuning parameters are control input, bifurcation parameter, iteration number and threshold voltage of the comparator. The proposed system is a hybrid between standard CMOS logic gates and reconfigurable chaos-based logic gates where original gates are replaced by chaos-based gates. The system works in two modes: logic locking and authentication. In logic locking mode, the goal is to ensure that the system achieves logic obfuscation in order to mitigate IC counterfeiting. The secret key for logic locking is made up of the tuning parameters of the chaotic oscillator. Each gate has 10-bit key which ensures that the key space is large which exponentially increases the computational complexity of any attack. In authentication mode, the aim of the system is to provide authentication of devices so that adversaries cannot connect to devices to learn confidential information. Chaos-based computing system is susceptible to process variation which can be leveraged to build a chaos-based PUF. The proposed system demonstrates near ideal PUF characteristics which means systems with large number of primary outputs can be used for authenticating devices

Efficient and Secure Chaotic S-Box for Wireless Sensor Network

International audienceInformation security using chaotic dynamics is a novel topic in the wireless sensor network (WSN) research field. After surveying analog and digital chaotic security systems, we give a state of the art of chaotic S-Box design. The substitution tables are nonlinear maps that strengthen and enhance block crypto-systems. This paper deals with the design of new dynamic chaotic S-Boxes suitable for implementation on wireless sensor nodes. Our proposed schemes are classified into two categories: S-Box based on discrete chaotic map with floating point arithmetic (cascading piecewise linear chaotic map and a three-dimensional map) and S-Box based on discrete chaotic map with fixed-point arithmetic (using discretized Lorenz map and logistic–tent map). The security analysis and implementation process on WSN are discussed. The proposed methods satisfy Good S-Box design criteria and exceed the performance of Advanced Encryption Standard static S-Box in some cases. The energy consumption of different proposals and existing chaotic S-Box designs are investigated via a platform simulator and a real WSN testbed equipped with TI MSP430f1611 micro-controller. The simulations and the experimental results show that our proposed S-Box design with fixed-point arithmetic Lorenz map has the lowest energy-consuming profile compared with the other studied and proposed S-Box design

Qualitative modeling of chaotic logical circuits and walking droplets: a dynamical systems approach

Logical circuits and wave-particle duality have been studied for most of the 20th century. During the current century scientists have been thinking differently about these well-studied systems. Specifically, there has been great interest in chaotic logical circuits and hydrodynamic quantum analogs. Traditional logical circuits are designed with minimal uncertainty. While this is straightforward to achieve with electronic logic, other logic families such as fluidic, chemical, and biological, naturally exhibit uncertainties due to their inherent nonlinearity. In recent years, engineers have been designing electronic logical systems via chaotic circuits. While traditional boolean circuits have easily determined outputs, which renders dynamical models unnecessary, chaotic logical circuits employ components that behave erratically for certain inputs. There has been an equally dramatic paradigm shift for studying wave-particle systems. In recent years, experiments with bouncing droplets (called walkers) on a vibrating fluid bath have shown that quantum analogs can be studied at the macro scale. These analogs help us ask questions about quantum mechanics that otherwise would have been inaccessible. They may eventually reveal some unforeseen properties of quantum mechanics that would close the gap between philosophical interpretations and scientific results. Both chaotic logical circuits and walking droplets have been modeled as differential equations. While many of these models are very good in reproducing the behavior observed in experiments, the equations are often too complex to analyze in detail and sometimes even too complex for tractable numerical solution. These problems can be simplified if the models are reduced to discrete dynamical systems. Fortunately, both systems are very naturally time-discrete. For the circuits, the states change very rapidly and therefore the information during the process of change is not of importance. And for the walkers, the position when a wave is produced is important, but the dynamics of the droplets in the air are not. This dissertation is an amalgam of results on chaotic logical circuits and walking droplets in the form of experimental investigations, mathematical modeling, and dynamical systems analysis. Furthermore, this thesis makes connections between the two topics and the various scientific disciplines involved in their studies