An enhanced single gate driven voltage-balanced SiC MOSFET stack topology suitable for high-voltage low-power applications

Abstract In the fabrication of some high‐voltage low‐power applications, low cost is much concerned, and thus using silicon carbide (SiC) MOSFET stack consisting of series connected low‐voltage devices is preferred rather than using an expensive single high‐voltage device. Therefore, a cost‐efficient single gate driven voltage‐balanced SiC MOSFET stack topology is proposed in this paper, where only some passive components are equipped with the stack. With a concept of single gate driver, the gate driver design of an SiC MOSFET stack is simplified. With an automatic balancing circuit which operates well with the sequential lagging single gate driver, good voltage balancing of SiC MOSFETs in the stack is realized without causing much extra loss and no additional active control is required. The working principle is illustrated in detail and the parameter selection together with design consideration is presented. Next, this topology is compared with RCD snubber method and active delay adjusting method to better illustrate its advantages. Finally, in a typical high‐voltage low‐power application, auxiliary power supply, the simulation and experimental results further verify the effectiveness of the proposed topology

Developing A Medium-Voltage Three-Phase Current Compensator Using Modular Switching Positions

The objective of this thesis is to present the context, application, theory, design, construction, and testing of a proposed solution to unbalanced current loading on three-phase four-wire systems. This solution, known as the Medium-Voltage Unbalanced Current Static Compensator or MV-UCSC, is designed to recirculate currents between the three phases of adistribution system. Through this redistribution of the currents negative- and zero-sequence current components are eliminated and a balanced load is seen upstream from the point of installation. The MV-UCSC as it operates in the distribution system is presented followed by its effect on traditional compensation equipment. The construction of the MV-UCSC as well as 13.8 kV simulations are then shown. Development of the switching positions required by the MVUCSC is then given followed by a variation on this switching position with the intent to reduce part count. Finally, the testing the 13.8 kV three-phase four-wire, neutral-point-clamped, elevenlevel, flying-capacitor-based MV-UCSC connected directly to the grid is presented

Design of a gate-driving cell for enabling extended SiC MOSFET voltage blocking

A series connection of SiC MOSFETs for kV blocking capability can enable more design flexibility in modular multi-level converters as well as other topologies. In this paper, a novel gate driver circuit capable of driving series-connected SiC MOSFETs for high voltage applications is proposed. The primary advantage of the proposed design is that a single gate driver was used to switch all the series devices. The circuit used switching capacitors to sequentially charge and discharge device gate capacitances during switching and enable a negative turn-off voltage to avoid device coupling from Miller-capacitive feedback effects. With the proposed gate driver design and appropriate component values selection, avalanche breakdown due to voltage divergence during switching transients could be avoided with only a minor imbalance in the top device. Simulations and experimental measurements showed that the zero-current turn-off transition of all switches was achieved, and this approved the validity of the desig

Self-Powered 380 V DC SiC Solid-State Circuit Breaker and Fault Current Limiter

This paper presents a new ultrafast dc solid-state circuit breaker (SSCB) that uses a silicon carbide cascode as themain switching and limiting semiconductor and an isolated photovoltaic driver to control it. The proposed topology is self-powered and fully implemented with discrete parts. The SSCB’s cascode can work in three different states—fully ON during nominal operation, linear mode for current limitation, and fully OFF to disconnect the load. The time the SSCB operates in linear mode and the maximum current limit is easily set by discrete components. Control inputs have also been included to reset the SSCB after a fault has been removed or to remotely switch it ON or OFF. This device can be used in dc distribution avoiding deterioration due to the problems associated with electric arcs and mechanical aging of moving parts, limiting inrush currents and also minimizing conduction losses respect other kind of circuit breakers. Functional, thermal, and efficiency tests have been carried out with three different 380 V prototypes. Experimental results show the excellent behavior of the SSCB, it is able to block a 380 V short circuit failure in 570 ns; the authors have not found any faster results in the literature

Electrothermal simulation and characterisation of series connected power devices and converter applications

Power electronics is undergoing significant changes both at the device and at the converter level. Wide bandgap power devices like SiC MOSFETs are increasingly implemented in automotive, grid and industrial drive applications with voltage ratings as high as 1.7kV now commercially available although much higher voltages have been demonstrated as research prototypes. In high power applications where high DC bus voltages are used, as is the case in voltage source converters for industrial drives, marine propulsion and grid connected energy conversion systems, it may be necessary to series connect power devices for OFF-state voltage sharing. In high power applications, before the advent of multi-level converters, series connection of IGBT power modules was commonplace especially for HVDC-voltage source converter applications. However, with the advent of the modular multi-level converter, where the AC voltage waveform is synthesized by discrete voltage steps, the need for series connected is obviated. Most HVDC-VSC applications are now implemented by modular-multi-level converters. However, in some applications like VSCs for distribution network power conversion, there can be a combination between series connection of power devices and multi-level converter. Traditionally, voltage balancing in series connected power devices was achieved using snubber capacitors for dynamic voltage sharing and resistors for static voltage sharing. However, the use of snubber capacitors reduces the switching speed of the converter thereby defeating the purpose of using SiC power devices especially in power converters with high switching frequencies. To avoid this, active gate driving techniques that avoid the use of snubber capacitors during switching are under intensive research focus. This involves intelligent gate drivers capable of dynamically adjusting the gate pulse during switching. To use these gate drivers, it is necessary to explore the boundaries of static and dynamic voltage imbalance in series connected power devices. For example, it is necessary to understand how differences in device junction temperature and gate driver switching rates affects voltage divergence between series connected devices and how this differs between silicon IGBTs and SiC MOSFETs. This is similarly the case between series connected silicon PiN diodes and SiC Schottky diodes. Since silicon IGBTs and PiN diodes respectively exhibit tails currents and reverse recovery during turn-OFF, the dynamics of voltage divergence between series devices will differ from unipolar SiC power devices. Furthermore, the leakage current mechanisms determine the OFF-state voltage balancing dynamics and since Si IGBTs have different leakage current mechanisms from SiC devices, OFF-state voltage balancing in series connected devices will be different between the technologies. The contribution of this thesis is using finite element and compact device models backed by experimental measurements to investigate static and dynamic voltage imbalance in series connected power devices. Starting from the fundamental physics behind device operation, this thesis explores how the leakage currents and tail currents affects voltage divergence in series silicon bipolar devices compared to SiC power devices. This analysis is compared with how the switching dynamics peculiar to fast switching SiC devices affects voltage balancing in series connected SiC devices. Simulations and measurements show that series connected SiC power devices are less prone of excessive voltage divergence due to the absence of tail currents compared to series connected silicon bipolar devices where voltage divergence due to tail currents is evident. Reduced leakage currents due to the wide bandgap in SiC also ensures that it is less prone to voltage divergence (compared to silicon bipolar devices) under static OFF-state conditions. This means the snubber resistances can be increased thereby reducing the OFF-state power dissipation in series connected SiC devices. In the analysis of voltage sharing of series connected devices during the static ON-state and OFF-state it was shown that the zero-temperature coefficient of the power devices determines the voltage sharing and loss distribution in the ON-state while the leakage current and switching synchronization is critical in the OFF-state. Simulations and measurements in this thesis show that the higher ZTC points in silicon bipolar devices compared to SiC unipolar devices means that ON-state voltage divergence depends on the load current. The dominant failure mode for series connected power devices is failure under dynamic avalanche which occurs in cases of extreme uncontrolled voltage divergence. In the investigations of the switching transient behaviour of series connected IGBT and SiC MOSFETs during turn-OFF, it was shown that the voltage imbalance for Si IGBT is highly dependent on the carrier concentration in the drift region during switching while for SiC MOSFET it depends on the switching time constant of the gate voltage and the rate that the MOS-channel cuts the current. The thesis also explores the limits of power device performance under dynamic avalanche conditions for both series silicon bipolar and SiC unipolar devices. In the analysis of SOA of series connected devices it was discussed that the SOA is reduced by increased switching rates and DC link voltages. Finally, the thesis explores the 3L-NPC converter and how the power factor of the load on the AC side of the converter alters the power dissipation sharing between the devices. The results show that loss distribution between the devices in the converter is not just affected by the load power factor but also by the switching frequency

Design and Implementation of High-Efficiency, Lightweight, System-Friendly Solid-State Circuit Breaker

Direct current (DC) distribution system has shown potential over the alternative current (AC) distribution system in some application scenarios, e.g., electrified transportation, renewable energy, data center, etc. Because of the fast response speed, DC solid-state circuit breaker (SSCB) becomes a promising technology for the future power electronics intensive DC energy system with fault-tolerant capability. First, a thorough literature survey is performed to review the DC-SSCB technology. The key components for DC-SSCB, including power semiconductors, topologies, energy absorption units, and fault detection circuits, are studied. It is observed that the prior studies mainly focus on the basic interruption capability of the DC-SSCB. There are not so many studies on SSCB’s size optimization or system-friendly functions. Second, an insulated gate bipolar transistor (IGBT) based lightweight SSCB is proposed. With the reduced gate voltage, the proposed SSCB can limit the peak fault current without the bulky and heavy fault current limiting the inductor, which exists in the conventional SSCB circuit. Thus, the specific power density of the SSCB is substantially improved compared with the conventional design. Meanwhile, to understand the impact of different design parameters on the performance of SSCB, an analytical model is built to establish the relationship between SSCB dynamic performance and operating conditions considering the key components and circuit parasitics. Simulation and test results demonstrate the accuracy of the proposed model. To limit the fault current with the proposed SSCB without a current limiting inductor, power semiconductors need to operate in the active region temporarily. During this interval, a severe voltage oscillation has been observed experimentally, leading to the DC-SSCB overstress and eventually the failure. A detailed MATLAB/Simulink model is built to understand the mechanism causing the voltage oscillation. Three suppression methods using enhanced gate drive circuitry are proposed and compared. Test results based on a 2kV/1kA SSCB prototype demonstrate the effectiveness of the proposed oscillation mitigation method and the accuracy of the derived model. Meanwhile, when the system fault impedance is close to zero (e.g., high di/dt), the influence of the parasitic inductance contributed by interconnection (e.g., bus bar, module package, etc.) cannot be neglected. To study the influence of the bus bar connections on SSCB with high di/dt, a Q3D extractor is adopted to extract the parasitic parameters of the SSCB and understand the influence of different bus bar connections. A vertical bus bar is proposed to suppress the side effect and verified by the Q3D extractor and experimental results. Finally, a system-friendly SSCB is demonstrated. The proposed gate drive enables the SSCB to operate in the current limitation mode for the overcurrent limitation. The current limitation level and limitation time can be tuned by the gate drive. Then, this dissertation provides an all-in-one solution with integrated circuitries as the fault detector, actuator for the semiconductor’s operating status regulation, and coordinated control. This allows the developed SSCB to limit system fault current not exceeding short-circuit current rating (SCCR) and also take different responses under different fault cases. The feasibility and the effectiveness of the proposed system-friendly SSCB are validated with experimental results based on a 200V/10A SSCB demonstrator