Current reuse topology in UWB CMOS LNA

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A dual-mode Q-enhanced RF front-end filter for 5 GHz WLAN and UWB with NB interference rejection

The 5 GHz Wireless LAN (802.11a) is a popular standard for wireless indoor communications providing moderate range and speed. Combined with the emerging ultra Wideband standard (UWB) for short range and high speed communications, the two standards promise to fulfil all areas of wireless application needs. However, due to the overlapping of the two spectrums, the stronger 802.11a signals tend to interfere causing degradation to the UWB receiver. This presents one of the main technical challenges preventing the wide acceptance of UWB. The research work presented in this thesis is to propose a low cost RF receiver front-end filter topology that would resolve the narrowband (NB) interference to UWB receiver while being operable in both 802.11a mode and UWB mode. The goal of the dual mode filter design is to reduce cost and complexity by developing a fully integrated front-end filter. The filter design utilizes high Q passive devices and Q-enhancement technique to provide front-end channel-selection in NB mode and NB interference rejection in UWB mode. In the 802.11a NB mode, the filter has a tunable gain of 4 dB to 25 dB, NF of 8 dB and an IIP3 between -47 dBm and -18 dBm. The input impedance is matched at -16 dB. The frequency of operation can be tuned from 5.15 GHz to 5.35 GHz. In the UWB mode, the filter has a gain of 0 dB to 8 dB across 3.1 GHz to 9 GHz. The filter can reject the NB interference between 5.15 GHz to 5.35 GHz at up to 60 dB. The Q of the filter is tunable up to a 250 while consuming a maximum of 23.4 mW of power. The fully integrated dual mode filter occupies a die area of 1.1 mm2

Forward Body Biased Low Power 4.0-10.6 GHz Wideband Low Noise Amplifier

A forward body biased low power Low Noise Amplifier (LNA) is designed using Common Gate (CG) topology. By using current reuse technique between the first stage and second stage Common Source topology accompanied with forward body biasing leads to low power dissipation. A series to parallel tank circuit at this stage leads to wideband design. A shunt peaking inductor at the drain terminal of second stage causes the higher frequency peak to increase leading to wide bandwidth. Two CS cascade stages are used to increase the overall gain of the proposed LNA with a buffer stage at the output for output matching. The proposed LNA attained maximum gain of 26.39 dB with a gain greater than 16 dB over entire range. The circuit gives reflection coefficient less than – 10 dB with NF 2.7 dB. With Vdd of 0.925 V, a DC current of 8.32 mA is consumed giving 7.7 mW power consumption

High frequency of low noise amplifier architecture for WiMAX application: A review

The low noise amplifier (LNA) circuit is exceptionally imperative as it promotes and initializes general execution performance and quality of the mobile communication system. LNA's design in radio frequency (R.F.) circuit requires the trade-off numerous imperative features' including gain, noise figure (N.F.), bandwidth, stability, sensitivity, power consumption, and complexity. Improvements to the LNA's overall performance should be made to fulfil the worldwide interoperability for microwave access (WiMAX) specifications' prerequisites. The development of front-end receiver, particularly the LNA, is genuinely pivotal for long-distance communications up to 50 km for a particular system with particular requirements. The LNA architecture has recently been designed to concentrate on a single transistor, cascode, or cascade constrained in gain, bandwidth, and noise figure

Mixed Linearity Improvement Techniques for Ultra-wideband Low Noise Amplifier

We present the linearization of an ultra-wideband low noise amplifier (UWB-LNA) operating from 2GHz to 11GHz through combining two linearization methods. The used linearization techniques are the combination of post-distortion cancellation and derivative-superposition linearization methods. The linearized UWB-LNA shows an improved linearity (IIP3) of +12dBm, a minimum noise figure (NFmin.) of 3.6dB, input and output insertion losses (S11 and S22)  below -9dB over the entire working bandwidth, midband gain of 6dB at 5.8GHz, and overall circuit power consumption of 24mW supplied from a 1.5V voltage source. Both UWB-LNA and linearized UWB-LNA designs are verified and simulated with ADS2016.01 software using BSIM3v3 TSMC 180nm CMOS model files. In addition, the linearized UWB-LNA performance is compared with other recent state-of-the-art LNAs

An Ultra-Wideband Low Noise Amplifier and Spectrum Sensing Technique for Cognitive Radio

A low power ultra-wideband, inductorless low noise amplifier (LNA) employing a noise cancellation architecture and designed in a commercially available 40nm 1.2V digital CMOS process is presented. The amplifier targets cognitive radio communication applications which cover the frequency range of 1-10 GHz and achieves an S11 \u3c -9.5 dB from 1.4 - 9.5 GHz. Within this bandwidth the maximum power gain is 13.4 dB, the maximum noise figure is 4.3 dB, and the miminum IIP3 is 0 dBm. The total power consumption of the LNA (neglecting the buffer required to drive the 50 Ω test equipment) is 8 mW. The total area consumed is 0.031mm2 excluding the pads. A spectrum sensing technique using translational loop technique is also proposed to realize simultaneous spectrum sensing and data reception of cognitive radio. This technique also eliminates the need for tunable sharp band-select filter at the front-end

Survey on individual components for a 5 GHz receiver system using 130 nm CMOS technology

La intención de esta tesis es recopilar información desde un punto de vista general sobre los diferentes tipos de componentes utilizados en un receptor de señales a 5 GHz utilizando tecnología CMOS. Se ha realizado una descripción y análisis de cada uno de los componentes que forman el sistema, destacando diferentes tipos de configuraciones, figuras de mérito y otros parámetros. Se muestra una tabla resumen al final de cada sección, comparando algunos diseños que se han ido presentando a lo largo de los años en conferencias internacionales de la IEEE.The intention of this thesis is to gather information from an overview point about the different types of components used in a 5 GHz receiver using CMOS technology. A review of each of the components that form the system has been made, highlighting different types of configurations, figure of merits and parameters. A summary table is shown at the end of each section, comparing many designs that have been presented over the years at international conferences of the IEEE.Departamento de Ingeniería Energética y FluidomecánicaGrado en Ingeniería en Electrónica Industrial y Automátic

Integrated Distributed Amplifiers for Ultra-Wideband BiCMOS Receivers Operating at Millimeter-Wave Frequencies

Millimetre-wave technology is used for applications such as telecommunications and imaging. For both applications, the bandwidth of existing systems has to be increased to support higher data rates and finer imaging resolutions. Millimetrewave circuits with very large bandwidths are developed in this thesis. The focus is put on amplifiers and the on-chip integration of the amplifiers with antennas. Circuit prototypes, fabricated in a commercially available 130nm Silicon-Germanium (SiGe) Bipolar Complementary Metal-Oxide-Semiconductor (BiCMOS) process, validated the developed techniques. Cutting-edge performances have been achieved in the field of distributed and resonant-matched amplifiers, as well as in that of the antenna-amplifier co-integration. Examples are as follows: - A novel cascode gain-cell with three transistors was conceived. By means of transconductance peaking towards high frequencies, the losses of the synthetic line can be compensated up to higher frequencies. The properties were analytically derived and explained. Experimental demonstration validated the technique by a Traveling-Wave Amplifier (TWA) able to produce 10 dB of gain over a frequency band of 170GHz.# - Two Cascaded Single-Stage Distributed Amplifiers (CSSDAs) have been demonstrated. The first CSSDA, optimized for low power consumption, requires less than 20mW to provide 10 dB of gain over a frequency band of 130 GHz. The second amplifier was designed for high-frequency operation and works up to 250 GHz leading to a record bandwidth for distributed amplifiers in SiGe technology. - The first complete CSSDA circuit analysis as function of all key parameters was presented. The typical degradation of the CSSDA output matching towards high frequencies was analytically quantified. A balanced architecture was then introduced to retain the frequency-response advantages of CSSDAs and yet ensure matching over the frequency band of interested. A circuit prototype validated experimentally the technique. - The first traveling-wave power combiner and divider capable of operation from the MHz range up to 200 GHz were demonstrated. The circuits improved the state of the art of the maximum frequency of operation and the bandwidth by a factor of five. - A resonant-matched balanced amplifier was demonstrated with a centre frequency of 185 GHz, 10 dB of gain and a 55GHz wide –3 dB-bandwidth. The power consumption of the amplifier is 16.8mW, one of the lowest for this circuit class, while the bandwidth is the broadest reported in literature for resonant-matched amplifiers in SiGe technology