Circuits and Systems for On-Chip RF Chemical Sensors and RF FDD Duplexers

Integrating RF bio-chemical sensors and RF duplexers helps to reduce cost and area in the current applications. Furthermore, new applications can exist based on the large scale integration of these crucial blocks. This dissertation addresses the integration of RF bio-chemical sensors and RF duplexers by proposing these initiatives. A low power integrated LC-oscillator-based broadband dielectric spectroscopy (BDS) system is presented. The real relative permittivity ε’r is measured as a shift in the oscillator frequency using an on-chip frequency-to-digital converter (FDC). The imaginary relative permittivity ε”r increases the losses of the oscillator tank which mandates a higher dc biasing current to preserve the same oscillation amplitude. An amplitude-locked loop (ALL) is used to fix the amplitude and linearize the relation between the oscillator bias current and ε”r. The proposed BDS system employs a sensing oscillator and a reference oscillator where correlated double sampling (CDS) is used to mitigate the impact of flicker noise, temperature variations and frequency drifts. A prototype is implemented in 0.18 µm CMOS process with total chip area of 6.24 mm^2 to operate in 1-6 GHz range using three dual bands LC oscillators. The achieved standard deviation in the air is 2.1 ppm for frequency reading and 110 ppm for current reading. A tunable integrated electrical balanced duplexer (EBD) is presented as a compact alternative to multiple bulky SAW and BAW duplexers in 3G/4G cellular transceivers. A balancing network creates a replica of the transmitter signal for cancellation at the input of a single-ended low noise amplifier (LNA) to isolate the receive path from the transmitter. The proposed passive EBD is based on a cross-connected transformer topology without the need of any extra balun at the antenna side. The duplexer achieves around 50 dB TX-RX isolation within 1.6-2.2 GHz range up to 22 dBm. The cascaded noise figure of the duplexer and LNA is 6.5 dB, and TX insertion loss (TXIL) of the duplexer is about 3.2 dB. The duplexer and LNA are implemented in 0.18 µm CMOS process and occupy an active area of 0.35 mm^2

Integrated Circuit and System Design for Cognitive Radio and Ultra-Low Power Applications

The ubiquitous presence of wireless and battery-powered devices is an inseparable and invincible feature of our modern life. Meanwhile, the spectrum aggregation, and limited battery capacity of handheld devices challenge the exploding demand and growth of such radio systems. In this work, we try to present two separate solutions for each case; an ultra-wideband (UWB) receiver for Cognitive Radio (CR) applications to deal with spectrum aggregation, and an ultra-low power (ULP) receiver to enhance battery life of handheld wireless devices. Limited linearity and LO harmonics mixing are two major issues that ultra-wideband receivers, and CR in particular, are dealing with. Direct conversion schemes, based on current-driven passive mixers, have shown to improve the linearity, but unable to resolve LO harmonic mixing problem. They are usually limited to 3rd, and 5th harmonics rejection or require very complex and power hungry circuitry for higher number of harmonics. This work presents a heterodyne up-down conversion scheme in 180 nm CMOS technology for CR applications (54-862 MHz band) that mitigates the harmonic mixing issue for all the harmonics, while by employing an active feedback loop, a comparable to the state-of-the art IIP3 of better than +10 dBm is achieved. Measurements show an average NF of 7.5 dB when the active feedback loop is off (i.e. in the absence of destructive interference), and 15.5 dB when the feedback loop is active and a 0 dBm interferer is applied, respectively. Also, the second part of this work presents an ultra-low power super-regenerative receiver (SRR) suitable for OOK modulation and provides analytical insight into its design procedure. The receiver is fabricated in 40 nm CMOS technology and operates in the ISM band of 902-928 MHz. Binary search algorithm through Successive Approximation Register (SAR) architecture is being exploited to calibrate the internally generated quench signal and the working frequency of the receiver. Employing an on-chip inductor and a single-ended to differential architecture for the input amplifier has made the receiver fully integrable, eliminating the need for external components. A power consumption of 320 µW from a 0.65 V supply results in an excellent energy efficiency of 80 pJ/b at 4 Mb/s data rate. The receiver also employs an ADC that enables soft-decisioning and a convenient sensitivity-data rate trade-off, achieving sensitivity of -86.5, and -101.5 dBm at 1000 and 31.25 kbps data rate, respectivel

Integrated Circuit and System Design for Cognitive Radio and Ultra-Low Power Applications

The ubiquitous presence of wireless and battery-powered devices is an inseparable and invincible feature of our modern life. Meanwhile, the spectrum aggregation, and limited battery capacity of handheld devices challenge the exploding demand and growth of such radio systems. In this work, we try to present two separate solutions for each case; an ultra-wideband (UWB) receiver for Cognitive Radio (CR) applications to deal with spectrum aggregation, and an ultra-low power (ULP) receiver to enhance battery life of handheld wireless devices. Limited linearity and LO harmonics mixing are two major issues that ultra-wideband receivers, and CR in particular, are dealing with. Direct conversion schemes, based on current-driven passive mixers, have shown to improve the linearity, but unable to resolve LO harmonic mixing problem. They are usually limited to 3rd, and 5th harmonics rejection or require very complex and power hungry circuitry for higher number of harmonics. This work presents a heterodyne up-down conversion scheme in 180 nm CMOS technology for CR applications (54-862 MHz band) that mitigates the harmonic mixing issue for all the harmonics, while by employing an active feedback loop, a comparable to the state-of-the art IIP3 of better than +10 dBm is achieved. Measurements show an average NF of 7.5 dB when the active feedback loop is off (i.e. in the absence of destructive interference), and 15.5 dB when the feedback loop is active and a 0 dBm interferer is applied, respectively. Also, the second part of this work presents an ultra-low power super-regenerative receiver (SRR) suitable for OOK modulation and provides analytical insight into its design procedure. The receiver is fabricated in 40 nm CMOS technology and operates in the ISM band of 902-928 MHz. Binary search algorithm through Successive Approximation Register (SAR) architecture is being exploited to calibrate the internally generated quench signal and the working frequency of the receiver. Employing an on-chip inductor and a single-ended to differential architecture for the input amplifier has made the receiver fully integrable, eliminating the need for external components. A power consumption of 320 µW from a 0.65 V supply results in an excellent energy efficiency of 80 pJ/b at 4 Mb/s data rate. The receiver also employs an ADC that enables soft-decisioning and a convenient sensitivity-data rate trade-off, achieving sensitivity of -86.5, and -101.5 dBm at 1000 and 31.25 kbps data rate, respectivel

High performance readout circuits and devices for Lorentz force resonant CMOS-MEMS magnetic sensors

In the last decades, sensing capabilities of martphones have greatly improved since the early mobile phones of the 90’s. Moreover, wearables and the automotive industry require increasing electronics and sensing sophistication. In such echnological advance, Micro Electro Mechanical Systems (MEMS) have played an important role as accelerometers and gyroscopes were the first sensors based on MEMS technology massively introduced in the market. In contrast, it still does not exist a commercial MEMS-based compass, even though Lorentz force MEMS magnetometers were first proposed in the late 90’s. Currently, Lorentz force MEMS magnetometers have been under the spotlight as they can offer an integrated solution to nowadays sensing power. As a consequence, great advances have been achieved, but various bottlenecks limit the introduction of Lorentz force MEMS compasses in the market. First, current MEMS magnetometers require high current consumption and high biasing voltages to achieve good sensitivities. Moreover, even though devices with excellent performance and sophistication are found in the literature, there is still a lack of research on the readout electronic circuits, specially in the digital signal processing, and closed loop control. Second, most research outcomes rely on custom MEMS fabrication rocesses to manufacture the devices. This is the same approach followed in current commercial MEMS, but it requires different fabrication processes for the electronics and the MEMS. As a consequence, manufacturing cost is high and sensor performance is affected by the MEMS-electronics interface parasitics. This dissertation presents potential solutions to these issues in order to pave the road to the commercialization of Lorentz force MEMS compasses. First, a complete closed loop, digitally controlled readout system is proposed. The readout circuitry, implemented with off-the-shelf commercial components, and the digital control, on an FPGA, are proposed as a proof of concept of the feasibility, and potential benefits, of such architecture. The proposed system has a measured noise of 550 nT / vHz while the MEMS is biased with 300 µA rms and V = 1 V . Second, various CMOS-MEMS magnetometers have been designed using the BEOL part of the TSMC and SMIC 180 nm standard CMOS processes, and wet and vapor etched. The devices measurement and characterisation is used to analyse the benefits and drawbacks of each design as well as releasing process. Doing so, a high volume manufacturing viability can be performed. Yield values as high as 86% have been obtained for one device manufactured in a SMIC 180 nm full wafer run, having a sensitivity of 2.82 fA/µT · mA and quality factor Q = 7.29 at ambient pressure. While a device manufactured in TSMC 180 nm has Q = 634.5 and a sensitivity of 20.26 fA/µT ·mA at 1 mbar and V = 1 V. Finally, an integrated circuit has been designed that contains all the critical blocks to perform the MEMS signal readout. The MEMS and the electronics have been manufactured using the same die area and standard TSMC 180 nm process in order to reduce parasitics and improve noise and current consumption. Simulations show that a resolution of 8.23 µT /mA for V = 1 V and BW = 10 Hz can be achieved with the designed device.En les últimes dècades, tenint en compte els primers telèfons mòbils dels anys 90, les capacitats de sensat dels telèfons intel·ligents han millorat notablement. A més, la indústria automobilística i de wearables necessiten cada cop més sofisticació en el sensat. Els Micro Electro Mechanical Systems (MEMS) han tingut un paper molt important en aquest avenç tecnològic, ja que acceleròmetres i giroscopis varen ser els primers sensors basats en la tecnologia MEMS en ser introduïts massivament al mercat. En canvi, encara no existeix en la indústria una brúixola electrònica basada en la tecnologia MEMS, tot i que els magnetòmetres MEMS varen ser proposats per primera vegada a finals dels anys 90. Actualment, els magnetòmetres MEMS basats en la força de Lorentz són el centre d'atenció donat que poden oferir una solució integrada a les capacitats de sensat actuals. Com a conseqüència, s'han aconseguit grans avenços encara que existeixen diversos colls d'ampolla que encara limiten la introducció al mercat de brúixoles electròniques MEMS basades en la força de Lorentz. Per una banda, els agnetòmetres MEMS actuals necessiten un consum de corrent i un voltatge de polarització elevats per aconseguir una bona sensibilitat. A més, tot i que a la literatura hi podem trobar dispositius amb rendiments i sofisticació excel·lents, encara existeix una manca de recerca en el circuit de condicionament, especialment de processat digital i control del llaç. Per altra banda, moltes publicacions depenen de processos de fabricació de MEMS fets a mida per fabricar els dispositius. Aquesta és la mateixa aproximació que s'utilitza actualment en la indústria dels MEMS, però té l'inconvenient que requereix processos de fabricació diferents pels MEMS i l’electrònica. Per tant, el cost de fabricació és alt i el rendiment del sensor queda afectat pels paràsits en la interfície entre els MEMS i l'electrònica. Aquesta tesi presenta solucions potencials a aquests problemes amb l'objectiu d'aplanar el camí a la comercialització de brúixoles electròniques MEMS basades en la força de Lorentz. En primer lloc, es proposa un circuit de condicionament complet en llaç tancat controlat digitalment. Aquest s'ha implementat amb components comercials, mentre que el control digital del llaç s'ha implementat en una FPGA, tot com una prova de concepte de la viabilitat i beneficis potencials que representa l'arquitectura proposada. El sistema presenta un soroll de 550 nT / vHz quan el MEMS està polaritzat amb 300 µArms i V = 1 V . En segon lloc, s'han dissenyat varis magnetòmetres CMOS-MEMS utilitzant la part BEOL dels processos CMOS estàndard de TSMC i SMIC 180 nm, que després s'han alliberat amb líquid i gas. La mesura i caracterització dels dispositius s’ha utilitzat per analitzar els beneficis i inconvenients de cada disseny i procés d’alliberament. D'aquesta manera, s'ha pogut realitzar un anàlisi de la viabilitat de la seva fabricació en massa. S'han obtingut valors de yield de fins al 86% per un dispositiu fabricat amb SMIC 180 nm en una oblia completa, amb una sensibilitat de 2.82 fA/µT · mA i un factor de qualitat Q = 7.29 a pressió ambient. Per altra banda, el dispositiu fabricat amb TSMC 180 nm presenta una Q = 634.5 i una sensibilitat de 20.26 fA/µT · mA a 1 mbar amb V = 1 V. Finalment, s'ha dissenyat un circuit integrat que conté tots els blocs per a realitzar el condicionament de senyal del MEMS. El MEMS i l'electrònica s'han fabricat en el mateix dau amb el procés estàndard de TSMC 180 nm per tal de reduir paràsits i millorar el soroll i el consum de corrent. Les simulacions mostren una resolució de 8.23 µT /mA amb V = 1 V i BW = 10 Hz pel dispositiu dissenyat

Design of a Programmable Passive SoC for Biomedical Applications Using RFID ISO 15693/NFC5 Interface

Low power, low cost inductively powered passive biotelemetry system involving fully customized RFID/NFC interface base SoC has gained popularity in the last decades. However, most of the SoCs developed are application specific and lacks either on-chip computational or sensor readout capability. In this paper, we present design details of a programmable passive SoC in compliance with ISO 15693/NFC5 standard for biomedical applications. The integrated system consists of a 32-bit microcontroller, a sensor readout circuit, a 12-bit SAR type ADC, 16 kB RAM, 16 kB ROM and other digital peripherals. The design is implemented in a 0.18 μ m CMOS technology and used a die area of 1.52 mm × 3.24 mm. The simulated maximum power consumption of the analog block is 592 μ W. The number of external components required by the SoC is limited to an external memory device, sensors, antenna and some passive components. The external memory device contains the application specific firmware. Based on the application, the firmware can be modified accordingly. The SoC design is suitable for medical implants to measure physiological parameters like temperature, pressure or ECG. As an application example, the authors have proposed a bioimplant to measure arterial blood pressure for patients suffering from Peripheral Artery Disease (PAD)

Design of custom CMOS amplifiers for nanoscale bio-interfaces

The miniaturization of electronics is a technique that holds a lot of potential in improving system performance in a variety of applications. The simultaneous miniaturization of sensors into the nano-scale has provided new ways to probe biological systems. Careful co-design of these electronics and sensors can unlock measurements and experiments that would otherwise be impossible to achieve. This thesis describes the design of two such instrumentation amplifiers and shows that significant gains in temporal resolution and noise performance are possible through careful optimization. A custom integrated amplifier is developed for improving the temporal resolution in nanopore recordings. The amplifier is designed in a commercial 0.18 μm complementary metal-oxide-semiconductor (CMOS) process. A platform is then built with the amplifier at its core that integrates glass-passivated solid-state nanopores to achieve measurement bandwidth over an order of magnitude greater than the state of the art. The use of wavelet transforms for denoising the data and further improving the signal-to-noise ratio (SNR) is then explored. A second amplifier is designed in a 0.18 μm CMOS process for intracellular recordings from neurons. The amplifier contains all the compensation circuitry required for canceling the effects of the electrode non-idealities. Compared to equivalent commercial systems and the state of the art, the amplifier performs comparably or better while consuming orders of magnitude lower power. These systems can inform the design of extremely miniaturized application-specific integrated amplifiers of the future

CMOS Design of Reconfigurable SoC Systems for Impedance Sensor Devices

La rápida evolución en el campo de los sensores inteligentes, junto con los avances en las tecnologías de la computación y la comunicación, está revolucionando la forma en que recopilamos y analizamos datos del mundo físico para tomar decisiones, facilitando nuevas soluciones que desempeñan tareas que antes eran inconcebibles de lograr.La inclusión en un mismo dado de silicio de todos los elementos necesarios para un proceso de monitorización y actuación ha sido posible gracias a los avances en micro (y nano) electrónica. Al mismo tiempo, la evolución de las tecnologías de procesamiento y micromecanizado de superficies de silicio y otros materiales complementarios ha dado lugar al desarrollo de sensores integrados compatibles con CMOS, lo que permite la implementación de matrices de sensores de alta densidad. Así, la combinación de un sistema de adquisición basado en sensores on-Chip, junto con un microprocesador como núcleo digital donde se puede ejecutar la digitalización de señales, el procesamiento y la comunicación de datos proporciona características adicionales como reducción del coste, compacidad, portabilidad, alimentación por batería, facilidad de uso e intercambio inteligente de datos, aumentando su potencial número de aplicaciones.Esta tesis pretende profundizar en el diseño de un sistema portátil de medición de espectroscopía de impedancia de baja potencia operado por batería, basado en tecnologías microelectrónicas CMOS, que pueda integrarse con el sensor, proporcionando una implementación paralelizable sin incrementar significativamente el tamaño o el consumo, pero manteniendo las principales características de fiabilidad y sensibilidad de un instrumento de laboratorio. Esto requiere el diseño tanto de la etapa de gestión de la energía como de las diferentes celdas que conforman la interfaz, que habrán de satisfacer los requisitos de un alto rendimiento a la par que las exigentes restricciones de tamaño mínimo y bajo consumo requeridas en la monitorización portátil, características que son aún más críticas al considerar la tendencia actual hacia matrices de sensores.A nivel de celdas, se proponen diferentes circuitos en un proceso CMOS de 180 nm: un regulador de baja caída de voltaje como unidad de gestión de energía, que proporciona una alimentación de 1.8 V estable, de bajo ruido, precisa e independiente de la carga para todo el sistema; amplificadores de instrumentación con una aproximación completamente diferencial, que incluyen una etapa de entrada de voltaje/corriente configurable, ganancia programable y ancho de banda ajustable, tanto en la frecuencia de corte baja como alta; un multiplicador para conformar la demodulación dual, que está embebido en el amplificador para optimizar consumo y área; y filtros pasa baja totalmente integrados, que actúan como extractores de magnitud de DC, con frecuencias de corte ajustables desde sub-Hz hasta cientos de Hz.<br /