Online signature verification systems on a low-cost FPGA

This paper describes three different approaches for the implementation of an online signature verification system on a low-cost FPGA. The system is based on an algorithm, which operates on real numbers using the double-precision floating-point IEEE 754 format. The doubleprecision computations are replaced by simpler formats, without affecting the biometrics performance, in order to permit efficient implementations on low-cost FPGA families. The first approach is an embedded system based on MicroBlaze, a 32-bit soft-core microprocessor designed for Xilinx FPGAs, which can be configured by including a single-precision floating-point unit (FPU). The second implementation attaches a hardware accelerator to the embedded system to reduce the execution time on floating-point vectors. The last approach is a custom computing system, which is built from a large set of arithmetic circuits that replace the floating-point data with a more efficient representation based on fixed-point format. The latter system provides a very high runtime acceleration factor at the expense of using a large number of FPGA resources, a complex development cycle and no flexibility since it cannot be adapted to other biometric algorithms. By contrast, the first system provides just the opposite features, while the second approach is a mixed solution between both of them. The experimental results show that both the hardware accelerator and the custom computing system reduce the execution time by a factor ×7.6 and ×201 but increase the logic FPGA resources by a factor ×2.3 and ×5.2, respectively, in comparison with the MicroBlaze embedded system.This research was funded by Spanish MCIN/AEI/10.13039/501100011033, grant number PID2019-107274RB-I00.Peer ReviewedPostprint (published version

Acceleration of Complex Algorithms on a Fast Reconfigurable Embedded System on Spartan-3

Complex algorithms usually require several computation stages. Many embedded microprocessors have not enough computational performance to resolve these algorithms in a reasonable time, so dedicated coprocessors accelerate them although the main drawback is the area devoted to them. A reconfigurable coprocessor can drastically reduce the area, since it accommodates a set of coprocessors whose execution is multiplexed on time, although the reconfiguration speed reduces the overall system performance. Although self-reconfigurable systems are possible on Spartan-3 FPGAs, it requires a hard design task due to the lack of software and hardware support available on higher-cost families. This paper describes the architecture of a fast self-reconfigurable embedded system mapped on Spartan-3, used as computation platform to solve a complex algorithm, such as the image-processing carried out in a fingerprint biometric algorithm. In order to reduce the reconfiguration time, the system uses our custom-made memory and reconfiguration controllers. Moreover, the dynamic coprocessor can access directly to external memory through our memory controller to improve processing time.Peer ReviewedPostprint (published version

A Fixed-Frequency Quasi-Sliding Control Algorithm: Application to Power Inverters Design by Means of FPGA Implementation

In this paper a fixed-frequency quasi-sliding control algorithm based on switching surface zero averaged dynamics (ZAD) is reported. This algorithm is applied to the design of a Buck-based inverter, and implemented in a laboratory prototype by means of a field programmable gate array (FPGA), taking into account processing speed versus computational complexity trade-off. Three control laws, namely sliding control (SC), fixed-frequency quasi-sliding ZAD and PWM-based control have been experimentally tested to highlight the features of the proposed algorithm. According to the experimental results presented in the paper, the ZAD algorithm fulfills the requirement of fixed switching frequency and exhibits similar robustness properties in the presence of perturbations to those of sliding control mode.Peer Reviewe

Fast self-reconfigurable embedded system on Spartan-3

Many image-processing algorithms require several stages to be processed that cannot be resolved by embedded microprocessors in a reasonable time, due to their high-computational cost. A set of dedicated coprocessors can accelerate the resolution of these algorithms, alt hough the main drawback is the area needed for their implementation. The main advantage of a reconfigurable system is that several coprocessors designed to perform different operations can be mapped on the same area in a time-multiplexed way. This work presents the architecture of an embedded system composed of a microprocessor and a run-time reconfigurable coprocessor, mapped on Spartan-3, the low-cost family of Xilinx FPGAs. Designing reconfigurable systems on Spartan-3 requires much design effort, since unlike higher cost families of Xilinx FPGAs, this device does not officially support partial reconfiguration. In order to overcome this drawback, the paper also describes the main steps used in the design flow to obtain a successful design. The main goal of the presented architecture is to reduce the coprocessor reconfiguration time, as well as accelerate image-processing algorithms. The experimental results demonstrate significant improvement in both objectives. The reconfiguration rate nearly achieves 320 Mb/s which is far superior to th e previous related works.Peer ReviewedPostprint (published version

Control en modo deslizante para un convertidor reductor multifase en entrelazado con ecualización de corriente

La presente comunicación aplica la técnica de control en modo de deslizamiento para la obtención de robustez frente a variaciones de la tensión de entrada, de la carga y de la tensión de referencia en un convertidor reductor multifase. Con el objetivo de garantizar una correcta distribución de potencia entre las diversas fases se modifican adecuadamente las superficies de conmutación para lograr una ecualización de corrientes. De este modo el control propuesto permite regular la tensión de salida, lograr una correcta ecualización de corrientes y minimizar el rizado de corriente en el nodo de conexión de la carga. El diseño se valida mediante resultados de simulación.Postprint (published version

Unidad aritmética en coma flotante para sistemas autoreconfigurables dinámicamente sobre Spartan-3 basados en Microblaze

El presente artículo muestra la implementación de una unidad en coma flotante (FPU) que actúa como coprocesador dentro de un sistema auto-reconfigurable dinámicamente. La FPU tiene capacidad para resolver operaciones básicas como la suma, la resta, el producto, el cociente, la raíz cuadrada, la inversa y el cuadrado. Además, dispone de un registro en el que se almacena el último resultado obtenido con la intención de utilizarlo como operador en el siguiente cálculo, de modo que se reducen los accesos a los buses de comunicación en la resolución de las operaciones matemáticas. El diseño emplea Microblaze como microprocesador del sistema y su implementación se ha realizado sobre una FPGA Spartan 3 de bajo coste. El artículo muestra resultados experimentales en relación al área total ocupada, así como los tiempos de ejecución obtenidos con un ejemplo particular basado en un algoritmo de CORDIC resuelto en coma flotante.Peer ReviewedPostprint (author’s final draft

Implementación mediante FPGA de un sistema SVM de verificación de locutor

Los sistemas biométricos caracterizados por su alto nivel de seguridad se implementan habitualmente con sistemas procesadores de altas prestaciones como los ordenadores personales. Estos procesadores trabajan en un rango de frecuencias de GHz que les permiten realizar millones de operaciones por segundo, de forma que pueden ejecutar en tiempo real complejos algoritmos de verificación. Sin embargo, esta solución de implementación tiene el inconveniente del elevado coste. La utilización de dispositivos programables del tipo FPGA (Field Programmable Gate Array) permite obtener a bajo coste soluciones a medida con las que se consiguen elevadas velocidades de proceso similares a los sistemas μP de altas prestaciones. En este artículo se presenta el diseño e implementación sobre una FPGA de un sistema de verificación de locutor basado en los coeficientes Mel-Cepstrum y en un algoritmo de clasificación SVM (Support Vector Machines). Los resultados experimentales obtenidos con el diseño propuesto muestran una velocidad de proceso equiparable a la conseguida con un ordenador personal basado en el μP Pentium IV.Peer ReviewedPostprint (published version

Role of age and comorbidities in mortality of patients with infective endocarditis

[Purpose]: The aim of this study was to analyse the characteristics of patients with IE in three groups of age and to assess the ability of age and the Charlson Comorbidity Index (CCI) to predict mortality. [Methods]: Prospective cohort study of all patients with IE included in the GAMES Spanish database between 2008 and 2015.Patients were stratified into three age groups:<65 years,65 to 80 years,and ≥ 80 years.The area under the receiver-operating characteristic (AUROC) curve was calculated to quantify the diagnostic accuracy of the CCI to predict mortality risk. [Results]: A total of 3120 patients with IE (1327 < 65 years;1291 65-80 years;502 ≥ 80 years) were enrolled.Fever and heart failure were the most common presentations of IE, with no differences among age groups.Patients ≥80 years who underwent surgery were significantly lower compared with other age groups (14.3%,65 years; 20.5%,65-79 years; 31.3%,≥80 years). In-hospital mortality was lower in the <65-year group (20.3%,<65 years;30.1%,65-79 years;34.7%,≥80 years;p < 0.001) as well as 1-year mortality (3.2%, <65 years; 5.5%, 65-80 years;7.6%,≥80 years; p = 0.003).Independent predictors of mortality were age ≥ 80 years (hazard ratio [HR]:2.78;95% confidence interval [CI]:2.32–3.34), CCI ≥ 3 (HR:1.62; 95% CI:1.39–1.88),and non-performed surgery (HR:1.64;95% CI:11.16–1.58).When the three age groups were compared,the AUROC curve for CCI was significantly larger for patients aged <65 years(p < 0.001) for both in-hospital and 1-year mortality. [Conclusion]: There were no differences in the clinical presentation of IE between the groups. Age ≥ 80 years, high comorbidity (measured by CCI),and non-performance of surgery were independent predictors of mortality in patients with IE.CCI could help to identify those patients with IE and surgical indication who present a lower risk of in-hospital and 1-year mortality after surgery, especially in the <65-year group

Clonal chromosomal mosaicism and loss of chromosome Y in elderly men increase vulnerability for SARS-CoV-2

The pandemic caused by severe acute respiratory syndrome coronavirus 2 (SARS-CoV-2, COVID-19) had an estimated overall case fatality ratio of 1.38% (pre-vaccination), being 53% higher in males and increasing exponentially with age. Among 9578 individuals diagnosed with COVID-19 in the SCOURGE study, we found 133 cases (1.42%) with detectable clonal mosaicism for chromosome alterations (mCA) and 226 males (5.08%) with acquired loss of chromosome Y (LOY). Individuals with clonal mosaic events (mCA and/or LOY) showed a 54% increase in the risk of COVID-19 lethality. LOY is associated with transcriptomic biomarkers of immune dysfunction, pro-coagulation activity and cardiovascular risk. Interferon-induced genes involved in the initial immune response to SARS-CoV-2 are also down-regulated in LOY. Thus, mCA and LOY underlie at least part of the sex-biased severity and mortality of COVID-19 in aging patients. Given its potential therapeutic and prognostic relevance, evaluation of clonal mosaicism should be implemented as biomarker of COVID-19 severity in elderly people. Among 9578 individuals diagnosed with COVID-19 in the SCOURGE study, individuals with clonal mosaic events (clonal mosaicism for chromosome alterations and/or loss of chromosome Y) showed an increased risk of COVID-19 lethality

Base de datos de abejas ibéricas

Las abejas son un grupo extremadamente diverso con más de 1000 especies descritas en la península ibérica. Además, son excelentes polinizadores y aportan numerosos servicios ecosistémicos fundamentales para la mayoría de ecosistemas terrestres. Debido a los diversos cambios ambientales inducidos por el ser humano, existen evidencias del declive de algunas de sus poblaciones para ciertas especies. Sin embargo, conocemos muy poco del estado de conservación de la mayoría de especies y de muchas de ellas ignoramos cuál es su distribución en la península ibérica. En este trabajo presentamos un esfuerzo colaborativo para crear una base de datos de ocurrencias de abejas que abarca la península ibérica e islas Baleares que permitirá resolver cuestiones como la distribución de las diferentes especies, preferencia de hábitat, fenología o tendencias históricas. En su versión actual, esta base de datos contiene un total de 87 684 registros de 923 especies recolectados entre 1830 y 2022, de los cuales un 87% presentan información georreferenciada. Para cada registro se incluye información relativa a la localidad de muestreo (89%), identificador y colector de la especie (64%), fecha de captura (54%) y planta donde se recolectó (20%). Creemos que esta base de datos es el punto de partida para conocer y conservar mejor la biodiversidad de abejas en la península ibérica e Islas Baleares. Se puede acceder a estos datos a través del siguiente enlace permanente: https://doi.org/10.5281/zenodo.6354502ABSTRACT: Bees are a diverse group with more than 1000 species known from the Iberian Peninsula. They have increasingly received special attention due to their important role as pollinators and providers of ecosystem services. In addition, various rapid human-induced environmental changes are leading to the decline of some of its populations. However, we know very little about the conservation status of most species and for many species, we hardly know their true distributions across the Iberian Peninsula. Here, we present a collaborative effort to collate and curate a database of Iberian bee occurrences to answer questions about their distribution, habitat preference, phenology, or historical trends. In total we have accumulated 87 684 records from the Iberian Peninsula and the Balearic Islands of 923 different species with 87% of georeferenced records collected between 1830 and 2022. In addition, each record has associated information such as the sampling location (89%), collector and person who identified the species (64%), date of the capture (54%) and plant species where the bees were captured (20%). We believe that this database is the starting point to better understand and conserve bee biodiversity in the Iberian Peninsula. It can be accessed at: https://doi.org/10.5281/zenodo.6354502Esta base de datos se ha realizado con la ayuda de los proyectos EUCLIPO (Fundação para a Ciência e a Tecnologia, LISBOA-01-0145-FEDER-028360/EUCLIPO) y SAFEGUARD (ref. 101003476 H2020 -SFS-2019-2).info:eu-repo/semantics/publishedVersio