Stability Enhancement for Single-Loop Voltage Controlled Voltage-Source Converters with LC-Filter

Voltage controlled voltage source converters (VSCs) have been widely applied in microgrids, uninterruptible power sources, smart transformer and 400 Hz ground power units for airplanes, etc. An LC filter is generally adopted to attenuate high frequency switching harmonic and to improve the qualities of output voltage and current for grid or loads. Nevertheless, VSCs have to trade-off between the stability characteristic and the ability of switching harmonics suppression when a single-loop voltage control method is adopted. In general, the resonant frequency ω r of LC filter should be less than 1/4 of sampling frequency ω s to ensure sufficient attenuation of the switching harmonic. However, ω r should be higher than 1/3 of ω s for the system stability when a proportional-resonant (PR) controller with a positive proportional gain is implemented. This paper proposes a feedback of modulation voltage (FMV) control design method for single-loop control to ensure stability condition in a higher frequency range and good switching harmonics suppression at the same time. Finally, simulation results are provided to verify the effectiveness of the proposed method

Space Vector Modulation Technique for Reducing Harmonics in Current with Zero Common-Mode Voltage for Two-Parallel Three-Level Converters

A zero common-mode voltage (ZCMV) modulation has the advantage of reducing electromagnetic interference (EMI) and a feature that hardly generates a zero- sequence circulating current (ZSCC) in converters operating in parallel. However, this modulation has a critical issue related to the increase in harmonics in the phase current due to the limitation of using voltage vectors generating ZCMV. Thus, this paper proposes an optimal space vector modulation (SVM) technique for two-parallel three-level converters to reduce the harmonics increased by using the ZCMV PWM. The creation of virtual voltage vectors (VVVs) using vector synthesis based on the ZCMV PWM is addressed. Accordingly, new small regions in each sector of the SVM are defined in consideration with the nearest three voltage vectors, including the virtual vectors. In addition, PWM sequences for each region and dwell time for each voltage vector are also determined. Optimal vector utilization of the proposed ZCMV SVM can further reduce the current harmonics. The performance comparison between the proposed ZCMV SVM and existing methods are presented in simulation and experimental results

Enhanced Current-Type P-HIL Interface Algorithm for Smart Transformers Testing

The energy systems are evolving towards the wide integration of power electronics-based technologies, such as electric vehicles. A promising solution to increase the grid controllability is represented by grid-forming converters, such as smart transformers (STs). Being a new technology, the ST experimental testing is a fundamental step before commercialization. Instead of performing time consuming and not flexible on-field tests, the Power Hardware In the Loop (P-HIL) offers a flexible testing environment for experimentally validating new technologies. The real-time simulation of the electrical grid offers the possibility to vary quickly the testing environment, while the power amplification stage offers the validation of the real hardware. Despite the clear testing advantages, the P-HIL stability and testing accuracy is still a matter of study. This paper introduces a new P-HIL interface approach for ST application, that can guarantee high testing accuracy in a large frequency spectrum. The proposed approach combines the tracking capability of the existing controlled Current-Type P-HIL interface algorithm, with the well-known Partial Circuit Duplication approach. The accuracy and stability analysis has been performed analytically and validated by means of extensive experimental P-HIL testing

Reduction of the Circulating Current among Parallel NPC Inverters

In medium/high power applications including smart transformers, active power filters and wind turbines, 3-level Neutral-Point-Clamped (NPC) inverters proved to be a reliable solution, providing high efficiency and low harmonic distortion. In practice, several NPCs are parallel connected and operated in interleaved to further increase the power handling and reduce the line filters size. However, if such configuration has a common dc-link, High-frequency Zero-Sequence Circulating-Current (HF-ZSCC) arises among the inverters, increasing power losses of the switching devices and propagating the stress on the dc-capacitors. Moreover, the amplitude of the HF-ZSCC is inversely proportional to the filter inductance size, therefore in real applications it can reach hundreds of Amperes even with relatively low output currents. The research on the HF-ZSCC is mostly concentrated on 2-level inverters for low voltage grids and traction applications, where the inductance size is relatively big and the HF-ZSCC does not affect the system efficiency. Differently, NPCs provide higher switching degree of freedom and more sophisticated methods can be applied to reduce the HF-ZSCC. This paper investigates a Double-Reference Pulse-Width Modulation (DRPWM) as solution for diminishing the HF-ZSCC in paralleled NPCs. The performance of DRPWM method is confirmed by both simulation and experiments, performed on a 1.6MVA system

Integration and Optimization of Voltage Active Filtering Functionality in a PV Park

The stringent regulations on the power quality declared in the standard IEEE 519-2014 push the companies and the power producers to install active filters to compensate the voltage harmonics distortion in the point of common coupling (PCC). However, in the case of a Photovoltaic (PV) park, the cost for an additional active filter converter can be saved by using the PV converters themselves as active filter. This solution is very attractive, but reserves several challenges. In fact, the harmonic current injection by the PV converters can generate ripples in the DC link which increases the stress on the converter components and affects the MPPT. Moreover, the overcurrent protection of the PV converter must be taken into account. In this paper a centralized optimized strategy to share the harmonic current injection among all the converters in a PV park is investigated. The optimization is formulated as a quadratic programming (QP) problem: the active power consumed by the PV park for the active filtering and the DC link ripple of the PV converters caused by the harmonic currents injection are minimized. The limit on the maximum injectable harmonic current by each PV converter are respected

Zero-sequence Circulating Current Suppression with Stand-alone Feedforward Control for Power Hardware-in-the-Loop System

A PWM converter based power hardware-in-the-loop (PHIL) system can provide rapid and low-cost alternatives for prototype testing of high-power converters for electric vehicles or smart grid industries. To achieve simple configuration avoiding an additional bidirectional DC supply, the power amplifier (PA) in the PHIL can share the DC-link of the device under test (DUT). However, due to the coupling of AC and DC ports and differences in the zero-sequence voltage (ZSV) of the two converters, an inevitable low-frequency zero-sequence circulating current (ZSCC) results. This paper proposes a stand-alone control method using ZSV feedforward control to suppress the ZSCC flowing through the PWM converters of the PA and DUT. The ZSV of the DUT can be estimated from the d-q voltage equation in the PA, and feedforward term is applied with a proportional resonant (PR) controller. The effectiveness of the proposed method is verified by experimental results

Analysis and Suppression of Zero-Sequence Circulating Current in Multi-Parallel Converters

The use of a multi-parallel converter system has many advantages in increased scalability, better maintenance, scheduling, and improved output current quality. However, a periodic zero-sequence circulating current (ZSCC) may occur due to the asymmetry of parallel-connected converters. ZSCC produces additional losses and possible instability of the system. Therefore, proper control must be applied to suppress this harmful ZSCC. In order to design an effective controller for suppressing ZSCC, it is necessary to analyze the cause of the circulating current generation. However, most of the existing studies have applied the controller without detailed analysis. Therefore, this paper mathematically analyzes the ZSCC spectrum using the Fourier series to identify which harmonics are included in ZSCC. From the analysis results, the necessity of multi-resonant controllers to suppress the ZSCC at specific harmonics is demonstrated. Simulation and experiments are conducted to validate the analysis results and the necessity of multi-resonant controllers

A Passivity-Based High-Bandwidth Voltage Control for Grid-Forming Inverters

The increasing number of power electronic devices connected to the power system is leading it to new stability challenges. The uncertainty of the grid-model may complicate the controller design and compromise stability. As a countermeasure, LQR and pole-placement techniques can be re-oriented to design for passivity, which is leading to new controller design paradigms. Nevertheless, as a general rule, all the variables of the system are considered in the full bandwidth, which may become unfeasible or costly in the industrial scenario. An original controller design technique for LC or LCL filter which accomplishes passivity in a wide range of frequency is proposed. Besides, it reduces the voltage sensor needs, even controlling it, being suitable for Grid-Forming. As consequence, the complexity of the software, hardware and price are reduced. Experimental verification is provided: impedance of the converter from the grid side and response against a changes in the reference/load

Analysis of Overmodulation in Power Synchronization-based Voltage Source Converters

Low power system inertia in power electronics-dominated grids is a widely discussed problem. Power synchronization allows to emulate inertia by means of the active power low-pass filter, slowing down the grid frequency excursions. Nevertheless, inertia emulation during grid disturbances results in high energy exchange with the dc-link, which brings large dc voltage excursions. When the dc voltage dips below the ac line voltage peak, the modulation index can become too high and make the converter unable to produce the requested ac voltage. The consequent saturation of the voltage can cause current control wind-up, harmonic distortion and loss of controllability. Moreover, when the reference voltage is saturated, the converter does not behave anymore according to the power synchronization control law, making the conventional stability analyses not valid. Despite the relevance of these issues, a systematic analysis about the voltage saturation induced by grid disturbances in power converters is still missing. For that, this paper proposes a mathematical tool based on Bode plots. The target of this tool is to properly chose the converter parameters in order to tolerate grid disturbances without reaching the voltage saturation. Simulations and experiments are provided

Soft-start procedure for a three-stage smart transformer based on dual-active bridge and cascaded H-bridge converters

Power electronics based three-stage smart transformers (STs) can be seriously damaged by inrush currents and overvoltages during the start-up phase if the control of the stages is not correctly coordinated. Hence, it is crucial to design properly the start-up procedure, especially in case of modular architectures with distributed dc-links. The design of the start-up procedure depends on the ST power stages topologies, their control systems, and the operation modes. This article proposes a soft-shift start modulation technique that allows to limit the inrush current in the dc/dc isolation stage during the dc-link capacitors precharging. A fast voltage-balancing control, performed by the dc/dc isolation stage, is introduced to avoid overvoltages and unbalanced voltage conditions among the different power cells. Under the proposed method, fast control dynamics is guaranteed thanks to the high frequency bandwidth of the dc/dc isolation stage converters. Theoretical analysis, based on a detailed small signal model of the ST, and simulations are used to demonstrate the principle of the operation. Experimental results, carried out in an ST prototype, confirm the performances of proposed solution in realizing a smooth start-up without voltage/current overshoots