Novel modeling strategy for a BCI set-up applied in an automotive application: an industrial way to use EM simulation tools to help Hardware and ASIC designers to improve their designs for immunity tests

Electronics suppliers of automotive industry use BCI (Bulk Current Injection) measurements to qualify immunity robustness of their equipment whereas electronics components manufacturers use DPI (Direct Power Injection) to qualify immunity of their component. Due to harness resonances, levels obtained during a BCI test exceed standard DPI requirements imposed by automotive suppliers onto components' manufacturers. We propose to use BCI set-up modeling to calculate the equivalent DPI level obtained at the component level during equipment testing and to compare results with DPI measurements realized at IC level

Efficient optimization of the integrity behavior of analog nonlinear devices using surrogate models

A novel technique to analyze and optimize the integrity behavior of nonlinear analog devices in the presence of noise is proposed. The technique leverages surrogate models, as such reducing the simulation time, avoiding time-consuming and expensive measurements after tape-out and hiding the original netlist of the circuit, while maintaining high accuracy. Easy integration of the surrogates into a circuit simulator together with pertinent subcircuits representing, e. g., board and package, allows mimicking the integrity behavior of a complete setup while still being in the design phase. In this contribution, the method is applied to a case study, being a voltage regulator designed for automotive applications

Translation of automotive module RF immunity test limits into equivalent IC test limits using S-parameter IC models

A method to translate immunity specifications of automotive modules into equivalent requirements at integrated circuit (IC) level, using linear scattering parameter models of the ICs, is presented. A technique is described to determine S-parameters of ICs by simulations based on back-annotated analog schematics. The simulation results are compared with measurement data obtained using a specially designed test board. As an example, simulation and measurement results are given for the input stage of an automotive sensor interface. A good agreement is obtained from the lowest test frequency up to 1 GHz. Above this value, the measured results seem to be dominated by package effects

Harmonic Balance Surrogate-Based Immunity Modeling of a Nonlinear Analog Circuit

A novel harmonic balance surrogate-based technique to create fast and accurate behavioral models predicting, in the early design stage, the performance of nonlinear analog devices during immunity tests is presented. The obtained immunity model hides the real netlist, reduces the simulation time, and avoids expensive and time-consuming measurements after tape-out, while still providing high accuracy. The model can easily be integrated into a circuit simulator together with additional subcircuits, e.g., board and package models, as such allowing to efficiently reproduce complete immunity test setups during the early design stage and without disclosing any intellectual property. The novel method is validated by means of application to an industrial case study, being an automotive voltage regulator, clearly showing the technique's capabilities and practical advantages

Design of IEC 62132-4 Compliant DPI Test Boards that Work up to 20 GHz

DPI (Direct Power Injection) testing according to IEC 62132-4 has been widely adopted as an effective test method for IC-level pin-selective RF immunity testing. To enable DPI testing of an IC, a dedicated test board needs to be designed that basically makes up the whole EMC test set-up. Boards that are designed in accordance with IEC 62132-4, should work well up to 1 GHz. However, various anomalies can occur if no proper care is taken of all possible RF phenomena. This paper explains our design approach to effectively deal with these issues and at the same time even extend the useful frequency range up to 2 GHz. Specific guidelines to achieve this objective are given.status: publishe

Case Study on the Differences between EMI Resilience of Analog ICs against Continuous Wave, Modulated and Transient Disturbances

© 2015 IEEE. Transient disturbance signals are getting more and more attention lately (e.g. in the automotive industry). Electromagnetic compatibility (EMC) at IC level so far focused on continuous wave (CW) disturbances and how to deal with them, but transient phenomena were not thoroughly studied yet. In this exploratory paper, we perform a case study (based on a basic current mirror) in order to reveal the effects of transient disturbances (as compared to CW ones) and to determine what IC design techniques could be used to deal with them.status: publishe

Modeling transient electrical disturbances by inductive coupling for the ISO 7637-3 ICC test

In this paper, we model the inductive current clamp (ICC) method described in the ISO 7637-3 standard, where we apply a broadband transient signal as disturbance. To validate the advocated model, a nonlinear device under test (DUT) is simulated, manufactured and measured under the ISO 7637-3 standard test conditions. Furthermore, it is shown that the proposed model can be used to study the DUT's immunity

Machine learning based error detection in transient susceptibility tests

Compliance to electromagnetic compatibility (EMC) standards is a fundamental requirement for modern integrated circuits (ICs). In this framework, error detection in transient susceptibility tests is of crucial importance to assess the circuit robustness. However, performing such tests is expensive and requires an ad hoc hardware, whose configuration must be adapted for the different test setups, i.e., the transient waveforms, defined in the EMC standards. This paper describes a novel machine learning based approach for error detection, which only requires the raw output data from a susceptibility test: neither additional information about the architecture of the device under test nor the test configuration is needed. We applied and evaluated anomaly detection techniques (a branch of machine learning methods focused on error detection) for transient susceptibility tests with two pertinent examples (one simulation- and one measurement-based). The proposed techniques detected errors successfully in both unsupervised and supervised scenarios. Moreover, these can give insight on the output behaviors that are more likely to cause errors during the test. As shown by our results, an anomaly detection-based approach is an applicable and viable solution for automatic error detection in transient susceptibility tests