1,542 research outputs found
Comparison of multilevel PWM versus interleaved based sinewave shaping for two-stage current source inverters used in PV applications
This paper investigates the advantages of using interleaved based direct sinusoidal current shaping techniques as alternative to 5-level Pulse Width Modulation (PWM) when used in conjunction to a two stage Current Source Inverter (CSI) in PV applications. By using simulation based modelling it is proven that; in combination with switching harmonic cancellation techniques; for a given output power, direct shaping allows for better utilization of devices and subsequently the minimization of losses without sacrificing power quality
A hybrid power converter with enhanced switching ripple cancellation
As worldwide electricity demand increases, so does the requirement for effective power conversion combining increased efficiency with minimal harmonic pollution at the lowest financial cost. For medium to high voltage grid-connected applications, multilevel converter topologies enabled the use of lower rated and more efficient self-commutated switches. Due to practical limitations, efficient operation of converters with a low number of levels is restricted to low switching frequencies which in turn becomes a limiting factor for the design of smaller passive filters that are required to limit the associated switching harmonics injected in the AC grid.
This thesis investigates the use of a novel hybrid converter concept aimed at medium-voltage (MV) grid-connected applications. Hybrid converters consist of a main inverter processing the bulk of the power with poor waveform performance and a fast and versatile auxiliary inverter to correct the distortion. In this case, the main converter is a medium-voltage three-level Neutral Point Clamped (NPC) inverter and the auxiliary inverter is a low-voltage and low-current rated Current Source Inverter (CSI), fitted with a series capacitor that is used to minimise the CSI voltage stress. As a result the added installed power by the auxiliary CSI switches can remain at very low levels (theoretically <4%), resulting in a minimal added cost, whilst offering a substantial harmonic improvement to the main VSI. Furthermore the auxiliary converter can be retro-fitted to an existing MV inverter installation to improve the current harmonic quality as required by new grid standards, at a minimal cost.
The performance of the proposed hybrid solution is evaluated through simulation at 3.3 kV MV level under various grid interconnection scenarios. The feasibility of the concept is validated experimentally, scaled to 415V grid voltage level (a more realistic level for a laboratory demonstrator) while operating under more challenging conditions such as switching ripple levels of 50% peak relative to the fundamental peak, showing that the added installed power can be as low as 7% with very high output grid current quality under all grid scenarios considered
A hybrid power converter with enhanced switching ripple cancellation
As worldwide electricity demand increases, so does the requirement for effective power conversion combining increased efficiency with minimal harmonic pollution at the lowest financial cost. For medium to high voltage grid-connected applications, multilevel converter topologies enabled the use of lower rated and more efficient self-commutated switches. Due to practical limitations, efficient operation of converters with a low number of levels is restricted to low switching frequencies which in turn becomes a limiting factor for the design of smaller passive filters that are required to limit the associated switching harmonics injected in the AC grid.
This thesis investigates the use of a novel hybrid converter concept aimed at medium-voltage (MV) grid-connected applications. Hybrid converters consist of a main inverter processing the bulk of the power with poor waveform performance and a fast and versatile auxiliary inverter to correct the distortion. In this case, the main converter is a medium-voltage three-level Neutral Point Clamped (NPC) inverter and the auxiliary inverter is a low-voltage and low-current rated Current Source Inverter (CSI), fitted with a series capacitor that is used to minimise the CSI voltage stress. As a result the added installed power by the auxiliary CSI switches can remain at very low levels (theoretically <4%), resulting in a minimal added cost, whilst offering a substantial harmonic improvement to the main VSI. Furthermore the auxiliary converter can be retro-fitted to an existing MV inverter installation to improve the current harmonic quality as required by new grid standards, at a minimal cost.
The performance of the proposed hybrid solution is evaluated through simulation at 3.3 kV MV level under various grid interconnection scenarios. The feasibility of the concept is validated experimentally, scaled to 415V grid voltage level (a more realistic level for a laboratory demonstrator) while operating under more challenging conditions such as switching ripple levels of 50% peak relative to the fundamental peak, showing that the added installed power can be as low as 7% with very high output grid current quality under all grid scenarios considered
A hybrid inverter solution for medium voltage applications using series capacitor and a CSI Active Power Filter (SC-APF)
This paper proposes a new hybrid inverter solution for medium/high voltage applications that consists of a slow switching inverter using high voltage or series connected switching devices, fitted with a low kVA rated auxiliary current source inverter to cancel the switching ripple produced by the main inverter. The reduction in CSI voltage stress is obtained by connecting it to the MV grid via a series capacitor which makes the solution suitable for retrofitting older inverters equipped with large passive filters. The paper describes the design procedure, the control scheme and validates the feasibility of the idea by including simulation results and evaluation of the waveform quality and also an estimation of the semiconductor losses
Experimental validation of a hybrid converter with enhanced switching ripple cancellation
This study presents the experimental evaluation of a proposed new three phase hybrid converter topology for medium voltage applications. The topology is based on the interconnection of a low switching frequency voltage source inverter (VSI), rated at medium voltage, with a high switching frequency low-power rated current source inverter (CSI). The main function of the shunt connected CSI is to cancel the large switching current ripple produced by the VSI while operating at a reduced fundamental voltage enabled by the use of series connected capacitors. The simulations and design procedure outline the possibility of achieving high output grid current quality whilst the added installed power by the CSI remains at <4% compared with the VSI. The experimental results show good correlation between analytical simulated targets of 20% maximum CSI voltage stress albeit with added installed power of 6.7% due to a larger amount of current ripple processed
A hybrid inverter system for medium voltage applications using a low voltage auxiliary CSI
Hybrid converters consist of a main inverter processing the bulk of the power with poor waveform performance and a fast and versatile auxiliary inverter to correct the distortion. In this paper, the main converter is a medium voltage NPC inverter and the auxiliary inverter is a low-voltage and low- current rated current source inverter (CSI), with series capacitor being used to minimize the CSI voltage stress. The result is a high output current quality which is obtained with a very low switching stress in the main converter and a very small added installed power (<4%) in the CSI. This paper expands this concept by investigating the hybridization of a medium voltage inverter with an existing LCL filter and investigates the additional challenges related to resonances and proposes a solution for stabile operation
Anti-symmetric mode excitation and seismic response of base-isolated bridges under asynchronous input motion
Reconstruction of a traumatic duodenal transection with a pedicled ileal loop: a case report
<p>Abstract</p> <p>Introduction</p> <p>Blunt duodenal injuries do not occur often. A patient with damage to the duodenal tissue around the pancreatic and common bile duct presents a challenge to surgeons. The choice of procedure must be tailored to the nature of the defect and the amount of tissue lost.</p> <p>Case presentation</p> <p>We describe the case of a 16-year-old Caucasian boy with a blunt duodenal injury after a motor vehicle accident. On admission, the patient had stable vital signs and a normal laboratory workup. Gradually his clinical condition deteriorated and a computed tomography scan showed a retroperitoneal haematoma at the level of his duodenum. A fully circumferential rupture of the second part of his duodenum was found during laparotomy, with the intact Vater's papilla lying adjacent to the defect and a superficial laceration of the head of his pancreas. The retroperitoneal haematoma was thoroughly drained and a pedicled ileal loop was interposed between the duodenal stumps to restore the continuity of the patient's duodenum. Apart from a mild postoperative pancreatitis, the patient's postoperative course evolved with no further problems. The patient was discharged on the 22<sup>nd </sup>postoperative day in excellent condition and has remained so to date (after five years).</p> <p>Conclusion</p> <p>In our case report, where the second part of the patient's duodenum was completely transected, our choices for reconstruction were limited. Important factors for the successful management of this patient were prompt surgical intervention and the accurate assessment of the nature of the duodenal and associated injuries. We believe that the technique we used was a reasonable choice because the anatomical continuity of the patient's duodenum was restored.</p
Mitigating the effect of series capacitance unbalance on the voltage reduction capability of an auxiliary CSI used as switching ripple active filter
The use of series connected capacitors for high voltage applications has been proven to be beneficial for voltage stress reduction across power semiconductors. In a 3-phase grid any asymmetry in the value of the series capacitance may lead to significant variations in the voltage seen across the low voltage converter. This paper investigates the effects of an unbalanced set of series connected capacitors used to reduce the voltage stress across a three phase current source inverter (CSI) used as an active power filter and proposes a method to minimize the impact of unbalance on CSI voltage ratings. It is shown that through a proposed solution which adjusts the level of inverse sequence current component in the series capacitors, the reduced CSI voltage stress can be maintained for large capacitor unbalance and validated by simulation and experimental results
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