Deterrence and Displacement in Auto Theft

Lojack is a stolen vehicle tracking technology that achieves extremely high recovery rates. Ayres and Levitt (1998) show that introduction of the system produced large reductions in vehicle thefts in areas where it was implemented in the United States. The reduced theft risk was shared by all vehicle owners, not only those who bought Lojack. This paper, in contrast, uses the introduction of Lojack to a publicly known set of Ford car models in some Mexican states to show that Lojack generates negative externalities if thieves can distinguish between Lojack and non-Lojack-equipped cars. The empirical analysis suggests that, although Lojack-equipped vehicles experienced a reduction in theft risk of 55%, most of the averted thefts were replaced by thefts of non-Lojack-equipped automobiles in neighboring states. The increase in thefts in non Lojack-serviced states was especially strong for the same car models that in Lojack-serviced states were sold equipped with Lojack.

Normalizing or not normalizing? An open question for floating-point arithmetic in embedded systems

Emerging embedded applications lack of a specific standard when they require floating-point arithmetic. In this situation they use the IEEE-754 standard or ad hoc variations of it. However, this standard was not designed for this purpose. This paper aims to open a debate to define a new extension of the standard to cover embedded applications. In this work, we only focus on the impact of not performing normalization. We show how eliminating the condition of normalized numbers, implementation costs can be dramatically reduced, at the expense of a moderate loss of accuracy. Several architectures to implement addition and multiplication for non-normalized numbers are proposed and analyzed. We show that a combined architecture (adder-multiplier) can halve the area and power consumption of its counterpart IEEE-754 architecture. This saving comes at the cost of reducing an average of about 10 dBs the Signal-to-Noise Ratio for the tested algorithms. We think these results should encourage researchers to perform further investigation in this issue.Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech

Compressed Text Indexes:From Theory to Practice!

A compressed full-text self-index represents a text in a compressed form and still answers queries efficiently. This technology represents a breakthrough over the text indexing techniques of the previous decade, whose indexes required several times the size of the text. Although it is relatively new, this technology has matured up to a point where theoretical research is giving way to practical developments. Nonetheless this requires significant programming skills, a deep engineering effort, and a strong algorithmic background to dig into the research results. To date only isolated implementations and focused comparisons of compressed indexes have been reported, and they missed a common API, which prevented their re-use or deployment within other applications. The goal of this paper is to fill this gap. First, we present the existing implementations of compressed indexes from a practitioner's point of view. Second, we introduce the Pizza&Chili site, which offers tuned implementations and a standardized API for the most successful compressed full-text self-indexes, together with effective testbeds and scripts for their automatic validation and test. Third, we show the results of our extensive experiments on these codes with the aim of demonstrating the practical relevance of this novel and exciting technology

The demand for urban transport: An application of discrete choice model for Cadiz

The study of the demand for transport has among others applications, the valuation of travel time saving that is a very important question in cost-benefit analysis, and to adopt transport policy tools. Since McFadden developed a discrete choice model for travel demand, it has usually been the application of this model to study the individual behaviour when he has to choice among transport modes. Citizens of big cities have to face traffic congestion; pollution, wasted time in travels and fuel, noise, stress and accidents are the costs imposed by congestion to society, elements that reduce the quality of life in cities. Public transport is a real alternative to private transport that is socially less expensive, for this reason this paper tries to forecast travel demand for public transport in Cadiz when travelling have to choice between public or private transport, using a discrete choice model. The results of this analysis (travel demand, value of time, elasticities) can be used to design transport policies that could reduce congestion.

Unbiased Rounding for HUB Floating-point Addition

Copyright (c) 2018 IEEE doi:10.1109/TC.2018.2807429Half-Unit-Biased (HUB) is an emerging format based on shifting the represented numbers by half Unit in the Last Place. This format simplifies two’s complement and roundto- nearest operations by preventing any carry propagation. This saves power consumption, time and area. Taking into account that the IEEE floating-point standard uses an unbiased rounding as the default mode, this feature is also desirable for HUB approaches. In this paper, we study the unbiased rounding for HUB floating-point addition in both as standalone operation and within FMA. We show two different alternatives to eliminate the bias when rounding the sum results, either partially or totally. We also present an error analysis and the implementation results of the proposed architectures to help the designers to decide what their best option are.TIN2013-42253-P, TIN2016-80920-R, JA2012P12-TIC-169

Fast HUB Floating-point Adder for FPGA

Several previous publications have shown the area and delay reduction when implementing real number computation using HUB formats for both floating-point and fixed-point. In this paper, we present a HUB floating-point adder for FPGA which greatly improves the speed of previous proposed HUB designs for these devices. Our architecture is based on the double path technique which reduces the execution time since each path works in parallel. We also deal with the implementation of unbiased rounding in the proposed adder. Experimental results are presented showing the goodness of the new HUB adder for FPGA.TIN2016- 80920-R, JA2012 P12-TIC-1692, JA2012 P12-TIC-147

La repoblació del conill de bosc incrementa la sarna

Les malalties víriques, la caça intensiva i les noves pràctiques agrícoles han comportat que el conill de bosc de la Península Ibèrica sigui una espècie "gairebé amenaçada". Però, segons un estudi d'investigadors del Departament de Medicina i Cirurgia Animal de la UAB, la repoblació de conills que es duu a terme a molts llocs de la Península introdueix noves malalties en les poblacions receptores, com la sarna sarcòptica que perfora l'epidermis de més de cent espècies de mamífers, inclòs l'home. A la vista d'aquests resultats, els investigadors recomanen un estricte control sanitari dels conills alliberats.Las enfermedades víricas, la caza intensiva y las nuevas prácticas agrícolas han supuesto que el conejo de monte de la Península Ibérica sea una especie "casi amenazada". Pero, según un estudio de investigadores del Departamento de Medicina y Cirugía Animal de la UAB, la repoblación de conejos que se lleva a cabo en muchos lugares de la Península introduce nuevas enfermedades en las poblaciones receptoras, como la sarna sarcóptica que perfora la epidermis de más de cien especies de mamíferos, incluído el hombre. A la vista de estos resultados, los investigadores recomiendan un estricto control sanitario de los conejos liberados

Simulating an automation plan in a 3D Printing manufacturing factory

Additive manufacturing technologies are growing in interest and it is clear that in a short time they have improve enormously. From being a lab technology for fast and small prototyping to enabling stable manufacturing of high-volume products. Every year, more manufacturers choose to adopt 3D printing technologies to produce end-user parts and sell them to compete with other more traditional methods. In this context, this thesis shows the path of using the HP MJF 5200 3D printing technology to scale up a 3D printing manufacturing plant and optimizing to achieve the highest profitability possible. To do so, a twin model and a cost model are built to allow fast and precise simulation and economic analysis of each scenario that the manufacturer would like to improve, providing production KPI’s and seeing the results before building and buying new equipment. The twin model will be validated with theoretical calculations to make sure it is accurate and it works as expected and all the simulation results will be presented and explained. At the end, when the plant is optimized using existing HP solutions, an automation plan will be defined to select the best automation projects in order to further increase the productivity and profitably of the factor

Towards a Software Transactional Memory for heterogeneous CPU-GPU processors

The heterogeneous Accelerated Processing Units (APUs) integrate a multi-core CPU and a GPU within the same chip. Modern APUs provide the programmer with platform atomics, used to communicate the CPU cores with the GPU using simple atomic datatypes. However, ensuring consistency for complex data types is a task delegated to programmers, who have to implement a mutual exclusion mechanism. Transactional Memory (TM) is an optimistic approach to implement mutual exclusion. With TM, shared data can be accessed by multiple computing threads speculatively, but changes are only visible if a transaction ends with no conflict with others in its memory accesses. TM has been studied and implemented in software and hardware for both CPU and GPU platforms, but an integrated solution has not been provided for APU processors. In this paper we present APUTM, a software TM designed to work on heterogeneous APU processors. The design of APUTM focuses on minimizing the access to shared metadata in order to reduce the communication overhead via expensive platform atomics. The main objective of APUTM is to help us understand the tradeoffs of implementing a sofware TM on an heterogeneous CPU-GPU platform and to identify the key aspects to be considered in each device. In our experiments, we compare the adaptability of APUTM to execute in one of the devices (CPU or GPU) or in both of them simultaneously. These experiments show that APUTM is able to outperform sequential execution of the applications.This work has been supported by projects TIN2013-42253-P and TIN2016-80920-R, from the Spanish Government, P11-TIC8144 and P12- TIC1470, from Junta de Andalucía, and Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech