Scalable data concentrator with baseline interconnection network for triggerless data acquisition systems

Triggerless Data Acquisition Systems (DAQs) require transmitting the data stream from multiple links to the processing node. The short input data words must be concentrated and packed into the longer bit vectors the output interface (e.g. PCI Express) uses. In that process, the unneeded data must be eliminated, and a dense stream of useful DAQ data must be created. Additionally, the time order of the data should be preserved. This paper presents a new solution using the Baseline Network with Reversed Outputs (BNRO)for high-speed data routing. A thorough analysis of the network operation enabled increased scalability compared to the previously published concentrator based on 8x8 network. The presented solution may be scaled by adding additional layers to the BNRO network while minimizing resource consumption. Simulations were done for 4 and 5 layers (16 and 32 inputs). The FPGA synthesis has been performed for 16 inputs. The pipeline registers may be added in each network independently, shortening the critical path and increasing the maximum acceptable clock frequency

Fixed-latency system for high-speed serial transmission between FPGA devices with Forward Error Correction

This paper presents the design of a compact pro-tocol for fixed-latency, high-speed, reliable, serial transmissionbetween simple field-programmable gate arrays (FPGA) devices.Implementation of the project aims to delineate word boundaries,provide randomness to the electromagnetic interference (EMI)generated by the electrical transitions, allow for clock recov-ery and maintain direct current (DC) balance. An orthogonalconcatenated coding scheme is used for correcting transmissionerrors using modified Bose–Chaudhuri–Hocquenghem (BCH)code capable of correcting all single bit errors and most ofthe double-adjacent errors. As a result all burst errors of alength up to 31 bits, and some of the longer group errors,are corrected within 256 bits long packet. The efficiency of theproposed solution equals 46.48%, as 119 out of 256 bits arefully available to the user. The design has been implementedand tested on Xilinx Kintex UltraScale+ KCU116 Evaluation Kitwith a data rate of 28.2 Gbps. Sample latency analysis has alsobeen performed so that user could easily carry out calculationsfor different transmission speed. The main advancement of thework is the use of modified BCH(15, 11) code that leads to higherror correction capabilities for burst errors and user friendlypacket length

Feasibility of FPGA to HPC computation migration of plasma impurities diagnostic algorithms

We present a feasibility study of fast events parameters estimation algorithms regarding their execution time. It is the first stage of procedure used on data gathered from gas electron multiplier (GEM) detector for diagnostic of plasma impurities. Measured execution times are estimates of achievable times for future and more complex algorithms. The work covers usage of Intel Xeon and Intel Xeon Phi - high-performance computing (HPC) devices as a possible replacement for FPGA with highlighted advantages and disadvantages. Results show that less than 10 ms feedback loop can be obtained with the usage of 25% hardware resources in Intel Xeon or 10% resources in Intel Xeon Phi which leaves space for future increase of algorithms complexity. Moreover, this work contains a simplified overview of basic problems in actual measurement systems for diagnostic of plasma impurities, and emerging trends in developed solutions

SMX and front-end board tester for CBM readout chain

The STS-MUCH-XYTER (SMX) chip is a front-end ASIC dedicated to the readout of Silicon Tracking System (STS) and Muon Chamber (MUCH) detectors in the Compressed Baryonic Matter (CBM) experiment. The production of the ASIC and the front-end boards based on it is just being started and requires thorough testing to assure quality. The paper describes the SMX tester based on a standard commercial Artix-7 FPGA module with an additional simple baseboard. In the standalone configuration, the tester is controlled via IPbus and enables full functional testing of connected SMX, front-end board (FEB), or a full detector module. The software written in Python may easily be integrated with higher-level testing software

Measurement capabilities upgrade of GEM soft X-ray measurement system for hot plasma diagnostics

The paper presents improvements of the developed system for hot plasma radiation measurement in the soft X-ray range based on a Gas Electron Multiplier (GEM) detector. Scope of work consists of a new solution for handling hardware time-synchronization with tokamak systems needed for better synchronization with other diagnostics and measurement quality. The paper describes the support of new modes of triggering on PC-side. There are communication and data path overview in the system. The new API is described, which provide separate channels for data and control and is more robust than the earlier solution. Work concentrates on stability and usability improvements of the implemented device providing better usage for end-user

WPROWADZENIE DO ZAGADNIENIA TOMOGRAFII W ALGORYTMACH POSTPROCESSINGU DLA REAKTORÓW TYPU TOKAMAK

The collaboration of authors led to implementing advanced and fast systems for diagnostics of plasma content in tokamaks. During the development of systems it is planned to add new functionalities, in particular, the algorithms of tomographic reconstruction to obtain  information on three dimensional distribution of plasma impurities. In the article the idea of tomographic reconstruction is introduced and issues of performance and adequate hardware selection are presented.Wieloletnia współpraca autorów przyczyniła się do powstania zaawansowanych, szybkich mechanizmów diagnostyki składu gorącej plazmy tokamakowej. W ramach rozbudowy systemów zamierza wprowadzić się szereg nowych funkcjonalności, w tym algorytmy rekonstrukcji tomograficznej. Pozwoli to na uzyskanie informacji o przestrzennym rozkładzie nieczystości plazmy w reaktorze. Praca przedstawia koncepcję tomografii tego typu oraz przeprowadzona jest dyskusja nad zagadnieniami wydajności i doboru sprzętu

Przezczaszkowa ultrasonografia dopplerowska (TCD) u chorych z poszerzonym układem komorowym : poszukiwanie dodatkowych wskaźników kwalifikacji do zabiegu implantacji układu zastawkowego

Background: Ventriculomegaly without increased intracranial pressure is observed both in normal-pressure hydrocephalus (NPH) and idiopathic cerebral atrophy (CA). Investigating additional parameters to differentiate these diseases is important for a good qualification of shunt implantation. The study presents the influence of intravenous administration of acetazolamide on cerebral blood flow velocity (BFV) and cerebrovascular reactivity (CVR) in 23 patients with ventriculomegaly and symptoms of cognitive function disorders. The aim was to establish the differences in the dynamic cerebral hemodynamics parameters in NPH and CA patients. Material/Methods: Measurement of BFV was performed in 23 patients using transcranial Doppler (TCD) ultrasonography before and 20 minutes after intravenous administration of 1000 mg acetazolamide. CVR was calculated as the percent change from the baseline mean BFV value and assessed bilaterally in the middle (MCA), anterior (ACA), posterior (PCA), and internal carotid cerebral (ICA) arteries in the intracranial part. Additionally, BFV was evaluated in selected patients during a lumbar infusion test. The patients were divided into 2 groups: those with NPH and those with CA. Results: BFV values were decreased both in the NPH and the CA group compared with the control group (healthy volunteers of the same age). There were no significant differences between the two groups. In the CA group a complete lack of CVR was observed in all examined arteries. In the NPH group, CVR was maintained, while mean BFV (MFV) changed 37±4% in the MCA, 26±6% in the ACA, 33±5% in the PCA, and 30±4% in the ICA. There were statistically significant differences in CVR values between the groups. A decrease in initial BFV in all examined intracranial arteries and a complete lack of CVR is characteristic of the CA group. Conclusions: Maintenance of CVR and a simultaneous decrease in BFV is a characteristic of the NPH group, but among the patients in that group we found differences in cerebrovascular response to acetozolamide, In both groups there were no significant differences in BFV in the MCA during the lumbar infusion test. The acetazolamide test appears as an additional factor in the differential diagnosis of NPH and CA

Synchronization methods for the PAC RPC trigger system in the CMS experiment

The PAC (pattern comparator) is a dedicated muon trigger for the CMS (Compact Muon Solenoid) experiment at the LHC (Large Hadron Collider). The PAC trigger processes signals provided by RPC (resistive plate chambers), a part of the CMS muon system. The goal of the PAC RPC trigger is to identify muons, measure their transverse momenta and select the best muon candidates for each proton bunch collision occurring every 25 ns. To perform this task it is necessary to deliver the information concerning each bunch crossing from many RPC chambers to the trigger logic at the same moment. Since the CMS detector is large (the muon hits are spread over 40 ns), and the data are transmitted through thousands of channels, special techniques are needed to assure proper synchronization of the data. In this paper methods developed for the RPC signal synchronization and synchronous transmission are presented. The methods were tested during the MTCC (magnet test and cosmic challenge). The performance of the synchronization methods is illustrated by the results of the tests