270 research outputs found

    High-performance arithmetic coding VLSI macro for the H264 video compression standard

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    Run-time resource management in fault-tolerant network on reconfigurable chips

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    Backward adaptive pixel-based fast predictive motion estimation

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    A toolset for the analysis and optimization of motion estimation algorithms and processors

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    Evaluating dynamic partial reconfiguration in the integer pipeline of a FPGA-based opensource processor

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    Statistical lossless compression of space imagery and general data in a reconfigurable architecture

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    A biophysically accurate floating point somatic neuroprocessor

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    Power/area analysis of a FPGA-based open-source processor using partial dynamic reconfiguration

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