On Temperature Dependency of Steep Subthreshold Slope in Dual-Independent-Gate FinFET

Dual-independent-gate silicon FinFET has demonstrated a steep subthreshold slope (SS) when a positive feedback induced by weak impact ionization is triggered. In this paper, we study the temperature dependency of the steep SS by characterizing the fabricated device from 100 to 380 K. The measured characteristics of SS show a reduced sensitivity to temperature as compared to conventional MOSFETs. Based on the temperature-dependent characterization, we further analyze the steep-SS characteristics and propose feasible improvements for optimizing the device performance

Reconfigurable Si Nanowire Nonvolatile Transistors

Reconfigurable transistors merge unipolar p- and n-type characteristics of field-effect transistors into a single programmable device. Combinational circuits have shown benefits in area and power consumption by fine-grain reconfiguration of complete logic blocks at runtime. To complement this volatile programming technology, a proof of concept for individually addressable reconfigurable nonvolatile transistors is presented. A charge-trapping stack is incorporated, and four distinct and stable states in a single device are demonstrated

Impact of radiotherapy and sequencing of systemic therapy on survival outcomes in melanoma patients with previously untreated brain metastasis: a multicenter DeCOG study on 450 patients from the prospective skin cancer registry ADOREG

BACKGROUND: Despite of various therapeutic strategies, treatment of patients with melanoma brain metastasis (MBM) still is a major challenge. This study aimed at investigating the impact of type and sequence of immune checkpoint blockade (ICB) and targeted therapy (TT), radiotherapy, and surgery on the survival outcome of patients with MBM. METHOD: We assessed data of 450 patients collected within the prospective multicenter real-world skin cancer registry ADOREG who were diagnosed with MBM before start of the first non-adjuvant systemic therapy. Study endpoints were progression-free survival (PFS) and overall survival (OS). RESULTS: Of 450 MBM patients, 175 (38.9%) received CTLA-4+PD-1 ICB, 161 (35.8%) PD-1 ICB, and 114 (25.3%) BRAF+MEK TT as first-line treatment. Additional to systemic therapy, 67.3% of the patients received radiotherapy (stereotactic radiosurgery (SRS); conventional radiotherapy (CRT)) and 24.4% had surgery of MBM. 199 patients (42.2%) received a second-line systemic therapy. Multivariate Cox regression analysis revealed the application of radiotherapy (HR for SRS: 0.213, 95% CI 0.094 to 0.485, p1 cm: 1.977, 95% CI 1.117 to 3.500, p=0.019), age (HR for age >65 years: 1.802, 95% CI 1.016 to 3.197, p=0.044), and ECOG performance status (HR for ECOG ≥2: HR: 2.615, 95% CI 1.024 to 6.676, p=0.044) as independent prognostic factors of OS on first-line therapy. The type of first-line therapy (ICB vs TT) was not independently prognostic. As second-line therapy BRAF+MEK showed the best survival outcome compared with ICB and other therapies (HR for CTLA-4+PD-1 compared with BRAF+MEK: 13.964, 95% CI 3.6 to 54.4, p<0.001; for PD-1 vs BRAF+MEK: 4.587 95% CI 1.3 to 16.8, p=0.022 for OS). Regarding therapy sequencing, patients treated with ICB as first-line therapy and BRAF+MEK as second-line therapy showed an improved OS (HR for CTLA-4+PD-1 followed by BRAF+MEK: 0.370, 95% CI 0.157 to 0.934, p=0.035; HR for PD-1 followed by BRAF+MEK: 0.290, 95% CI 0.092 to 0.918, p=0.035) compared with patients starting with BRAF+MEK in first-line therapy. There was no significant survival difference when comparing first-line therapy with CTLA-4+PD-1 ICB with PD-1 ICB. CONCLUSIONS: In patients with MBM, the addition of radiotherapy resulted in a favorable OS on systemic therapy. In BRAF-mutated MBM patients, ICB as first-line therapy and BRAF+MEK as second-line therapy were associated with a significantly prolonged OS

Brain metastasis and survival outcomes after first-line therapy in metastatic melanoma: a multicenter DeCOG study on 1704 patients from the prospective skin cancer registry ADOREG

Background Despite the availability of effective systemic therapies, a significant number of advanced melanoma patients develops brain metastases. This study investigated differences in incidence and time to diagnosis of brain metastasis and survival outcomes dependent on the type of first-line therapy.Methods Patients with metastatic, non-resectable melanoma (AJCCv8 stage IIIC–V) without brain metastasis at start of first-line therapy (1L-therapy) were identified from the prospective multicenter real-world skin cancer registry ADOREG. Study endpoints were incidence of brain metastasis, brain metastasis-free survival (BMFS), progression-free survival (PFS), and overall survival (OS).Results Of 1704 patients, 916 were BRAF wild-type (BRAFwt) and 788 were BRAF V600 mutant (BRAFmut). Median follow-up time after start of 1L-therapy was 40.4 months. BRAFwt patients received 1L-therapy with immune checkpoint inhibitors (ICI) against CTLA-4+PD-1 (n=281) or PD-1 (n=544). In BRAFmut patients, 1L-therapy was ICI in 415 patients (CTLA-4+PD-1, n=108; PD-1, n=264), and BRAF+MEK targeted therapy (TT) in 373 patients. After 24 months, 1L-therapy with BRAF+MEK resulted in a higher incidence of brain metastasis compared with PD-1±CTLA-4 (BRAF+MEK, 30.3%; CTLA-4+PD-1, 22.2%; PD-1, 14.0%). In multivariate analysis, BRAFmut patients developed brain metastases earlier on 1L-therapy with BRAF+MEK than with PD-1±CTLA-4 (CTLA-4+PD-1: HR 0.560, 95% CI 0.332 to 0.945, p=0.030; PD-1: HR 0.575, 95% CI 0.372 to 0.888, p=0.013). Type of 1L-therapy, tumor stage, and age were independent prognostic factors for BMFS in BRAFmut patients. In BRAFwt patients, tumor stage was independently associated with longer BMFS; ECOG Performance status (ECOG-PS), lactate dehydrogenase (LDH), and tumor stage with OS. CTLA-4+PD-1 did not result in better BMFS, PFS, or OS than PD-1 in BRAFwt patients. For BRAFmut patients, multivariate Cox regression revealed ECOG-PS, type of 1L-therapy, tumor stage, and LDH as independent prognostic factors for PFS and OS. 1L-therapy with CTLA-4+PD-1 led to longer OS than PD-1 (HR 1.97, 95% CI 1.122 to 3.455, p=0.018) or BRAF+MEK (HR 2.41, 95% CI 1.432 to 4.054, p=0.001), without PD-1 being superior to BRAF+MEK.Conclusions In BRAFmut patients 1L-therapy with PD-1±CTLA-4 ICI resulted in a delayed and less frequent development of brain metastasis compared with BRAF+MEK TT. 1L-therapy with CTLA-4+PD-1 showed superior OS compared with PD-1 and BRAF+MEK. In BRAFwt patients, no differences in brain metastasis and survival outcomes were detected for CTLA-4+PD-1 compared with PD-1

Eliminating Charge Sharing in Clocked Logic Gates on the Device Level Employing Transistors with Multiple Independent Inputs

Charge sharing poses a fundamental problem in the design of dynamic logic gates, which is nearly as old as digital circuit design itself. Although, many solutions are known, up to now most of them add additional complexity to a given system and require careful optimization of device sizes. Here we propose a simple CMOS-technology compatible transistor level solution to the charge sharing problem, employing a new class of field effect transistors with multiple independent gates (MIGFETs). Based on mixed-mode simulations in a coordinated device-circuit co-design framework, we show that their underlying device physics provides an inherent suppression of the charge sharing effect. Exemplary circuit layouts as well as discussion on the switching performance are given

Spaceborne Lightcraft Applications – an Experimental Approach

An experimental approach is proposed for the near-term demonstration of space-borne laser propulsion. A feasibility study at the ZARM Drop Tower Bremen is planned. The facility provides microgravity conditions within a drop capsule for ~ 9 seconds. An excimer laser is used for energy beaming operating at a wavelength of 248 nm with max. 500 mJ pulse energy and a repetition rate of 250 Hz. Within the drop capsule, free flights of a lightcraft are intended to be conducted in air as well as under vacuum conditions. Different propellants are reviewed regarding their features for propulsion with a UV laser. The scalability of previous ground-based flight experiments is discussed with respect to microgravity conditions and moderate pulse energies. Space logistic and sample return missions are discussed as possible applications

Off-state Impact on FDSOI Ring Oscillator Degradation under High Voltage Stress

The degradation predicted by classical DC reliability methods, such as bias temperature instability (BTI) and hot carrier injection (HCI), might not translate sufficiently to the AC conditions, which are relevant on the circuit level. The direct analysis of circuit level reliability is therefore an essential task for hardware qualification in the near future. Ring oscillators (RO) offer a good model system, where both BTI and HCI contribute to the degradation. In this work, it is qualitatively shown that the additional off-state stress plays a crucial role at very high stress voltages, beyond upper usage boundaries. To yield an accurate RO lifetime prediction a frequency measurement setup with high resolution is used, which can resolve small changes in frequency during stress near operation conditions. An ACDC conversion model is developed predicting the resulting frequency change based on DC input data. From the extrapolation to 10 years of circuit lifetime the model predicts a very low frequency degradation below 0.2% under nominal operation conditions, where the off-state has a minor influence

A Physical Synthesis Flow for Early Technology Evaluation of Silicon Nanowire based Reconfigurable FETs

Silicon Nanowire (SiNW) based reconfigurable fieldeffect transistors (RFETs) provide an additional gate terminal called the program gate which gives the freedom of programming p-type or n-type functionality for the same device at runtime. This enables the circuit designers to pack more functionality per computational unit. This saves processing costs as only one device type is required, and no doping and associated lithography steps are needed for this technology. In this paper, we present a complete design flow including both logic and physical synthesis for circuits based on SiNW RFETs. We propose layouts of logic gates, Liberty and LEF (Library Exchange Format) files to enable further research in the domain of these novel, functionally enhanced transistors. We show that in the first of its kind comparison, for these fully symmetrical reconfigurable transistors, the area after placement and routing for SiNW based circuits is 17% more than that of CMOS for MCNC benchmarks. Further, we discuss areas of improvement for obtaining better area results from the SiNW based RFETs from a fabrication and technology point of view. The future use of self-aligned techniques to structure two independent gates within a smaller pitch holds the promise of substantial area reduction

Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors

An early evaluation in terms of circuit design is essential in order to assess the feasibility and practicability aspects for emerging nanotechnologies. Reconfigurable nanotechnologies, such as silicon or germanium nanowire-based reconfigurable field-effect transistors, hold great promise as suitable primitives for enabling multiple functionalities per computational unit. However, contemporary CMOS circuit designs when applied directly with this emerging nanotechnology often result in suboptimal designs. For example, 31% and 71% larger area was obtained for our two exemplary designs. Hence, new approaches delivering tailored circuit designs are needed to truly tap the exciting feature set of these reconfigurable nanotechnologies. To this effect, we propose six functionally enhanced logic gates based on a reconfigurable nanowire technology and employ these logic gates in efficient circuit designs. We carry out a detailed comparative study for a reconfigurable multifunctional circuit, which shows better normalized circuit delay (20.14%), area (32.40%), and activity as the power metric (40%) while exhibiting similar functionality as compared with the CMOS reference design. We further propose a novel design for a 1-bit arithmetic logic unit-based on silicon nanowire reconfigurable FETs with the area, normalized circuit delay, and activity gains of 30%, 34%, and 36%, respectively, as compared with the contemporary CMOS version

Analysis of Energy-Delay-Product for a 3D Vertical Nanowire FET Technology for Logic Applications

This document proposes a simplified analysis of the energy-delay-product (EDP) for a junction-less 3D vertical gate-all-around nanowire FET technology, with a physical channel length of 14nm, in comparison with the EDP of a baseline 7nm FinFET technology