Hierarchical strategies for efficient fault recovery on the reconfigurable PAnDA device

A novel hierarchical fault-tolerance methodology for reconfigurable devices is presented. A bespoke multi-reconfigurable FPGA architecture, the programmable analogue and digital array (PAnDA), is introduced allowing fine-grained reconfiguration beyond any other FPGA architecture currently in existence. Fault blind circuit repair strategies, which require no specific information of the nature or location of faults, are developed, exploiting architectural features of PAnDA. Two fault recovery techniques, stochastic and deterministic strategies, are proposed and results of each, as well as a comparison of the two, are presented. Both approaches are based on creating algorithms performing fine-grained hierarchical partial reconfiguration on faulty circuits in order to repair them. While the stochastic approach provides insights into feasibility of the method, the deterministic approach aims to generate optimal repair strategies for generic faults induced into a specific circuit. It is shown that both techniques successfully repair the benchmark circuits used after random faults are induced in random circuit locations, and the deterministic strategies are shown to operate efficiently and effectively after optimisation for a specific use case. The methods are shown to be generally applicable to any circuit on PAnDA, and to be straightforwardly customisable for any FPGA fabric providing some regularity and symmetry in its structure

Open-ended evolution to discover analogue circuits for beyond conventional applications

This is the author's accepted manuscript. The final publication is available at Springer via http://dx.doi.org/10.1007/s10710-012-9163-8. Copyright @ Springer 2012.Analogue circuits synthesised by means of open-ended evolutionary algorithms often have unconventional designs. However, these circuits are typically highly compact, and the general nature of the evolutionary search methodology allows such designs to be used in many applications. Previous work on the evolutionary design of analogue circuits has focused on circuits that lie well within analogue application domain. In contrast, our paper considers the evolution of analogue circuits that are usually synthesised in digital logic. We have developed four computational circuits, two voltage distributor circuits and a time interval metre circuit. The approach, despite its simplicity, succeeds over the design tasks owing to the employment of substructure reuse and incremental evolution. Our findings expand the range of applications that are considered suitable for evolutionary electronics

Multi-objective Optimisation of Digital Circuits based on Cell Mapping in an Industrial EDA Flow

Modern electronic design automation (EDA) tools can handle the complexity of state-of-the-art electronic systems by decomposing them into smaller blocks or cells, introducing different levels of abstraction and staged design flows. However, throughout each independent-optimised design step, overhead and inefficiency can accumulate in the resulting overall design. Performing design-specific optimisation from a more global viewpoint requires more time due to the larger search space, but has the potential to provide solutions with improved performance. In this work, a fully-automated, multi-objective (MO) EDA flow is introduced to address this issue. It specifically tunes drive strength mapping, preceding physical implementation, through multi-objective population-based search algorithms. Designs are evaluated with respect to their power, performance and area (PPA). The proposed approach is aimed at digital circuit optimisation at the block-level, where it is capable of expanding the design space and offers a set of trade-off solutions for different case-specific utilisation. We have applied the proposed MOEDA framework to ISCAS-85 and EPFL benchmark circuits using a commercial 65nm standard cell library. The experimental results demonstrate how the MOEDA flow enhances the solutions initially generated by the standard digital flow, and how simultaneously a significant improvement in PPA metrics is achieved

A Crystal Structure of the Bifunctional Antibiotic Simocyclinone D8, Bound to DNA Gyrase

Simocyclinones are bifunctional antibiotics that inhibit bacterial DNA gyrase by preventing DNA binding to the enzyme. We report the crystal structure of the complex formed between the N-terminal domain of the Escherichia coli gyrase A subunit and simocyclinone D8, revealing two binding pockets that separately accommodate the aminocoumarin and polyketide moieties of the antibiotic. These are close to, but distinct from, the quinolone-binding site, consistent with our observations that several mutations in this region confer resistance to both agents. Biochemical studies show that the individual moieties of simocyclinone D8 are comparatively weak inhibitors of gyrase relative to the parent compound, but their combination generates a more potent inhibitor. Our results should facilitate the design of drug molecules that target these unexploited binding pockets

Artificial Neural Microcircuits for use in Neuromorphic System Design

Artificial Neural Networks (ANNs) are one of the most widely employed forms of biomorphic computation. However (unlike the biological nervous systems they draw inspiration from) the current trend is for ANNs to be structurally homogeneous. Furthermore, this structural homogeneity requires the application of complex training & learning tools that produce application specific ANNs, susceptible to pitfalls like overfitting. In this paper, an alternative approach is suggested, inspired by the role played in biology by Neural Microcircuits, the so called “fundamental processing elements” of organic nervous systems. How large neural networks can be assembled using Artificial Neural Microcircuits, intended as off-the-shelf components, is articulated; before showing the results of initial work to produce a catalogue of such Microcircuits though the use of Novelty Search