Influence of the spatial distribution of border traps in the capacitance frequency dispersion of Al2O3/InGaAs

In this paper, the capacitance frequency dispersion in strong accumulation of capacitance voltage curves has been studied for different high-k dielectric layers in MOS stacks. By studying experimental data at low (77 K) and room temperature (300 K), in oxides with different density of defects, it was possible reflect the spatial distribution of the defects in the capacitance frequency dispersion. The experimental data show that while at room temperature, the capacitance dispersion is dominated by the exchange of carriers from the semiconductor into oxide traps far away from the interface, at low temperature the oxide traps near the Al2O3/InGaAs interface are responsible for the frequency dispersion. The results indicate that the capacitance dispersion in strong accumulation reflect the spatial distribution of traps within the oxide, and that dielectric/semiconductor conduction band offset is a critical parameter for determining the capacitance dispersion for Al2O3/InGaAs based gate stacks.Fil: Palumbo, Félix Roberto Mario. Comisión Nacional de Energía Atómica; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional; ArgentinaFil: Aguirre, Fernando Leonel. Universidad Tecnológica Nacional; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Comisión Nacional de Energía Atómica; ArgentinaFil: Pazos, Sebastián Matías. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional; Argentina. Comisión Nacional de Energía Atómica; ArgentinaFil: Krylov, Igor. Technion - Israel Institute of Technology; IsraelFil: Winter, Roy. Technion - Israel Institute of Technology; IsraelFil: Eizenberg, Moshe. Technion - Israel Institute of Technology; Israe

Breakdown transients in high-k multilayered MOS stacks: Role of the oxide-oxide thermal boundary resistance

In this work, breakdown transients of multilayered gate oxide stacks were analyzed to study the impact of the interfaces between oxides on the heat dissipation considering an electromigration-based progressive breakdown model. Using two distinct measurement setups on four different sets of samples, featuring two layers and three layers of Al 2 O 3 and HfO 2 interspersed, the breakdown transients were captured and characterized in terms of the degradation rate. Experimental results show that the number of oxide-oxide interfaces present in the multilayered stack has no visible impact on the breakdown growth rate among our samples. This strongly supports the interpretation of the bulk materials dominating the heat transfer to the surroundings of a fully formed conductive filament that shows no electrical differences between our various multilayered stack configurations.Fil: Boyeras Baldomá, Santiago. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Pazos, Sebastián Matías. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; ArgentinaFil: Aguirre, F. L.. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; ArgentinaFil: Palumbo, Felix Roberto Mario. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentin

SPICE Simulation of RRAM-Based Cross-Point Arrays Using the Dynamic Memdiode Model

We thoroughly investigate the performance of the Dynamic Memdiode Model (DMM) when used for simulating the synaptic weights in large RRAM-based cross-point arrays (CPA) intended for neuromorphic computing. The DMM is in line with Prof. Chua’s memristive devices theory, in which the hysteresis phenomenon in electroformed metal-insulator-metal structures is represented by means of two coupled equations: one equation for the current-voltage characteristic of the device based on an extension of the quantum point-contact (QPC) model for dielectric breakdown and a second equation for the memory state, responsible for keeping track of the previous history of the device. By considering ex-situ training of the CPA aimed at classifying the handwritten characters of the MNIST database, we evaluate the performance of a Write-Verify iterative scheme for setting the crosspoint conductances to their target values. The total programming time, the programming error, and the inference accuracy obtained with such writing scheme are investigated in depth. The role played by parasitic components such as the line resistance as well as some CPA’s particular features like the dynamical range of the memdiodes are discussed. The interrelationship between the frequency and amplitude values of the write pulses is explored in detail. In addition, the effect of the resistance shift for the case of a CPA programmed with no errors is studied for a variety of input signals, providing a design guideline for selecting the appropriate pulse’s amplitude and frequency.Fil: Aguirre, Fernando Leonel. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Pazos, Sebastián Matías. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Palumbo, Félix Roberto Mario. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; ArgentinaFil: Suñé, Jordi. Universitat Autònoma de Barcelona; EspañaFil: Miranda, Enrique. Universitat Autònoma de Barcelona; Españ

Comparative study of the breakdown transients of thin Al2O3 and HfO2 films in MIM structures and their connection with the thermal properties of materials

In this work, the breakdown transients of Al2O3- and HfO2 based metal-insulator-metal (MIM) stacks with the same oxide thickness and identical metal electrodes were compared. Their connection with the thermal properties of the materials was investigated using alternative experimental setups. The differences and similarities between these transients in the fast and progressive breakdown regimes were assessed. According to the obtained results, Al2O3 exhibits longer breakdown transients than HfO2 and requires a higher voltage to initiate a very fast current runaway across the dielectric film. This distinctive behavior is ascribed to the higher thermal conductivity of Al2O3. Overall results link the breakdown process to the thermal properties of the oxides under test rather than to dissipation effects occurring at the metal electrodes.Fil: Pazos, Sebastián Matías. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires; Argentina. Comisión Nacional de Energía Atómica; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Aguirre, Fernando Leonel. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires; Argentina. Comisión Nacional de Energía Atómica; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Miranda, Enrique. Universitat Autònoma de Barcelona; EspañaFil: Lombardo, Salvatore. Consiglio Nazionale delle Ricerche; ItaliaFil: Palumbo, Félix Roberto Mario. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires; Argentina. Comisión Nacional de Energía Atómica; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentin

Effect of forming gas annealing on the degradation properties of Ge-based MOS stacks

The influence of forming gas annealing on the degradation at a constant stress voltage of multi-layered germanium-based Metal-Oxide-Semiconductor capacitors (p-Ge/GeOx/Al2O3/High-K/Metal Gate) has been analyzed in terms of the C-V hysteresis and flat band voltage as a function of both negative and positive stress fields. Significant differences were found for the case of negative voltage stress between the annealed and non-annealed samples, independently of the stressing time. It was found that the hole trapping effect decreases in the case of the forming gas annealed samples, indicating strong passivation of defects with energies close to the valence band existing in the oxide-semiconductor interface during the forming gas annealing. Finally, a comparison between the degradation dynamics of Germanium and III-V (n-InGaAs) MOS stacks is presented to summarize the main challenges in the integration of reliable Ge–III-V hybrid devices.Fil: Aguirre, Fernando Leonel. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Comisión Nacional de Energía Atómica; ArgentinaFil: Pazos, Sebastián Matías. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires; Argentina. Comisión Nacional de Energía Atómica; ArgentinaFil: Palumbo, Félix Roberto Mario. Comisión Nacional de Energía Atómica; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires; ArgentinaFil: Fadida, S.. Technion - Israel Institute of Technology; IsraelFil: Winter, R.. Technion - Israel Institute of Technology; IsraelFil: Eizenberg, M.. Technion - Israel Institute of Technology; Israe

Assessment and Improvement of the Pattern Recognition Performance of Memdiode-Based Cross-Point Arrays with Randomly Distributed Stuck-at-Faults

In this work, the effect of randomly distributed stuck-at faults (SAFs) in memristive crosspoint array (CPA)-based single and multi-layer perceptrons (SLPs and MLPs, respectively) intended for pattern recognition tasks is investigated by means of realistic SPICE simulations. The quasi-static memdiode model (QMM) is considered here for the modelling of the synaptic weights implemented with memristors. Following the standard memristive approach, the QMM comprises two coupled equations, one for the electron transport based on the double-diode equation with a single series resistance and a second equation for the internal memory state of the device based on the so-called logistic hysteron. By modifying the state parameter in the current-voltage characteristic, SAFs of different severeness are simulated and the final outcome is analysed. Supervised ex-situ training and two well-known image datasets involving hand-written digits and human faces are employed to assess the inference accuracy of the SLP as a function of the faulty device ratio. The roles played by the memristor’s electrical parameters, line resistance, mapping strategy, image pixelation, and fault type (stuck-at-ON or stuck-at-OFF) on the CPA performance are statistically analysed following a Monte-Carlo approach. Three different re-mapping schemes to help mitigate the effect of the SAFs in the SLP inference phase are thoroughly investigated.In this work, the effect of randomly distributed stuck-at faults (SAFs) in memristive cross-point array (CPA)-based single and multi-layer perceptrons (SLPs and MLPs, respectively) intended for pattern recognition tasks is investigated by means of realistic SPICE simulations. The quasi-static memdiode model (QMM) is considered here for the modelling of the synaptic weights implemented with memristors. Following the standard memristive approach, the QMM comprises two coupled equations, one for the electron transport based on the double-diode equation with a single series resistance and a second equation for the internal memory state of the device based on the so-called logistic hysteron. By modifying the state parameter in the current-voltage characteristic, SAFs of different severeness are simulated and the final outcome is analysed. Supervised ex-situ training and two well-known image datasets involving hand-written digits and human faces are employed to assess the inference accuracy of the SLP as a function of the faulty device ratio. The roles played by the memristor?s electrical parameters, line resistance, mapping strategy, image pixelation, and fault type (stuck-at-ON or stuck-at-OFF) on the CPA performance are statistically analysed following a Monte-Carlo approach. Three different re-mapping schemes to help mitigate the effect of the SAFs in the SLP inference phase are thoroughly investigated.Fil: Aguirre, Fernando Leonel. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; Argentina. Universitat Autònoma de Barcelona; España. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Pazos, Sebastián Matías. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Palumbo, Félix Roberto Mario. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Morell, Antoni. Universitat Autònoma de Barcelona; EspañaFil: Suñé, Jordi. Universitat Autònoma de Barcelona; EspañaFil: Miranda, Enrique. Universitat Autònoma de Barcelona; Españ

Study on the Connection Between the Set Transient in RRAMs and the Progressive Breakdown of Thin Oxides

In this paper, the transition rate (TR) from the high-resistance state to the low-resistance state of a HfO2-based resistive random access memory (RRAM) is investigated. The TR is statistically characterized by applying constant voltage stresses in the range from 0.45 to 0.65 V. It is found that TR follows a voltage dependence which closely resembles the one exhibited by metal-insulator-semiconductor / metal-insulator-metal structures when subjected to constant voltage stress, but with remarkably different fitting parameters. This result suggests a common underlying mechanism in both evolutionary behaviors. Furthermore, the investigation provides additional evidence supporting the micro-structural changes in the oxide after the forming step as well as the role played by the atomic species during the SET event.Fil: Aguirre, Fernando Leonel. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Rodriguez Fernandez, Alberto. Universitat Autònoma de Barcelona; EspañaFil: Pazos, Sebastián Matías. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Suñé, Jordi. Universitat Autònoma de Barcelona; EspañaFil: Miranda, Enrique. Universitat Autònoma de Barcelona; EspañaFil: Palumbo, Felix Roberto Mario. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentin

Pulse Quenching and Charge-Sharing Effects on Heavy-Ion Microbeam Induced ASET in a Full-Custom CMOS OpAmp

In this work, charge sharing effects on Analog Single Event Transients are experimentally observed in a fully-custom designed, 180nm CMOS Operational Amplifier by means of a heavy-ion microbeam. Sensitive nodes of the differential stage showed bipolar output transients that cannot be explained by single node collection for the closed loop characteristics of the circuit under test. Layout of these transistors are consistent with charge sharing effects due to deposited charge diffusion. Implementation of linear modeling and simulations of multiple node collection between paired transistors of the input stage showed great coincidence with the obtained experimental waveforms, shaped as bipolar, quenched pulses. These effects are also observed due to dummy transistors placed in the layout. A simple parametrization at the simulation level is proposed to reproduce the observed experimental waveforms. Results indicate that charge-sharing effects should be taken into account during simulation-based sensitivity evaluation of analog circuits, as pulse quenching can alter the obtained results, and linear modeling is a simple approach to emulate simultaneous charge collection in multiple nodes by applying superposition principles, with aims of hardening a design.Fil: Fontana, Andrés. Universidad Tecnológica Nacional; ArgentinaFil: Pazos, Sebastián Matías. Comisión Nacional de Energía Atómica. Gerencia de Área Investigaciones y Aplicaciones No Nucleares. Gerencia Física (CAC). Departamento de Física de la Materia Condensada; Argentina. Universidad Tecnológica Nacional; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Aguirre, Fernando Leonel. Comisión Nacional de Energía Atómica. Gerencia de Área Investigaciones y Aplicaciones No Nucleares. Gerencia Física (CAC). Departamento de Física de la Materia Condensada; Argentina. Universidad Tecnológica Nacional; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Vega, Nahuel Agustín. Comisión Nacional de Energía Atómica; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Muller, Nahuel. Comisión Nacional de Energía Atómica; ArgentinaFil: De la Fourniere, Emmanuel. Comisión Nacional de Energía Atómica; ArgentinaFil: Silveira, Fernando. Universidad de la Republica. Facultad de Ingeniería; UruguayFil: Debray, Mario Ernesto. Comisión Nacional de Energía Atómica; ArgentinaFil: Palumbo, Félix Roberto Mario. Comisión Nacional de Energía Atómica. Gerencia de Área Investigaciones y Aplicaciones No Nucleares. Gerencia Física (CAC). Departamento de Física de la Materia Condensada; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentin

Hot-carrier-injection resilient RF power amplifier using adaptive bias

An adaptive bias strategy is proposed to harden fully integrated CMOS RF power amplifiers against time-dependent parametric degradation due to hot carrier injection. PA transistor DC current is compared to a reference using an operational transconductance amplifier that provides an adaptive gate DC voltage to the PA transistor as its threshold voltage increases due to stress. Based on degradation modelling obtained from experimental accelerated aging of a transistor and a RF PA implemented on a 130 nm technology, time dependent simulation results of the adaptive bias show that the proposed circuit effectively compensates for the threshold voltage increase of the main transistor.Fil: Pazos, Sebastián Matías. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; ArgentinaFil: Aguirre, Fernando Leonel. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; ArgentinaFil: Palumbo, Félix Roberto Mario. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las Ingenierías; ArgentinaFil: Silveira, Fernando. Universidad de la República; Urugua

Performance-reliability trade-offs in short range RF power amplifier design

In this work, trade-offs between performance and reliability in CMOS RF power amplifiers at the design stage are studied. The impact of transistor sizing, amplifier class and on-chip matching network design are explored for a 130 nm technology and the implications of design decisions in transistor gate oxide reliability are discussed and projected. A strong trade-off is observed between efficiency and reliability, mainly for different on-chip output matching architectures. A comparison between two example designs is performed via SPICE simulations that include reliability models and the effects of aging on the stress conditions of each amplifier.Fil: Pazos, Sebastián Matías. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires; ArgentinaFil: Aguirre, Fernando Leonel. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires; ArgentinaFil: Palumbo, Félix Roberto Mario. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires; ArgentinaFil: Silveira, F.. Universidad de la Republica. Facultad de Ingeniería; Urugua