33 research outputs found

    A Resonant Graphene NEMS Vibrometer

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    Measuring vibrations is essential to ensuring building structural safety and machine stability. Predictive maintenance is a central internet of things (IoT) application within the new industrial revolution, where sustainability and performance increase over time are going to be paramount. To reduce the footprint and cost of vibration sensors while improving their performance, new sensor concepts are needed. Here, double-layer graphene membranes are utilized with a suspended silicon proof demonstrating their operation as resonant vibration sensors that show outstanding performance for a given footprint and proof mass. The unveiled sensing effect is based on resonant transduction and has important implications for experimental studies involving thin nano and micro mechanical resonators that are excited by an external shaker

    Heat to Electricity Conversion by a Graphene Stripe with Heavy Chiral Fermions

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    A conversion of thermal energy into electricity is considered in the electrically polarized graphene stripes with zigzag edges where the heavy chiral fermion (HCF) states are formed. The stripes are characterized by a high electric conductance Ge and by a significant Seebeck coefficient S. The electric current in the stripes is induced due to a non-equilibrium thermal injection of "hot" electrons. This thermoelectric generation process might be utilized for building of thermoelectric generators with an exceptionally high figure of merit Z{\delta}T \simeq 100 >> 1 and with an appreciable electric power densities \sim 1 MW/cm2.Comment: 8 pages, 3 figure

    Mobility in Graphene Double Gate Field Effect Transistors

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    In this work, double-gated field effect transistors manufactured from monolayer graphene are investigated. Conventional top-down CMOS-compatible processes are applied except for graphene deposition by manual exfoliation. Carrier mobilities in single- and double gated graphene field effect transistors are compared. Even in double-gated graphene FETs, the carrier mobility exceeds the universal mobility of silicon over nearly the entire measured range. At comparable dimensions, reported mobilities for ultra thin body silicon-on-insulator MOSFETs can not compete with graphene FET values.Comment: 7 pages, 9 figure

    Thickness Estimation of Epitaxial Graphene on SiC using Attenuation of Substrate Raman Intensity

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    A simple, non-invasive method using Raman spectroscopy for the estimation of the thickness of graphene layers grown epitaxially on silicon carbide (SiC) is presented, enabling simultaneous determination of thickness, grain size and disorder using the spectra. The attenuation of the substrate Raman signal due to the graphene overlayer is found to be dependent on the graphene film thickness deduced from X-ray photoelectron spectroscopy and transmission electron microscopy of the surfaces. We explain this dependence using an absorbing overlayer model. This method can be used for mapping graphene thickness over a region and is capable of estimating thickness of multilayer graphene films beyond that possible by XPS and Auger electron spectroscopy (AES).Comment: 14 pages, 9 figure

    Novel hysteresis effect in ultrathin epitaxial Gd₂O₃ high-k dielectric

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    Charge trapping in ultrathin high-k Gd₂O₃ dielectric leading to appearance of hysteresis in C–V curves is studied by capacitance-voltage, conductance-frequency and current-voltage techniques at different temperatures. It was shown that the large leakage current at a negative gate voltage causes the reversible trapping of the positive charge in the dielectric layer, without electrical degradation of the dielectric and dielectricsemiconductor interface. The capture cross-sections of the hole traps are around 10⁻¹⁸ and 2 × 10⁻²⁰ cm² . The respective shift of the C–V curve correlates with a “plateau” at the capacitance corresponding to weak accumulation at the silicon interface

    Klein tunneling in graphene: optics with massless electrons

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    This article provides a pedagogical review on Klein tunneling in graphene, i.e. the peculiar tunneling properties of two-dimensional massless Dirac electrons. We consider two simple situations in detail: a massless Dirac electron incident either on a potential step or on a potential barrier and use elementary quantum wave mechanics to obtain the transmission probability. We emphasize the connection to related phenomena in optics, such as the Snell-Descartes law of refraction, total internal reflection, Fabry-P\'erot resonances, negative refraction index materials (the so called meta-materials), etc. We also stress that Klein tunneling is not a genuine quantum tunneling effect as it does not necessarily involve passing through a classically forbidden region via evanescent waves. A crucial role in Klein tunneling is played by the conservation of (sublattice) pseudo-spin, which is discussed in detail. A major consequence is the absence of backscattering at normal incidence, of which we give a new shorten proof. The current experimental status is also thoroughly reviewed. The appendix contains the discussion of a one-dimensional toy model that clearly illustrates the difference in Klein tunneling between mono- and bi-layer graphene.Comment: short review article, 18 pages, 14 figures; v3: references added, several figures slightly modifie

    Mobility Extraction of UTB n-MOSFETs down to 0.9 nm SOI thickness

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    In this abstract, the impact of series resistance on mobility extraction in conventional and recessed-gate ultra thin body (UTB) n-MOSFETs is investigated. High series resistance leads to an overestimation of the internal source/drain voltage and influences the measurement of the gate to channel capacitance. A specific MOSFET design that includes additional channel contacts and recessed gate technology are used to successfully extract mobility down to 0.9 nm silicon film thickness (4 atomic layers). Quantum mechanical effects are found to shift the threshold voltage and degrade mobility at these extreme scaling limits

    Gd silicate: A high-k dielectric compatible with high temperature annealing

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    The authors report on the investigation of amorphous Gd-based silicates as high- k dielectrics. Two different stacks of amorphous gadolinium oxide (Gd2 O3) and silicon oxide (Si O2) on silicon substrates are compared after annealing at temperatures up to 1000 \ub0C. Subsequently formed metal oxide semiconductor capacitors show a significant reduction in the capacitance equivalent thicknesses after annealing. Transmission electron microscopy, medium energy ion scattering, and x-ray diffraction analysis reveal distinct structural changes such as consumption of the Si O2 layer and formation of amorphous Gd silicate. The controlled formation of Gd silicates in this work indicates a route toward high- k dielectrics compatible with conventional, gate first complementary metal-oxide semiconductor integration schemes. \ua9 2009 American Vacuum Society
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