Analogue pattern recognition with stochastic switching binary CMOS-integrated memristive devices

Biological neural networks outperform current computer technology in terms of power consumption and computing speed while performing associative tasks, such as pattern recognition. The analogue and massive parallel in-memory computing in biology differs strongly from conventional transistor electronics that rely on the von Neumann architecture. Therefore, novel bio-inspired computing architectures have been attracting a lot of attention in the field of neuromorphic computing. Here, memristive devices, which serve as non-volatile resistive memory, are employed to emulate the plastic behaviour of biological synapses. In particular, CMOS integrated resistive random access memory (RRAM) devices are promising candidates to extend conventional CMOS technology to neuromorphic systems. However, dealing with the inherent stochasticity of resistive switching can be challenging for network performance. In this work, the probabilistic switching is exploited to emulate stochastic plasticity with fully CMOS integrated binary RRAM devices. Two different RRAM technologies with different device variabilities are investigated in detail, and their potential applications in stochastic artificial neural networks (StochANNs) capable of solving MNIST pattern recognition tasks is examined. A mixed-signal implementation with hardware synapses and software neurons combined with numerical simulations shows that the proposed concept of stochastic computing is able to process analogue data with binary memory cells

Modulating the Filamentary-Based Resistive Switching Properties of HfO2 Memristive Devices by Adding Al2O3 Layers

The resistive switching properties of HfO2 based 1T-1R memristive devices are electrically modified by adding ultra-thin layers of Al2 O3 into the memristive device. Three different types of memristive stacks are fabricated in the 130 nm CMOS technology of IHP. The switching properties of the memristive devices are discussed with respect to forming voltages, low resistance state and high resistance state characteristics and their variabilities. The experimental I–V characteristics of set and reset operations are evaluated by using the quantum point contact model. The properties of the conduction filament in the on and off states of the memristive devices are discussed with respect to the model parameters obtained from the QPC fit

Optimization of Multi-Level Operation in RRAM Arrays for In-Memory Computing

Accomplishing multi-level programming in resistive random access memory (RRAM) arrays with truly discrete and linearly spaced conductive levels is crucial in order to implement synaptic weights in hardware-based neuromorphic systems. In this paper, we implemented this feature on 4-kbit 1T1R RRAM arrays by tuning the programming parameters of the multi-level incremental step pulse with verify algorithm (M-ISPVA). The optimized set of parameters was assessed by comparing its results with a non-optimized one. The optimized set of parameters proved to be an effective way to define non-overlapped conductive levels due to the strong reduction of the device-to-device variability as well as of the cycle-to-cycle variability, assessed by inter-levels switching tests and during 1 k reset-set cycles. In order to evaluate this improvement in real scenarios, the experimental characteristics of the RRAM devices were captured by means of a behavioral model, which was used to simulate two different neuromorphic systems: an 8 × 8 vector-matrix-multiplication (VMM) accelerator and a 4-layer feedforward neural network for MNIST database recognition. The results clearly showed that the optimization of the programming parameters improved both the precision of VMM results as well as the recognition accuracy of the neural network in about 6% compared with the use of non-optimized parameters

Performance Assessment of Amorphous HfO2-Based RRAM Devices for Neuromorphic Applications

Producción CientíficaThe use of thin layers of amorphous hafnium oxide has been shown to be suitable for the manufacture of Resistive Random-Access memories (RRAM). These memories are of great interest because of their simple structure and non-volatile character. They are particularly appealing as they are good candidates for substituting flash memories. In this work, the performance of the MIM structure that takes part of a 4 kbit memory array based on 1-transistor-1-resistance (1T1R) cells was studied in terms of control of intermediate states and cycle durability. DC and small signal experiments were carried out in order to fully characterize the devices, which presented excellent multilevel capabilities and resistive-switching behavior.Ministerio de Ciencia, Innovación y Universidades (Grant, TEC2017-84321-C4-2-R )Fondos Feder y la Deutsche Forschungsgemeinschaft (German Research Foundation) ( with Project-ID 434 434 223- SFB1461)The Federal Ministry of Education and Research of Germany under (grant number 16ES1002

TiN/Ti/HfO2/TiN memristive devices for neuromorphic computing: from synaptic plasticity to stochastic resonance

We characterize TiN/Ti/HfO2/TiN memristive devices for neuromorphic computing. We analyze different features that allow the devices to mimic biological synapses and present the models to reproduce analytically some of the data measured. In particular, we have measured the spike timing dependent plasticity behavior in our devices and later on we have modeled it. The spike timing dependent plasticity model was implemented as the learning rule of a spiking neural network that was trained to recognize the MNIST dataset. Variability is implemented and its influence on the network recognition accuracy is considered accounting for the number of neurons in the network and the number of training epochs. Finally, stochastic resonance is studied as another synaptic feature. It is shown that this effect is important and greatly depends on the noise statistical characteristics

Prozessentwicklung und elektrische Charakterisierung von CMOS-integrierten memristiven Bauelementen für neuartige nichtflüchtige Speicheranwendungen

Energy efficiency is vital for future low-power electronic applications. This ultra-low power consumption requirement enables the research beyond the conventional charge-based memories. Further, reliability, high scalability, fast switching, CMOS compatibility, high endurance, etc., are some of the characteristics envisaged by the new generation of emerging non-volatile memories (NVMs). A memristor or OxRAM is one among the many emerging NVMs, which can exhibit the aforementioned characteristics, and it has the potential to replace the power-hungry conventional NVMs. The memristive devices have the advantage of monolithic integration with the CMOS logic, which enables the widening of their application areas. Despite their various advantages, the reliability, forming voltages, and variability of the devices pose a hurdle to their wide commercial usage. Hence, it is crucial to identify these factors and mitigate them. This thesis addresses these issues through fabrication process improvements, electrical characterization techniques, and device-engineering methods. The improvements in the fabrication processes reduced the pristine state currents of the memristive devices. It impacted the reliability and resistive switching performance of the memristive devices directly. To further improve the performance, the memristive devices are integrated into the 130 nm BiCMOS baseline technology of IHP. Additionally, dedicated test structures are developed to monitor and control the fabrication process steps through in-line electrical characterization. Further, the forming current and voltage values, along with their dispersions in the 4 kbit memristive arrays, were reduced by utilizing the electrical characterization techniques. Accordingly, the forming operations were performed at high operating temperatures using incremental step pulse and verify algorithm (ISPVA). In contrast to the well-known method of increasing the current compliance (1R) or the gate voltage of the transistor (1T-1R) to increase the conduction filament size, a thin layer of Al2O3 is added. This device engineering technique reduced the variability in both LRS and HRS currents of the memristive devices. Additionally, the conduction filament properties in both states are modeled by using the quantum point contact (QPC) model. Finally, harnessing the intrinsic variability of the memristive devices for neuromorphic computing applications is demonstrated. The reliability of the devices is assessed through endurance and retention characteristics.Energieeffizienz ist für künftige elektronische Anwendungen mit geringem Stromverbrauch von entscheidender Bedeutung. Dieser extrem niedrige Stromverbrauch ermöglicht die Forschung über die herkömmlichen ladungsbasierten Speicher hinaus. Darüber hinaus sind Zuverlässigkeit, hohe Skalierbarkeit, schnelles Schalten, CMOS-Kompatibilität, hohe Lebensdauer usw. einige der Eigenschaften, die von der neuen Generation der aufkommenden nichtflüchtigen Speicher (NVMs) angestrebt werden. Ein Memristor oder OxRAM ist einer der vielen aufkommenden NVMs, die die oben genannten Eigenschaften aufweisen können, und er hat das Potenzial, die stromfressenden konventionellen NVMs zu ersetzen. Die memristiven Bauelemente haben den Vorteil, dass sie monolithisch in die CMOS-Logik integriert werden können, was eine Ausweitung ihrer Anwendungsbereiche ermöglicht. Trotz ihrer zahlreichen Vorteile stellen die Zuverlässigkeit, die Formationsspannungen und die Variabilität der Bauelemente eine Hürde für ihre breite kommerzielle Nutzung dar. Daher ist es von entscheidender Bedeutung, diese Faktoren zu identifizieren und sie zu entschärfen. Die vorliegende Arbeit befasst sich mit diesen Problemen durch Verbesserungen des Herstellungsprozesses, elektrische Charakterisierungstechniken und Methoden der Bauelementekonstruktion. Die Verbesserungen in den Herstellungsprozessen haben die Ströme im Urzustand der memristiven Bauelemente reduziert. Dies wirkte sich direkt auf die Zuverlässigkeit und die Widerstandsschaltleistung der memristiven Bauelemente aus. Um die Leistung weiter zu verbessern, werden die memristiven Bauelemente in die 130 nm BiCMOS-Basistechnologie des IHP integriert. Darüber hinaus werden spezielle Teststrukturen entwickelt, um die Herstellungsprozesse durch elektrische Inline-Charakterisierung zu überwachen und zu steuern. Darüber hinaus wurden die Werte für den Formierungsstrom und die Formierungsspannung sowie deren Streuungen in den memristiven Arrays mit 4 kbit durch den Einsatz der elektrischen Charakterisierungstechniken reduziert. Dementsprechend wurden die Umformvorgänge bei hohen Betriebstemperaturen unter Verwendung des ISPVA-Algorithmus (Incremental Step Pulse and Verify) durchgeführt. Im Gegensatz zu der bekannten Methode, die Stromnachgiebigkeit (1R) oder die Gatespannung des Transistors (1T-1R) zu erhöhen, um die Größe des Leitungsfilaments zu vergrößern, wird eine dünne Schicht Al2O3 hinzugefügt. Durch diese Technik wurde die Variabilität der LRS- und HRS-Ströme der memristiven Bauelemente verringert. Darüber hinaus werden die Eigenschaften des Leitungsfilaments in beiden Zuständen mit Hilfe des Quantenpunktkontaktmodells (QPC) modelliert. Schließlich wird demonstriert, wie die intrinsische Variabilität der memristiven Bauelemente für neuromorphe Computeranwendungen genutzt werden kann. Die Zuverlässigkeit der Bauelemente wird anhand der Ausdauer und der Retentionseigenschaften bewertet

The role of the bottom and top interfaces in the 1st reset operation in HfO<inf>2</inf> based RRAM devices

In this work, the increase on the conductive filament conductivity during the 1st Reset operation, by using the incremental step pulse with verify algorithm, in HfO2 based 1T1R RRAM devices is investigated. A new approach is proposed in order to explain the increase of conductivity by highlighting the crucial roles played by both metal-oxide interfaces. The top metal-oxide interface (HfO2−x/TixOy) plays a crucial role in the forming operation by creating a strong gradient of oxygen vacancies in the hafnium oxide layer. The bottom metal-oxide interface (TixOyNz/HfO2−x) also creates oxygen vacancies, which strengthen the conductive filament tip near to this interface at the beginning of the 1st Reset, leading to the reported conductivity increase. After the 1st Reset operation the conductive filament stabilizes at the bottom interface suppressing this behavior in the subsequent reset operations

Modulating the Filamentary-Based Resistive Switching Properties of HfO2 Memristive Devices by Adding Al2O3 Layers

The resistive switching properties of HfO2 based 1T-1R memristive devices are electrically modified by adding ultra-thin layers of Al2O3 into the memristive device. Three different types of memristive stacks are fabricated in the 130 nm CMOS technology of IHP. The switching properties of the memristive devices are discussed with respect to forming voltages, low resistance state and high resistance state characteristics and their variabilities. The experimental I&ndash;V characteristics of set and reset operations are evaluated by using the quantum point contact model. The properties of the conduction filament in the on and off states of the memristive devices are discussed with respect to the model parameters obtained from the QPC fit

Modulating the Filamentary-Based Resistive Switching Properties of HfO₂ Memristive Devices by Adding Al₂O₃ Layers

The resistive switching properties of HfO2 based 1T-1R memristive devices are electrically modified by adding ultra-thin layers of Al2O3 into the memristive device. Three different types of memristive stacks are fabricated in the 130 nm CMOS technology of IHP. The switching properties of the memristive devices are discussed with respect to forming voltages, low resistance state and high resistance state characteristics and their variabilities. The experimental I–V characteristics of set and reset operations are evaluated by using the quantum point contact model. The properties of the conduction filament in the on and off states of the memristive devices are discussed with respect to the model parameters obtained from the QPC fit