Aharonov-Bohm Oscillations in Photoluminescence from Charged Exciton in Quantum Tubes

The oscillation of photoluminescence peak energies is observed in InAs quantum tubes depending on the magnetic flux through the tube. The oscillation is shown to be due to the Aharonov-Bohm effect of a charged exciton in a quantum tube. No quadratic shift in photoluminescence peak energies is observed, which is a characteristic feature of a thin quantum tube with a single channel surrounding the magnetic flux through the tube.Comment: 14 pages, 4 figure

Recent Progress in Vertical Si/III-V Tunnel FETs : From Fundamentals to Current-Boosting Technology

Tunnel field-effect transistors (TFETs) with a steep subthreshold-slope (SS) are promising low-power switches for future large-scale integrated circuits (LSIs) with low power consumption and high performance. Recently, we demonstrated vertical TFETs with III-V/Si heterojunctions. This new sort of tunnel junction achieves a steep SS because of its unique figure-of-merit. Here, we report on recent progress on vertical TFETs using Si/III-V heterojunctions and means for boosting on-state current

Catalyst-free growth of GaAs nanowires by selective-area metalorganic vapor-phase epitaxy

We report on the fabrication of GaAs hexagonal nanowires surrounded by (110) vertical facets on a GaAs (111) B substrate using selective-area (SA) metalorganic vapor-phase epitaxial (MOVPE) growth. The substrate for SA growth was partially covered with thin SiO2, and a circular mask opening with a diameter d0 of 50–200 nm was defined. After SA-MOVPE, GaAs nanowires with a typical diameter d ranging from 50 to 200 nm and a height from 2 to 9 mm were formed vertically on the substrate without any catalysts. The size of the nanowire depends on the growth conditions and the opening size of the masked substrate. A possible growth mechanism is also discusse

Realization of conductive InAs nanotubes based on lattice-mismatched InP/InAs core-shell nanowires

We report the realization of ordered arrays of single-crystalline InAs nanotubes by a simple pure-eptiaxial approach. The process involved the fabrication of lattice-mismatched InP/InAs core-shell nanowires using selective area metalorganic vapor phase epitaxy on InP (111)A substrates. The subsequent removal of the InP core resulted in vertically aligned InAs nanotubes which were highly uniform with well-defined features and controllable dimensions. Transmission electron microscopy studies confirmed that the nanotubes were single-crystalline with wurtzite crystal structure and temperature-dependent transport measurements revealed that they were conductive without any intentional doping. The realization of such conductive InAs nanotubes opens up new possibilities for both fundamental studies and future device applications

Realization of InAs-based two-dimensional artificial lattice by selective area metalorganic vapor phase epitaxy

The experimental realization of two-dimensional semiconductor artificial lattice based on InAs quantum wires is reported here. Artificial Kagome lattice fabricated using InAs quantum wires of unit cell size 0.7 mm has been theoretically proved to show ferromagnetism. Fabrication of such a structure with InAs quantum wires was attempted by selective area metalorganic vapor phase epitaxy using GaAs (111)A substrates. Temperature-dependent growth mode change was observed and Volmer-Weber growth mode at high temperature inhibited the formation of uniform structure. Low temperature and low AsH3 partial pressure resulted in the successful fabrication of 0.7 μm period InAs-based Kagome lattice structure

Fabrication of InP/InAs/InP core-multishell heterostructure nanowires by selective area metalorganic vapor phase epitaxy

We report the growth of InP/InAs/InP core-multishell nanowire arrays by selective area metalorganic vapor phase epitaxy. The core-multishell nanowires were designed to accommodate a strained InAs quantum well layer in a higher band gap InP nanowire. The precise control over nanowire growth direction and heterojunction formation enabled the successful fabrication of the nanostructure in which all three layers were epitaxially grown without the assistance of any catalyst. The grown nanowires were highly uniform, vertically oriented, and periodically aligned with controllable dimensions. 4 K photoluminescence measurements confirmed the formation of strained InAs quantum well on InP (110) sidewalls and the well widths corresponding to the photoluminescence peaks were in good agreement with calculated values

Advances in Steep-Slope Tunnel FETs

Tunnel FETs (TFETs) with steep subthreshold slope have been attracting much attention as building blocks for future low-power integrated circuits and CMOS technology devices. Here we report on recent advances in vertical TFETs using III-V/Si heterojunctions. These heterojunctions, which are formed by direct integration of III-V nanowires (NWs) on Si, are promising tunnel junction for achieving steep subthreshold slope (SS). The III-V/Si heterojunction inherently forms abrupt junctions regardless of precise doping technique because the band discontinuity is determined by only the offset of III-V and Si, and depletion region can be controlled by the III-V MOS structure. Thus, good gate-electrostatic control with a large internal electrical field for modulation of tunnel transport can be achieved. Here we repot on recent advances in the vertical TFETs using the III-V NW/Si heterojunction with surrounding-gate architecture and demonstrate steep-SS behavior and very low parasitic leakage current

Composition controllability of InGaAs nanowire arrays in selective area growth with controlled pitches on Si platform

Composition controllability of vertical InGaAs nanowires (NWs) on Si integrated by selective area growth was characterized for Si photonics in the optical telecommunication bands. The pitch of pre-patterned holes (NW sites) changed to an In/Ga alloy-composition in the solid phase during the NW growth. The In composition with a nanometer-scaled pitch differed completely from that with a mu m-scaled pitch. Accordingly, the growth morphologies of InGaAs NWs show different behavior with respect to the In/Ga ratio. (c) 2017 Author(s)

A 1 bit binary-decision-diagram adder circuit using single-electron transistors made by selective-area metalorganic vapor-phase epitaxy

We demonstrate single-electron operation of a 1 bit adder circuit using GaAs single-electron tunneling transistors (SETs). GaAs dot and wire coupled structures for the fabrication of SETs were grown by a selective-area metalorganic vapor-phase epitaxy technique. The logic circuit was realized based on a binary decision diagram architecture using Coulomb blockade (CB) in GaAs dots and switching operations were achieved in a single-electron mode because of the CB effects. Through this architecture, a 1 bit adder circuit was realized with three SETs, two of which were for AND logic and one with two input gates for exclusive OR (XOR). Both AND and XOR operations were demonstrated at 1.9 K, which indicated successful fabrication of the 1 bit adder

Growth of InGaAs nanowires on Ge(111) by selective-area metal-organic vapor-phase epitaxy

We report the growth of InGaAs nanowires (NWs) on Ge(111) substrates using selective-area metal-organic vapor-phase epitaxy (SA-MOVPE) for novel InGaAs/Ge hybrid complementary metal-oxide-semiconductor (CMOS) applications. Ge(111) substrates with periodic arrays of mask opening were prepared, and InGaAs was selectively grown on the opening region of Ge(111). A uniform array of InGaAs NWs with a diameter around 100 nm was successfully grown using appropriate preparation of the initial surfaces with an AsH3 thermal treatment and flow-rate modulation epitaxy (FME). We found that optimizing partial pressure of AsH3 and the number of FME cycles improved the yield of vertical InGaAs NWs. Line-scan profile analysis of energy dispersive X-ray (EDX) spectrometry showed that the In composition in the InGaAs NW was almost constant from the bottom to the top. Transmission electron microscope (TEM) analysis revealed that the interface between InGaAs NW and Ge had misfit dislocations, but their distance was longer than that expected from the difference in their lattice constants