Microwave design of multi-layer interposers for the packaging of photonic integrated circuits

The increasing growth of data traffic on the Internet is supported by innovations in high-speed photonic devices. Some of this novel photonic devices are photonic integrated circuits (PICs) that use higher speeds, have higher circuit density and integrate more heterogeneous devices. A new generation of photonic packaging is also required to handle the increasing device density and data rate of the PICs. An important element to package the PICs is the carrier board which also serves as an interposer between the PIC and the package. The usual interposer material for PICs is a single-layer aluminium nitride (AlN) substrate due to its high thermal conductivity and good microwave performance. In contrast, other high-speed and high-density applications use multi-layer substrates as carrier boards. The typical multi-layer technologies for high-speed interposers is low-temperature co-fired ceramic (LTCC). The motivation of this research is the need of multi-layer interposers suitable for the packaging of high-speed and high-density PICs. A key element to enable this multi-layer interposer is the high-speed channels. The task of this research was the microwave design of these high-speed channels for a multi-layer interposer and carrier board suitable for PICs. The main findings of this research can be divided into three areas. First, improvements to the microwave theory. A novel impedance profile reconstruction algorithm based on time-domain reflectometry (TDR) was developed. Additionally, a novel set of equations to calculate the characteristic impedance and the complex propagation constant from the vector network analyser (VNA) measurements of long lines was found and tested with positive results. Also, a novel single impedance thru-only de-embedding algorithm was completed. Second, the design of a novel rotatable vertical transition. The vertical transition has a 3 dB bandwidth around 35 GHz and small penalties on the eye diagram at 40 Gbit s−1 . Third, positive measured results of these designs in co-fired AlN. The measurements of the co-fired AlN board show similar results than in an LTCC board proving that co-fired AlN is an attractive option for PICs where the thermal management is important. The main conclusion from these findings is that the designed transmission lines and vertical transitions are suitable for the use of LTCC or of co-fired AlN as multi-layer interposers for the packaging of high-speed PICs Future work include improvements to the novel microwave algorithms, the development of equation-based models for the transmission lines. Also, the vertical transition has a resonance around 35 GHz that could be compensated using stubs or other elements. Finally, the transmission line designs and vertical transition designs need to be used for real applications of high-speed PICs using LTCC or co-fired AlN

A high-speed vertical transition for multi-layer A1N carrier boards designed by time-domain reflectometry

High density, high speed photonic integrated circuits (PICs) have large numbers of closely spaced DC and RF contacts, which must be connected in the package. The use of multilayer carrier boards to interface between the contacts and the package gives high performance and high density. In order to be effective as a packaging solution, these multi-layer carrier boards need high-speed electrical channels with good performance. Also, the boards usually need high thermal conductivity to manage the heat. Co-fired aluminium nitride (A1N) has the needed high thermal conductivity. However, there are no designs of multi-layer high-speed channels in the literature for co-fired A1N. Therefore, this article presents a high-speed multi-layer channel for co-fired A1N and its measured results. Two transmission lines were designed that showed a measured loss of Ë 0.09dBmm-1 at 40GHz. The vertical transition allows for arbitrary planar rotations of the channel and showed a measured 3 dB bandwidth of 33 GHz and small penalties in the eye diagram with a 44 Gbits-1 signal. The channels showed crosstalk below -30 dB

Silicon photonic 2.5D integrated multi-chip module receiver

We demonstrate the first 2.5D integrated, wavelength division multiplexing, silicon photonic receiver. The multi-chip module utilizes a silicon interposer to integrate the four-channel photonic cascaded microdisk receiver with four electronic transimpedance amplifiers

Wafer-level vacuum sealing for packaging of silicon photonic MEMS

Silicon (Si) photonic micro-electro-mechanical systems (MEMS), with its low-power phase shifters and tunable couplers, is emerging as a promising technology for large-scale reconfigurable photonics with potential applications for example in photonic accelerators for artificial intelligence (AI) workloads. For silicon photonic MEMS devices, hermetic/vacuum packaging is crucial to the performance and longevity, and to protect the photonic devices from contamination. Here, we demonstrate a wafer-level vacuum packaging approach to hermetically seal Si photonic MEMS wafers produced in the iSiPP50G Si photonics foundry platform of IMEC. The packaging approach consists of transfer bonding and sealing the silicon photonic MEMS devices with 30 μm-thick Si caps, which were prefabricated on a 100 mm-diameter silicon-on-insulator (SOI) wafer. The packaging process achieved successful wafer-scale vacuum sealing of various photonic devices. The functionality of photonic MEMS after the hermetic/vacuum packaging was confirmed. Thus, the demonstrated thin Si cap packaging shows the possibility of a novel vacuum sealing method for MEMS integrated in standard Si photonics platforms

MORPHIC : programmable photonic circuits enabled by silicon photonic MEMS

In the European project MORPHIC we develop a platform for programmable silicon photonic circuits enabled by waveguide-integrated micro-electro-mechanical systems (MEMS). MEMS can add compact, and low-power phase shifters and couplers to an established silicon photonics platform with high-speed modulators and detectors. This MEMS technology is used for a new class of programmable photonic circuits, that can be reconfigured using electronics and software, consisting of large interconnected meshes of phase shifters and couplers. MORPHIC is also developing the packaging and driver electronics interfacing schemes for such large circuits, creating a supply chain for rapid prototyping new photonic chip concepts. These will be demonstrated in different applications, such as switching, beamforming and microwave photonics

Silicon photonic MEMS: exploiting mechanics at the nanoscale to enhance photonic integrated circuits

With the maturing and the increasing complexity of Silicon Photonics technology, novel avenues are pursued to reduce power consumption and to provide enhanced functionality: exploiting mechanical movement in advanced Silicon Photonic Integrated Circuits provides a promising path to access a strong modulation of the effective index and to low power consumption by employing mechanically stable and thus non-volatile states. In this paper, we will discuss recent achievements in the development of MEMS enabled systems in Silicon Photonics and outline the roadmap towards reconfigurable general Photonic Integrated Circuits

Scalable nano-opto-electromechanical systems in silicon photonics

Recent advances in integration of Nano-Opto-Electromechanical Systems in Silicon Photonics enable fundamental photonic operations such as switching, phase shifting or power equalization on-chip. The unique combination of high optical efficiency, low electric power consumption and compact footprint, provides outstanding opportunities in scalability to large-scale photonic integrated circuits

Wafer-level hermetically sealed silicon photonic MEMS

The emerging fields of silicon (Si) photonic micro–electromechanical systems (MEMS) and optomechanics enable a wide range of novel high-performance photonic devices with ultra-low power consumption, such as integrated optical MEMS phase shifters, tunable couplers, switches, and optomechanical resonators. In contrast to conventional SiO2-clad Si photonics, photonic MEMS and optomechanics have suspended and movable parts that need to be protected from environmental influence and contamination during operation. Wafer-level hermetic sealing can be a cost-efficient solution, but Si photonic MEMS that are hermetically sealed inside cavities with optical and electrical feedthroughs have not been demonstrated to date, to our knowledge. Here, we demonstrate wafer-level vacuum sealing of Si photonic MEMS inside cavities with ultra-thin caps featuring optical and electrical feedthroughs that connect the photonic MEMS on the inside to optical grating couplers and electrical bond pads on the outside. We used Si photonic MEMS devices built on foundry wafers from the iSiPP50G Si photonics platform of IMEC, Belgium. Vacuum confinement inside the sealed cavities was confirmed by an observed increase of the cutoff frequency of the electro-mechanical response of the encapsulated photonic MEMS phase shifters, due to reduction of air damping. The sealing caps are extremely thin, have a small footprint, and are compatible with subsequent flip-chip bonding onto interposers or printed circuit boards. Thus, our approach for sealing of integrated Si photonic MEMS clears a significant hurdle for their application in high-performance Si photonic circuits.QC 20220303MORPHICAEOLUSULISSESZeroAM

Programmable photonic circuits using silicon photonics MEMS

We present a silicon photonics technology extended with low-power MEMS scalable to large circuits. This enables us to make photonic waveguide meshes that can be reconfigured using electronics and software

Wafer-level Hermetic Sealing of Silicon Photonic MEMS by Direct Metal-to-Metal Bonding

The field of silicon (Si) photonic micro-electromechanical system (MEMS) for photonic integrated circuits (PICs) has evolved rapidly. Thanks to the ultra-low power consumption of Si photonic MEMS, it enables a wide range of high-performance photonic devices such as integrated optical MEMS phase shifters, tunable couplers and switches. However, photonic MEMS have suspended and movable parts which need to be protected from environmental influences, such as exposure to dust and humidity. Therefore, a packaging solution is needed for reliable operation over long periods. Here, we demonstrate wafer-level vacuum sealing of Si photonic MEMS inside cavities with ultra-thin Si caps.QC 20221214MORPHIC (EU, H2020)ZeroAMP (EU, H2020)ULISSES (EU, H2020)AEOLUS (EU, H2020