Towards a Software Transactional Memory for heterogeneous CPU-GPU processors

The heterogeneous Accelerated Processing Units (APUs) integrate a multi-core CPU and a GPU within the same chip. Modern APUs provide the programmer with platform atomics, used to communicate the CPU cores with the GPU using simple atomic datatypes. However, ensuring consistency for complex data types is a task delegated to programmers, who have to implement a mutual exclusion mechanism. Transactional Memory (TM) is an optimistic approach to implement mutual exclusion. With TM, shared data can be accessed by multiple computing threads speculatively, but changes are only visible if a transaction ends with no conflict with others in its memory accesses. TM has been studied and implemented in software and hardware for both CPU and GPU platforms, but an integrated solution has not been provided for APU processors. In this paper we present APUTM, a software TM designed to work on heterogeneous APU processors. The design of APUTM focuses on minimizing the access to shared metadata in order to reduce the communication overhead via expensive platform atomics. The main objective of APUTM is to help us understand the tradeoffs of implementing a sofware TM on an heterogeneous CPU-GPU platform and to identify the key aspects to be considered in each device. In our experiments, we compare the adaptability of APUTM to execute in one of the devices (CPU or GPU) or in both of them simultaneously. These experiments show that APUTM is able to outperform sequential execution of the applications.This work has been supported by projects TIN2013-42253-P and TIN2016-80920-R, from the Spanish Government, P11-TIC8144 and P12- TIC1470, from Junta de Andalucía, and Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech

Improvements in Hardware Transactional Memory for GPU Architectures

In the multi-core CPU world, transactional memory (TM)has emerged as an alternative to lock-based programming for thread synchronization. Recent research proposes the use of TM in GPU architectures, where a high number of computing threads, organized in SIMT fashion, requires an effective synchronization method. In contrast to CPUs, GPUs offer two memory spaces: global memory and local memory. The local memory space serves as a shared scratch-pad for a subset of the computing threads, and it is used by programmers to speed-up their applications thanks to its low latency. Prior work from the authors proposed a lightweight hardware TM (HTM) support based in the local memory, modifying the SIMT execution model and adding a conflict detection mechanism. An efficient implementation of these features is key in order to provide an effective synchronization mechanism at the local memory level. After a quick description of the main features of our HTM design for GPU local memory, in this work we gather together a number of proposals designed with the aim of improving those mechanisms with high impact on performance. Firstly, the SIMT execution model is modified to increase the parallelism of the application when transactions must be serialized in order to make forward progress. Secondly, the conflict detection mechanism is optimized depending on application characteristics, such us the read/write sets, the probability of conflict between transactions and the existence of read-only transactions. As these features can be present in hardware simultaneously, it is a task of the compiler and runtime to determine which ones are more important for a given application. This work includes a discussion on the analysis to be done in order to choose the best configuration solution.Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech

Hardware support for Local Memory Transactions on GPU Architectures

Graphics Processing Units (GPUs) are popular hardware accelerators for data-parallel applications, enabling the execution of thousands of threads in a Single Instruction - Multiple Thread (SIMT) fashion. However, the SIMT execution model is not efficient when code includes critical sections to protect the access to data shared by the running threads. In addition, GPUs offer two shared spaces to the threads, local memory and global memory. Typical solutions to thread synchronization include the use of atomics to implement locks, the serialization of the execution of the critical section, or delegating the execution of the critical section to the host CPU, leading to suboptimal performance. In the multi-core CPU world, transactional memory (TM) was proposed as an alternative to locks to coordinate concurrent threads. Some solutions for GPUs started to appear in the literature. In contrast to these earlier proposals, our approach is to design hardware support for TM in two levels. The first level is a fast and lightweight solution for coordinating threads that share the local memory, while the second level coordinates threads through the global memory. In this paper we present GPU-LocalTM as a hardware TM (HTM) support for the first level. GPU-LocalTM offers simple conflict detection and version management mechanisms that minimize the hardware resources required for its implementation. For the workloads studied, GPU-LocalTM provides between 1.25-80X speedup over serialized critical sections, while the overhead introduced by transaction management is lower than 20%.Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech

Energy Efficiency of Software Transactional Memory in a Heterogeneous Architecture

Hardware vendors make an important effort creating low-power CPUs that keep battery duration and durability above acceptable levels. In order to achieve this goal and provide good performance-energy for a wide variety of applications, ARM designed the big.LITTLE architecture. This heterogeneous multi-core architecture features two different types of cores: big cores oriented to performance and little cores, slower and aimed to save energy consumption. As all the cores have access to the same memory, multi-threaded applications must resort to some mutual exclusion mechanism to coordinate the access to shared data by the concurrent threads. Transactional Memory (TM) represents an optimistic approach for shared-memory synchronization. To take full advantage of the features offered by software TM, but also benefit from the characteristics of the heterogeneous big.LITTLE architectures, our focus is to propose TM solutions that take into account the power/performance requirements of the application and what it is offered by the architecture. In order to understand the current state-of-the-art and obtain useful information for future power-aware software TM solutions, we have performed an analysis of a popular TM library running on top of an ARM big.LITTLE processor. Experiments show, in general, better scalability for the LITTLE cores for most of the applications except for one, which requires the computing performance that the big cores offer.Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech

Time Series Heterogeneous Co-execution on CPU+GPU

Time series motif (similarities) and discords discovery is one of the most important and challenging problems nowadays for time series analytics. We use an algorithm called “scrimp” that excels in collecting the relevant information of time series by reducing the computational complexity of the searching. Starting from the sequential algorithm we develop parallel alternatives based on a variety of scheduling policies that target different computing devices in a system that integrates a CPU multicore and an embedded GPU. These policies are named Dynamic -using Intel TBB- and Static -using C++11 threads- when targeting the CPU, and they are compared to a heterogeneous adaptive approach named LogFit -using Intel TBB and OpenCL- when targeting the co-execution on the CPU and GPU.Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech

Solving Large-Scale Markov Decision Processes on Low-Power Heterogeneous Platforms

Markov Decision Processes (MDPs) provide a framework for a machine to act autonomously and intelligently in environments where the effects of its actions are not deterministic. MDPs have numerous applications. We focus on practical applications for decision making, such as autonomous driving and service robotics, that have to run on mobile platforms with scarce computing and power resources. In our study, we use Value Iteration to solve MDPs, a core method of the paradigm to find optimal sequences of actions, which is well known for its high computational cost. In order to solve these computationally complex problems efficiently in platforms with stringent power consumption constraints, high-performance accelerator hardware and parallelised software come to the rescue. We introduce a generalisable approach to implement practical applications for decision making, such as autonomous driving on mobile and embedded low-power heterogeneous SoC platforms that integrate an accelerator (GPU) with a multicore. We evaluate three scheduling strategies that enable concurrent execution and efficient use of resources on a variety of SoCs embedding a multicore CPU and integrated GPU, namely Oracle, Dynamic, and LogFit. We compare these strategies for solving an MDP modelling the use-case of autonomous robot navigation in indoor environments on four representative platforms for mobile decision-making applications with a power use ranging from 4 to 65 Watts. We provide a rigorous analysis of the results to better understand their behaviour depending on the MDP size and the computing platform. Our experimental results show that by using CPU-GPU heterogeneous strategies, the computation time and energy required are considerably reduced with respect to multicore implementation, regardless of the computational platform.Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech. This work was partially supported by the Spanish project TIN 2016-80920-R

Evaluacion de la percepcion de los padres acerca del desempeno en el lenguaje expresivo de sus hijos, despues de la aplicacion de un programa de entrenamiento auditivo

126 p.La afectación que la hipoacusia tiene, tanto para quienes la padecen,comopara sus familias, ha llevado a numerosas instituciones a crear e implementarprogramas de salud que permitan ofrecerles una mejor calidad de vida. La JuntaNacional de Auxilio Escolar y Becas (JUNAEB)brinda adaptación audioprotésicaaniños preescolares y escolares que sean detectados con hipoacusia sobre 30decibeles (promedio tonal puro). Junto con ello,los menoresingresan a unprograma de entrenamiento auditivo, cuyo propósito es educar a los niños yasusfamilias en el uso y manejo de la prótesis auditiva. Entrega además,estrategiaspara el desarrollo auditivo yorientacionessobre estimulación del lenguaje. Surgela duda de saber si la exposición de los sujetos al programa de entrenamientoauditivo provocará variaciones comunicativas en cuanto a laexpresióndellenguaje. Es por esto, que se realizó un cuestionario a los padres de los menoresparticipantes en el programa, de manera tal de contar con un instrumento aplicablea todos los niños, evitando que interfieran variables externas a la aplicación deinstrumentosestandarizados. Esto permite además obtener datos sobre eldesempeño comunicativo del niño en contextos familiares para él, evitandosometerlo a contextos clínicos y poco comunes

Educación Sexual Integral y Currículo Oculto Escolar: un estudio sobre las creencias del profesorado

El tratamiento educativo de las temáticas ligadas a la sexualidad in this py la salud reproductiva es de gran complejidad. En Argentina, desde el año 2006 la Ley Nacional Nº 26.150 de Educación Sexual Integral prescribe el tratamiento de estos temas en las aulas. La aplicación de esta ley supone una interpelación de las creencias sobre sexualidad de todas las personas pertenecientes a la comunidad educativa. Dada esta situación se hacen necesarias investigaciones orientadas a elucidar los factores que determinan las posibilidades del cambio cultural que la educación sexual integral supone. En este trabajo se busca contribuir a esta comprensión mediante el análisis de las creencias sobre sexualidad de tres docentes de escuela media de la Ciudad Autónoma de Buenos Aires. A partir de este análisis se formó una comunidad de aprendizaje dialógico con el propósito de que los docentes participantes reflexionaran sobre los posibles modos en que sus creencias modifican sus prácticas escolares.Fil: Plaza, María Victoria. Universidad de Buenos Aires. Facultad de Ciencias Exactas y Naturales. Centro de Formación E Investigación En Enseñanza de Las Ciencias; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Gonzalez Galli, Leonardo Martin. Universidad de Buenos Aires. Facultad de Ciencias Exactas y Naturales. Centro de Formación E Investigación En Enseñanza de Las Ciencias; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Meinardi, Elsa. Universidad de Buenos Aires. Facultad de Ciencias Exactas y Naturales. Centro de Formación E Investigación En Enseñanza de Las Ciencias; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentin

The response of taxonomic and functional diversity of the seed bank to agricultural intensification and soil properties in two Mediterranean cereal areas

Weed seed bank diversity has been severely impacted by agriculture intensifi cation. However, the functional consequences have been poorly studied in highly intensifi ed agro-ecosystems.Postprint (published version