150°C amorphous silicon thin-film transistor technology for polyimide substrates

We have developed a 150°C technology for amorphous silicon thin-film transistors (a-Si:H TFTs) on polyimide substrates deposited by plasma enhanced chemical vapor deposition. The silicon nitride gate dielectric and the a-Si:H channel material were tailored to provide the least leakage current and midgap defect density, respectively. In addition, we conducted experiments on the TFT structure and fabrication with the aim of obtaining high electron mobility. TFTs with back-channel etch and channel-passivated structures were fabricated on glass or 51 μm thick polyimide foil. The a-Si:H TFTs have an on/off current ratio of ∼10 7 and an electron mobility of ∼0.7 cm 2/V s

Flexible glass substrates with via holes for TFT backplanes

This paper looks at flexible glass substrates with via holes for TFT backplane

Dry growth of n-octylphosphonic acid monolayer for low-voltage organic thin-film transistors

Dry method for monolayer deposition of n-octylphosphonic acid (C8PA) on the surface of aluminium oxide (AlOx) is presented. Vacuum thermal evaporation is employed to deposit initial thickness corresponding to several C8PA monolayers, followed by a thermal desorption of the physisorbed C8PA molecules. AlOx functionalized with such C8PA monolayer exhibits leakage current density of ∼10−7 A/cm2 at 3 V, electric breakdown field of ∼6 MV/cm, and a root-mean-square surface roughness of 0.36 nm. The performance of low-voltage pentacene thin-film transistors that implement this dry AlOx/C8PA gate dielectric depends on C8PA desorption time. When the desorption time rises from 25 to 210 min, the field-effect mobility increases from ∼0.02 to ∼0.04 cm2/V s, threshold voltage rises from ∼−1.2 to ∼−1.4 V, sub-threshold slope decreases from ∼120 to ∼80 mV/decade, off-current decreases from ∼5 × 10−12 to ∼1 × 10−12 A, on/off current ratio rises from ∼3.8 × 104 to ∼2.5 × 105, and the transistor hysteresis decreases from 61 to 26 mV. These results collectively support a two stage model of the desorption process where the removal of the physisorbed C8PA molecules is followed by the annealing of the defect sites in the remaining C8PA monolayer

Aluminium oxide prepared by atomic layer deposition in organic thin-film transistors operating at 2 V : comparison with UV-ozone oxidation

Large-area, roll-to-roll fabrication of thin-film circuits demands layer thickness uniformity over large areas. Previously, a 10-nm-thick dry bi-layer dielectric based on aluminium oxide (AlOx) prepared by UV-ozone oxidation and n-octylphosphonic acid (C8PA) monolayer prepared by vacuum evaporation has been developed for organic thin-film transistors (OTFTs) based on pentacene. Here we compare such OTFTs to similar transistors that incorporate ALD-AlOx/C8PA bi-layer. In addition, a 12.9-nm-thick ALD-AlOx exposed to UV-ozone for 60 minutes was incorporated into OTFTs based on dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT)

Comparison of 2 V organic thin-film transistors fabricated on free-standing commercial PEN foils

The large-area, roll-to-roll (R2R) fabrication of organic thin-film circuits on plastic foils demands low-cost manufacturing and the integration of devices onto flexible plastic substrates. We have developed a fully dry process [1] to fabricate low-voltage organic thin-film transistors (OTFTs) with 10-nm thick dielectric amenable to R2R processing. Two commercially available polyethylene naphthalate (PEN) plastic foils (DuPont Teijin [2]) were compared for use as possible flexible substrates. Teonex Q65FA features an adhesive layer on the bottom side to prevent its slippage during the R2R process, while Optfine PQA1 includes a planarisation layer on the top (device) side. The PEN films were pre-annealed at 160°C for 24 hours prior to OTFT fabrication. 160°C is the maximum temperature used in our OTFT fabrication process and the pre-annealing should mitigate the layer-to-layer misalignment during the OTFT fabrication. Teonex Q65FA remained flat after the pre-annealing step, while the radius of curvature of Optfine PQA1 changed from 17 cm to 1.5 cm after the anneal. Consequently, we fabricated Al/AlOx/C8PA/DNTT/Au and Al/AlOx/DNTT/Au OTFTs on non-annealed Optfine and pre-annealed Teonex foils. Dinaphthothienothiophene (DNTT) was chosen due to its excellent air-stability and the addition of n-octylphosphonic acid (C8PA) improves its growth. 15 nm of DNTT was deposited at room temperature at rates of 0.4 Å/s and 0.6 Å/s on the Teonex and Optfine, respectively. The initial OTFT performance was evaluated by measuring the transfer characteristics between 0 and −2 V and extracting the field-effect mobility, threshold voltage, subthreshold slope, etc. Bias stress was performed approximately one week after the initial measurements at a gate voltage of −2 V while the source and drain were grounded. Referring to Table 1, one week of storage in vacuum between the initial and bias stress measurements, led to a reduction in OTFT threshold voltage and an increase in the mobility and the OFF-current. Figure 1 shows the as-fabricated OTFT parameters extracted from transfer characteristics measured at a drain voltage of −2 V. For both PEN substrates tested, the inclusion of the C8PA monolayer increases field-effect mobility, ON-current and ON/OFF-current ratio and reduces subthreshold slope and OFF-current. The substrates affect OTFT performance in a mixed way. Comparing OTFTs with C8PA monolayer Teonex PEN has a slightly lower subthreshold slope and OFF-current than the Optfine PEN film. However, the Optfine film exhibits about a factor of three higher field-effect mobility (0.14 cm2/Vs) and about an order of magnitude higher ON-current. The OTFTs on Optfine PEN substrate also appear to remain more stable after the application of bias stress in terms of mobility, even though their threshold voltage at the beginning of the bias stress was −0.4 V lower than that of OTFTs fabricated on Teonex PEN. In conclusion, Teonex PEN was found to be easier to handle, since it remained flat upon heating at 160°C. However, the AlOx/C8PA transistors exhibited about a factor of three lower field-effect mobility when compared to Optfine PEN OTFTs. The planarisation layer on Optfine PEN leads to improved OTFT mobility compared to Teonex PEN; however the Optfine PEN curved significantly upon heating and therefore presents a significant challenge if used as a free-standing substrate with our OTFT fabrication procedure

Optimizing the deposition rate of vacuum-grown n-octylphosphonic acid monolayer for low-voltage thin-film transistors

A self-assembled monolayer of n-octylphosphonic acid (C8PA) is prepared from vapor phase in vacuum. C8PA thickness corresponding to several monolayers is deposited on aluminum oxide (AlOx) and subsequently heated to leave a monolayer of chemisorbed molecules. The effect of C8PA deposition rate on a 15-nm-thick, bilayer AlOx/C8PA dielectric and low-voltage p-channel organic thin-film transistors (OTFTs) is studied. The increase in the deposition rate from 0.1 to 7.0 Å/s leads to increase in the field-effect mobility from 0.039 to 0.061 cm2/Vs, while the threshold voltage remains around −1.55 V. At the same time, the off-current is reduced from 2.3 × 10−12 to 1.3 × 10−12A, the subthreshold slope is lowered from 100 to 89 mV/decade and the on/off current ratio is increased from ∼105 to ∼106. The leakage current density of AlOx is reduced from 1 × 10−7 to 4 × 10−8 A/cm2 at 3 V when C8PA monolayer is added on top of it. In addition, pentacene grain size on AlOx/C8PA is larger than that on AlOx. The overall performance of AlOx/C8PA OTFTs is superior to that of AlOx OTFTs

Behavior of the parameters of microcrystalline silicon TFTs under mechanical strain

International audienceN-type and P-type microcrystalline silicon top-gate TFTs, processed directly on PEN plastic substrate at maximum temperature of 180 °C, were mechanically stressed. These TFTs were bent by different curvature radii varying between infinite (flat) and 0.5 cm. The tensile stress increases the electron mobility and the compressive stress decreases it. The tensile stress decreases the threshold voltage of N-type TFTs while the compressive stress increases it. These trends are inversed if the type of stress changes OR the type of TFTs changes. The total behavior under mechanical stress is exactly similar to that of single crystalline silicon MOSFETs in nano-scale technologies (90, 65, 45, 32 nm), where nano-scale stress is introduced in the goal to engineer the electrical parameters. The similarity originates from the microcrystalline silicon active layer that behaves like single crystalline silicon even if the stress effects are softened by the grain boundaries and the multiple crystalline orientations of the grains

Structural changes in vapour-assembled n-octylphosphonic acid monolayer with post-deposition annealing : correlation with bias-induced transistor instability

We report on the link between the structure of n-octylphosphonic acid (C8PA) monolayer implemented in low-voltage organic thin-film transistors (OTFTs) based on aluminium oxide/C8PA/pentacene and the kinetics of the transistor bias-induced degradation. Structural changes in the vapour-deposited C8PA monolayer, studied by Fourier Transform Infrared (FTIR) spectroscopy, are induced by annealing. Changes in the threshold voltage, subthreshold slope, field-effect mobility, and the transistor on-current are measured as functions of the bias stress time and fitted with stretched exponential functions. The presence of C8PA molecules physisorbed to the monolayer and/or the increased disorder between the aliphatic tails results in substantial degradation of the subthreshold slope and faster reduction in normalized mobility, while slowing the degradation of the threshold voltage. The removal of all physisorbed molecules and improved order between aliphatic tails achieved via optimized post-deposition annealing leads to an improved, microscopically-less-varied interface between C8PA and pentacene. Consequently, the degradation of the subthreshold slope becomes negligible, the reduction in normalized mobility becomes smaller and the degradation of the threshold voltage dominates. The equilibrium value of the normalized on-current after prolonged bias stress is ~ 0.16 regardless of the disorder in C8PA monolayer, indicating that even though the structure of the monolayer affects the kinetics of the transistor degradation process, the same bias stress condition ultimately leads to the same relative drop in the on-current

Correlation between the structure of the dielectric monolayer and the performance of low-voltage transistors based on pentacene

Alkyl phosphonic acids (CnPA) are becoming a material of choice for passivation of high-k oxides in organic thin-film transistors with ultra-thin gate dielectrics. A monolayer of phosphonic acid inserted between the inorganic oxide and the organic semiconductor provides two main benefits: (i) the density of the charge carrier traps associated with the surface –OH groups of the oxide is reduced because these groups act as binding sites for the organic molecules; and (ii) the low surface energy of the organic monolayer may reduce the density of defects in the subsequently deposited conjugated polymer. To date such monolayers have been assembled from solutions only. We have recently developed a vapour-phase self-assembly of n-octylphosphonic acid (C8PA) monolayer in vacuum that leads to a well chemisorbed monolayer of C8PA. When such a monolayer is attached to ~ 9-nm thick aluminium oxide to form an ultra-thin dielectric implemented in low-voltage organic thin-film transistors based on pentacene, the transistor performance exhibits measurable changes upon alteration of the structure of the C8PA monolayer

Aluminium oxide prepared by UV/ozone exposure for low-voltage organic thin-film transistors

We have developed a gate dielectric for low-voltage organic thin-film transistors based on an inorganic/organic bi-layer with a total thickness of up to ~ 20 nm. The inorganic layer is aluminium oxide formed by UV/ozone treatment of aluminium layers. The organic layer is 1-octylphosphonic acid. The preparation of aluminium oxide was studied with respect to the threshold voltage of p-channel thin-film transistors based on thermally evaporated pentacene. The results demonstrate that the threshold voltage decreases with increasing UV/ozone exposure time. The threshold voltage varies by 0.7 V and the gate-source leakage current by a factor of 10 as a function of aluminium oxide preparation. The electrical breakdown field of the bi-layer gate dielectric is at least 5 MV/cm for all AlOx preparation conditions