Tecnología de detectores de partículas de silicio resistentes a la radiación

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Microdosimetry in low energy proton beam at therapeutic-equivalent fluence rate with silicon 3D-cylindrical microdetectors

In this work we show the first microdosimetry measurements on a low energy proton beam with therapeutic-equivalent fluence rates by using the second generation of 3D-cylindrical microdetectors. The sensors belong to an improved version of a novel silicon-based 3D-microdetector design with electrodes etched inside silicon, which were manufactured at the National Microelectronics Centre (IMB-CNM, CSIC) in Spain. A new microtechnology has been employed using quasi-toroid electrodes of 25μm diameter and a depth of 20μm within the silicon bulk, resulting in a well-defined cylindrical radiation sensitive volume. These detectors were tested at the 18 MeV proton beamline of the cyclotron at the National Accelerator Centre (CNA, Spain). They were assembled into an in-house low-noise readout electronics to assess their performance at a therapeutic-equivalent fluence rate. Microdosimetry spectra of lineal energy were recorded at several proton energies starting from 18 MeV by adding 50μm thick tungsten foils gradually at the exit-window of the cyclotron external beamline, which corresponds to different depths along the Bragg curve. The experimentalyF¯values in silicon cover from (5.7 ± 0.9) to (8.5 ± 0.4) keV μm-1in the entrance to (27.4 ± 2.3) keV μm-1in the distal edge. Pulse height energy spectra were crosschecked with Monte Carlo simulations and an excellent agreement was obtained. This work demonstrates the capability of the second generation 3D-microdetectors to assess accurate microdosimetric distributions at fluence rates as high as those used in clinical centers in proton therapy

Tecnología de detectores de partículas de silicio resistentes a la radiación

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Design and Evaluation of Large Area Strip Sensor Prototypes for the ATLAS Inner Tracker Detector

The ATLAS community is facing the last stages prior to the production of the upgraded silicon strip Inner Tracker (ITk) for the High Luminosity Large Hadron Collider (HL-LHC). An extensive Market Survey was carried out in order to evaluate the capability of different foundries to fabricate large area silicon strip sensors, satisfying ATLAS ITk specifications. The semiconductor manufacturing company Infineon Technologies AG was one of the two foundries, along with Hamamatsu Photonics KK, evaluated for the production of the new barrel silicon strip sensors for the ITk. This work presents the complete tests carried out on the sensors designed and fabricated in 6-inch wafers in the framework of the Market Survey. The full prototype wafer layout was designed using a Python-based Automatic Layout Generation Tool, able to rapidly design sensors with different characteristics and dimensions based on a few geometrical and technological input parameters. A complete characterization of the large area strip sensors fabricated is presented, including the results of proton and neutron irradiations, and their compliance with the specifications of the ITk strip tracker

Quality Assurance methodology for the ATLAS ITk Strip Sensor Production

The production of the strip sensors for the ATLAS Inner Tracker (ITk) will start in 2020. Nearly 22000 large area sensors will be produced over a period of roughly 4 years. A Quality Assurance (QA) strategy has been prepared to be carried out during the whole production period. Once the process has been characterized as providing the required pre-irradiation specifications and the proper radiation hardness, the onus is on the manufacturer to rigidly stick to that qualified process. Still, sample testing with specific device-element structures and irradiation of devices should be implemented by the ITk collaboration. The main devices that will be used by the collaboration for QA purposes are miniature strip sensors (1x1 cm2), monitor diodes (8x8 mm2), and the ATLAS test chip. The ATLAS test chip contains several test structures to monitor specific technological and device-element parameters, such as conductive layers sheet resistance, critical parameters of the device oxides such as capacitance, thickness, breakdown voltage, flat-band voltage, etc; Si/SiO2 interfaces charges, and strip and inter-strip electrical characteristics

Analysis of MOS capacitor with p layer with TCAD simulation

The ATLAS18 strip sensors of the ATLAS inner tracker upgrade (ITk) are in production since 2021. Along with the large-format n$^+$-in-p strip sensor in the center of 6-inch wafer, test structures are laid out in the open space for monitoring the performance of the strip sensor and its fabrication process. One of the structures is a 1.2$\times$1.0 cm$^2$ test chip that includes representative structures of the strips, and Metal-Oxide-Silicon (MOS) capacitors. In addition to the standard MOS capacitor, a MOS capacitor is designed with a p-implantation in the surface of silicon, representative of the p-stop doping for isolating the n$^+$ strips, the MOS-p capacitor. The capacitance measurement of the standard MOS capacitor as a function of bias voltage (C-V) shows characteristic behavior in the accumulation, depletion, and inversion regimes, from which one can deduce the amount of the interface charge. The MOS-p capacitor shows the C-V behavior modulated by the properties of the p-layer. With over 50% of the full production complement delivered, we have observed consistent characteristics in the MOS-p capacitors. Rarely and currently only in three batches, we have observed abnormalities which have implied lower density of p-implantation in the p-layer. To study the cause, we have simulated the MOS-p capacitor with a TCAD software, which successfully reproduces the normal behavior, with the p-density and the interface charge within the expected ranges, including a feature caused by a geometrical offset of the areas of the metal and the p-implantation. By contrast, overall shapes of the abnormal cases are only reproduced when introducing 1/10 of p-density, larger interface charge, charge traps in the p-layer, and/or n-type surface contamination. A smaller but distinctive feature in the C-V behavior might also be caused by non-uniform distribution of these or other components. These simulations help to take final acceptance decisions for the batches in production

Analysis of MOS capacitor with p-layer with TCAD simulation

The ATLAS18 strip sensors of the ATLAS inner tracker upgrade (ITk) are under production since 2021. Along with the large-format n^+-in-p strip sensor in the center of the wafer, test structures are laid out in the open space for monitoring the performance of the strip sensor and its fabrication process. One of the structures is a 1.2×1.0 mm^2 test chip that includes representative structures of the strips, and Metal-Oxide-Silicon (MOS) capacitors. In addition to the standard MOS capacitor, a MOS capacitor with a p-layer in the surface of silicon, the MOS-p capacitor, is designed with a p-density representative of the p-stop doping for isolating the n+ strips. The C-V curve of the MOS capacitor shows characteristic behavior in the accumulation, depletion, and inversion regions as a function of bias voltage, from which one can estimate the amount of the interface charge. The MOS-p capacitor shows the C-V curve modulated by the properties of the p-layer. With over 50% of the full production complement delivered, we have observed consistent characteristics in the MOS-p capacitors. Rarely and currently only in 3 batches, we have observed abnormalities. To further study them, we have simulated the MOS-p capacitor with TCAD software, which successfully reproduces the normal behavior, including a feature caused by a geometrical setback of the p-layer to the metal area, with the p-density and the interface charge within the expected range. By contrast, the overall shapes of the abnormal cases are only reproduced with 1/10 of the p-density to the specification and possible charge traps in the p-layer area. A smaller but distinctive feature in the behavior may require a non-uniform distribution of the p-density and the interface charge or something else. These simulations help to take final decisions for the batches in production

Evaluation of MOS and Gated Diode Devices of the ATLAS ITk Test Chip

The new ATLAS Inner Tracker (ITk) sub-detector is necessitated by the impending High Luminosity Large Hadron Collider (HL-LHC) upgrade. This replacement is part of the phase-II upgrade programme for the HL-LHC which will see a sevenfold increase in peak instantaneous luminosity with a total ionizing dose of 53 MRad. The fully solid state ITk will employ silicon n^{+}-in-p microstrip sensors in the outer layers of the tracking detector. The main sensors are manufactured on 6” diameter silicon wafers. Periphery wafer area (halfmoons) to which the main sensor does not extend serves as convenient venues for the implementation of test devices. The primary utility of the test devices is Quality Assurance (QA), that is, the monitoring of the consistency and reliability of the manufacturing process. A Metal-Oxide-Semiconductor (MOS) and Gate-Controlled Diode (GCD) are two such test devices aimed at characterizing the surface oxide and silicon-oxide interface. Measurement procedures and parameters for QA are established for these devices and the viability of these tests for gamma irradiated samples is evaluated. The suitability of these devices to further monitor the strip sensor fabrication process is also investigated

Testbeam Studies on Pick-Up in Sensors with Embedded Pitch Adapters

Embedded pitch adapters are an alternative solution to external pitch adapters widely used to facilitate the wire-bonding step when connecting silicon strip sensors and readout electronics of different pitch. The pad-pitch adaption can be moved into the sensor fabrication step by implementing a second layer of metal tracks, connected by vias to the primary metal layer of sensor strips. Such a solution, however, might bear the risk of performance losses introduced by various phenomena. One of these effects, the undesired capacitive coupling between the silicon bulk and this second metal layer (pick-up) has been investigated in photon testbeam measurements. For a worst-case embedded pitch adapter design, expected to be maximally susceptible to pick-up, a qualitative analysis has visualized the effect as a function of the location on the second metal layer structure. It was further found that the unwanted effect decreases towards expected values for operating thresholds of the binary readout used. Suggestions for more in-depth and quantitative studies are also derived

Gamma irradiation of ATLAS18 ITk strip sensors affected by static charge

Construction of the new all-silicon Inner Tracker (ITk), developed by the ATLAS collaboration to be able to track charged particles produced at the High-Luminosity LHC, started in 2021 and is expected to continue until 2028. The ITk detector will include ~18,000 highly segmented and radiation hard n+-in-p silicon strip sensors, which are being manufactured by Hamamatsu Photonics. Upon their delivery, the ATLAS ITk strip sensor collaboration performs detailed measurements of sensors to monitor quality of all fabricated pieces. QC electrical tests include current-voltage (IV) and capacitance-voltage (CV) tests, full strip tests, and a measurement of the long-term stability of the sensor leakage current. While most sensors demonstrate excellent performance during QC testing, we have nevertheless observed that a number of sensors from several production batches failed the electrical tests. Accumulated data indicates a strong correlation between observed electrical test failures and high electrostatic charge measured on the sensor surface during initial reception tests. This electrostatic charge enhances the risk of "Local trapped charge" events during manufacturing, shipping, and handling procedures, resulting in failed electrical QC tests. To mitigate the above-described issues, the QC testing institutes modified the sensor handling procedures and introduced sensor recovery techniques. Despite the implementation of various recovery techniques, it is still possible that some affected sensors will not be identified by the sensor QC testing, or that "Local trapped charge" events could occur in later manipulation stages of the sensor. In the presented study, we have investigated whether the total ionizing dose (TID) expected in the real experiment can effectively resolve early breakdown or low interstrip isolation caused by the electrostatic charge. Selected charge-affected sensors were irradiated with gamma rays from the 60Co source for a number of TID values. The results of this study indicate that the negative effects of the electrostatic charge on the critical sensors characteristics disappear after a very small amount of an accumulated TID, which actually corresponds to one or two days in the experiment. This finding gives us confidence in mitigating the issue of electrostatic charge during the operation of the ITk strip sensors in the real experiment