2,254 research outputs found
A Reuse-based framework for the design of analog and mixed-signal ICs
Despite the spectacular breakthroughs of the semiconductor industry, the ability to design integrated circuits (ICs) under stringent time-to-market (TTM) requirements is lagging behind integration capacity, so far keeping pace with still valid Moore's Law. The resulting gap is threatening with slowing down such a phenomenal growth. The design community believes that it is only by means of powerful CAD tools and design methodologies -and, possibly, a design paradigm shift-that this design gap can be bridged. In this sense, reuse-based design is seen as a promising solution, and concepts such as IP Block, Virtual Component, and Design Reuse have become commonplace thanks to the significant advances in the digital arena. Unfortunately, the very nature of analog and mixed-signal (AMS) design has hindered a similar level of consensus and development. This paper presents a framework for the reuse-based design of AMS circuits. The framework is founded on three key elements: (1) a CAD-supported hierarchical design flow that facilitates the incorporation of AMS reusable blocks, reduces the overall design time, and expedites the management of increasing AMS design complexity; (2) a complete, clear definition of the AMS reusable block, structured into three separate facets or views: the behavioral, structural, and layout facets, the two first for top-down electrical synthesis and bottom-up verification, the latter used during bottom-up physical synthesis; (3) the design for reusability set of tools, methods, and guidelines that, relying on intensive parameterization as well as on design knowledge capture and encapsulation, allows to produce fully reusable AMS blocks. A case study and a functional silicon prototype demonstrate the validity of the paper's proposals.Ministerio de Educación y Ciencia TEC2004-0175
Geometrically-constrained, parasitic-aware synthesis of analog ICs
In order to speed up the design process of analog ICs, iterations between different design stages should be avoided as much as possible. More specifically, spins between electrical and physical synthesis should be reduced for this is a very time-consuming task: if circuit performance including layout-induced degradations proves unacceptable, a re-design cycle must be entered, and electrical, physical, or both synthesis processes, would have to be repeated. It is also worth noting that if geometric optimization (e.g., area minimization) is undertaken after electrical synthesis, it may add up as another source of unexpected degradation of the circuit performance due to the impact of the geometric variables (e.g., transistor folds) on the device and the routing parasitic values. This awkward scenario is caused by the complete separation of said electrical and physical synthesis, a design practice commonly followed so far. Parasitic-aware synthesis, consisting in including parasitic estimates to the circuit netlist directly during electrical synthesis, has been proposed as solution. While most of the reported contributions either tackle parasitic-aware synthesis without paying special attention to geometric optimization or approach both issues only partially, this paper addresses the problem in a unified way. In what has been called layout-aware electrical synthesis, a simulation-based optimization algorithm explores the design space with geometric variables constrained to meet certain user-defined goals, which provides reliable estimates of layout-induced parasitics at each iteration, and, thereby, accurate evaluation of the circuit ultimate performance. This technique, demonstrated here through several design examples, requires knowing layout details beforehand; to facilitate this, procedural layout generation is used as physical synthesis approach due to its rapidness and ability to capture analog layout know-how.Ministerio de Educación y Ciencia TEC2004-0175
On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis
Accelerating the synthesis of increasingly complex analog integrated circuits is key to bridge the widening gap between what we can integrate and what we can design while meeting ever-tightening time-to-market constraints. It is a well-known fact in the semiconductor industry that such goal can only be attained by means of adequate CAD methodologies, techniques, and accompanying tools. This is particularly important in analog physical synthesis (a.k.a. layout generation), where large sensitivities of the circuit performances to the many subtle details of layout implementation (device matching, loading and coupling effects, reliability, and area features are of utmost importance to analog designers), render complete automation a truly challenging task. To approach the problem, two directions have been traditionally considered, knowledge-based and optimization-based, both with their own pros and cons. Besides, recently reported solutions oriented to speed up the overall design flow by means of reuse-based practices or by cutting off time-consuming, error-prone spins between electrical and layout synthesis (a technique known as layout-aware synthesis), rely on a outstandingly rapid yet efficient layout generation method. This paper analyses the suitability of procedural layout generation based on templates (a knowledge-based approach) by examining the requirements that both layout reuse and layout-aware solutions impose, and how layout templates face them. The ability to capture the know-how of experienced layout designers and the turnaround times for layout instancing are considered main comparative aspects in relation to other layout generation approaches. A discussion on the benefit-cost trade-off of using layout templates is also included. In addition to this analysis, the paper delves deeper into systematic techniques to develop fully reusable layout templates for analog circuits, either for a change of the circuit sizing (i.e., layout retargeting) or a change of the fabrication process (i.e., layout migration). Several examples implemented with the Cadence's Virtuoso tool suite are provided as demonstration of the paper's contributions.Ministerio de Educación y Ciencia TEC2004-0175
Actuación de resolutores de primero y segundo año de secundaria en la resolución de un problema matemático: un estudio exploratorio
Los sistemas de representación y la resolución de problemas matemáticos es un tema de interés para la Didáctica de la Matemática porque se pone en juego una serie de conocimientos, conceptos, modelos, métodos, estrategias, experiencias y relaciones que implican un pensamiento elaborado complejo que consigue que, a partir de unos datos conocidos, encontrar otros datos desconocidos. En este estudio, describimos la actuación de resolutores cuando resuelven un problema matemático, de manera espontánea con lápiz y papel. Cuando algún estudiante resuelve un problema mediante lápiz y papel deja la huella de los pasos seguidos en su resolución. Esos pasos están cargados de información importante que el resolutor presenta haciendo uso de algún sistema de representación que le es conocido y le permite comunicar su pensamiento
The geometric representations in the books of text used in the Autonomous Community of Extremadura
Se recogen los principales resultados de una investigación sobre la visualización de la Geometría en libros de texto actuales de Matemáticas de las editoriales de mayor uso en Extremadura (SM, Anaya y Santillana). El estudio se centra en la variedad de representaciones al introducir las figuras y conceptos geométricos, los elementos de las imágenes que puedan derivar en dificultades en el proceso de enseñanza-aprendizaje de la Geometría, la representación plana de figuras tridimensionales y las imágenes reales que se utilizan para aludir a elementos geométricos abstractos.The main results of a research on the visualization of the Geometry in present-day Mathematics text books of the more used editorials in Extremadura (SM, Anaya and Santillana) are collected. Study focuses on the variety of representations in the introduction of the figures and geometrical concepts, the elements of the images which could lead to difficulties in the Geometry teaching-learning process, the plane representation of tridimensional figures and the real images that are used to refer to abstract geometrical elements.peerReviewe
Is Sustainable Performance Explained by Firm Effect in Small Business?
To what extent a firm’s resources (firm effect) and the structure of the sector (industry effect) are sources of a firm’s competitiveness has been debated for years in strategic management. Most of the empirical studies carried out have focused on large firms and have used static performance measures, and in them the firm effect generally outweighs the industry effect. This research contributes to this debate in trying to verify whether the competitive advantage that relies on the firm’s resources is sustainable, especially in small firms. We used a sample of almost 15,000 Spanish firms to test the impact that the firm and the industry effects have on sustainable performance, for both small and large firms, applying hierarchical linear modelling with a variable measured through time-varying parameters. Our results confirm the absolute importance of the firm effect on sustainable organizational performance, regardless the firm size, and show that, even though the industry effect has little weight in explaining sustainability, it is significantly higher in the case of small firms. This means that managers must concentrate efforts on providing their firm with the necessary resources to achieve a competitive advantage while choosing a good sector to position itselfS
Análisis de las representaciones geométricas en los libros de texto
La investigación analiza y clasifica las imágenes gráficas relacionadas con la enseñanza-aprendizaje de la geometría en libros de textos. Se estudian varios aspectos de las representaciones geométricas a lo largo de las unidades de geometría de los libros. Algunos de estos aspectos son la variedad de representaciones al introducir conceptos geométricos, los elementos de las imágenes que puedan derivar en dificultades en el proceso de enseñanza-aprendizaje de la geometría, la representación plana de figuras tridimensionales y las imágenes reales que se utilizan para aludir a elementos geométricos abstractos. Se realiza una categorización que sirve como instrumento de análisis de los textos
Effect of hyperlipidic diets on normal and abnormal aortic valves in the Syrian hamster: A preliminary study
Effect of hyperlipidic diets on normal and abnormal aortic valves in the Syrian hamster: A preliminary study.
MC Fernández 1,2, J Moncayo-Arlandi 1, MT Soto 1,
MA López-Unzu 1, B Fernández 1,2 and AC Durán 1,2.
1 Department of Animal Biology, Faculty of Science, University of Málaga, Spain.
2 Biomedical Research Institute of Málaga (IBIMA),
University of Málaga, Spain.
Bicuspid aortic valve (BAV) is the most frequent
human congenital cardiac malformation. It frequently becomes stenotic due to calcification by an atherosclerosis-like process. Hyperlipidic diets have been classically used to induce atherosclerosis in laboratory animals, including Syrian hamsters. The aim here is to evaluate the effect of hyperlipidic diets in hamsters having different incidence of BAVs.
We used a unique inbred strain of Syrian hamsters with a high ( 40%) incidence of spontaneous BAV, morphologically similar to that in man, another inbred strain with a low ( 4%) incidence of BAV, and an outbred, second control line, acquired from Charles River Laboratories. Three experimental groups were fed with standard diet supplemented with 2% cholesterol plus 15% butter during five months. In parallel, three control groups were fed with unmodified standard diet.
Hyperlipidic diets induced lesions in the aortic valve and ascending aortic wall, i.e. subendothelial lipid deposits, valve sclerosis, and neo-intima in the aorta. We performed a preliminary, qualitative, comparative study of the lesions associated with the different animal populations and valvular phenotypes.
Our results indicate that (1) the type and severity of the lesions varied among the three hamster populations, suggesting that genetic factors may be involved; (2) the aortic valve morphology seems not to determine the severity of the valvular lesions. We conclude that our hamster strain with high incidence of BAV is a promising animal model for studies on human aortic stenosis.
This work was supported by P10-CTS-6068.Universidad de Málaga. Campus de Excelencia Andalucía Tech. P10-CTS-6068
Ordinal time series analysis with the R package otsfeatures
The 21st century has witnessed a growing interest in the analysis of time
series data. Whereas most of the literature on the topic deals with real-valued
time series, ordinal time series have typically received much less attention.
However, the development of specific analytical tools for the latter objects
has substantially increased in recent years. The R package otsfeatures attempts
to provide a set of simple functions for analyzing ordinal time series. In
particular, several commands allowing the extraction of well-known statistical
features and the execution of inferential tasks are available for the user. The
output of several functions can be employed to perform traditional machine
learning tasks including clustering, classification or outlier detection.
otsfeatures also incorporates two datasets of financial time series which were
used in the literature for clustering purposes, as well as three interesting
synthetic databases. The main properties of the package are described and its
use is illustrated through several examples. Researchers from a broad variety
of disciplines could benefit from the powerful tools provided by otsfeatures
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