NR1H3 p.Arg415Gln Is Not Associated to Multiple Sclerosis Risk

A recent study by Wang et al. (2016a) claims that the low-frequency variant NR1H3 p.Arg415Gln is sufficient to cause multiple sclerosis in certain individuals and determines a patient's likelihood of primary progressive disease. We sought to replicate this finding in the International MS Genetics Consortium (IMSGC) patient collection, which is 13-fold larger than the collection of Wang et al. (2016a), but we find no evidence that this variant is associated with either MS or disease subtype. Wang et al. (2016a) also report a common variant association in the region, which we show captures the association the IMSGC reported in 2013. Therefore, we conclude that the reported low-frequency association is a false positive, likely generated by insufficient sample size. The claim of NR1H3 mutations describing a Mendelian form of MS-of which no examples exist-can therefore not be substantiated by data. This Matters Arising paper is in response to Wang et al. (2016a), published in Neuron. See also the related Matters Arising paper by Minikel and MacArthur (2016) and the response by Wang et al. (2016b), published in this issue

Architecture and performance of the KM3NeT front-end firmware

The KM3NeT infrastructure consists of two deep-sea neutrino telescopes being deployed in the Mediterranean Sea. The telescopes will detect extraterrestrial and atmospheric neutrinos by means of the incident photons induced by the passage of relativistic charged particles through the seawater as a consequence of a neutrino interaction. The telescopes are configured in a three-dimensional grid of digital optical modules, each hosting 31 photomultipliers. The photomultiplier signals produced by the incident Cherenkov photons are converted into digital information consisting of the integrated pulse duration and the time at which it surpasses a chosen threshold. The digitization is done by means of time to digital converters (TDCs) embedded in the field programmable gate array of the central logic board. Subsequently, a state machine formats the acquired data for its transmission to shore. We present the architecture and performance of the front-end firmware consisting of the TDCs and the state machine