23 research outputs found

    FPGA Implementation of Gaussian Mixture Model Algorithm for 47 fps Segmentation of 1080p Video

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    Circuits and systems able to process high quality video in real time are fundamental in nowadays imaging systems. The circuit proposed in the paper, aimed at the robust identification of the background in video streams, implements the improved formulation of the Gaussian Mixture Model (GMM) algorithm that is included in the OpenCV library. An innovative, hardware oriented, formulation of the GMM equations, the use of truncated binary multipliers, and ROM compression techniques allow reduced hardware complexity and increased processing capability. The proposed circuit has been designed having commercial FPGA devices as target and provides speed and logic resources occupation that overcome previously proposed implementations. The circuit, when implemented on Virtex6 or StratixIV, processes more than 45 frame per second in 1080p format and uses few percent of FPGA logic resources

    Dissecting the Shared Genetic Architecture of Suicide Attempt, Psychiatric Disorders, and Known Risk Factors

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    Background Suicide is a leading cause of death worldwide, and nonfatal suicide attempts, which occur far more frequently, are a major source of disability and social and economic burden. Both have substantial genetic etiology, which is partially shared and partially distinct from that of related psychiatric disorders. Methods We conducted a genome-wide association study (GWAS) of 29,782 suicide attempt (SA) cases and 519,961 controls in the International Suicide Genetics Consortium (ISGC). The GWAS of SA was conditioned on psychiatric disorders using GWAS summary statistics via multitrait-based conditional and joint analysis, to remove genetic effects on SA mediated by psychiatric disorders. We investigated the shared and divergent genetic architectures of SA, psychiatric disorders, and other known risk factors. Results Two loci reached genome-wide significance for SA: the major histocompatibility complex and an intergenic locus on chromosome 7, the latter of which remained associated with SA after conditioning on psychiatric disorders and replicated in an independent cohort from the Million Veteran Program. This locus has been implicated in risk-taking behavior, smoking, and insomnia. SA showed strong genetic correlation with psychiatric disorders, particularly major depression, and also with smoking, pain, risk-taking behavior, sleep disturbances, lower educational attainment, reproductive traits, lower socioeconomic status, and poorer general health. After conditioning on psychiatric disorders, the genetic correlations between SA and psychiatric disorders decreased, whereas those with nonpsychiatric traits remained largely unchanged. Conclusions Our results identify a risk locus that contributes more strongly to SA than other phenotypes and suggest a shared underlying biology between SA and known risk factors that is not mediated by psychiatric disorders.Peer reviewe

    Approximate computing in the nanoscale era

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    The reduced benefits offered by technology scaling in the nanoscale era call for innovative design approaches, to process bigger and bigger amount of data with always higher performance and lower power consumption. In this respect, Approximate Computing constitutes one of the most promising trend, where efficiency is increased by breaking the dogma of error-free computations, enlarging the design space with the addition of application-specific quality metrics. Approximate Computing paradigm can be applied at different layers, spanning from software to systems and circuits. In this paper we focus on approximate arithmetic circuits for computer vision and machine learning. These kinds of applications have an excellent resiliency to computation errors. Moreover, their arithmetic-intensive processing makes the increase of efficiency of arithmetic circuits a keypoint. In this kind of context Approximate Computing can make the difference, improving, at the same time, performance and power consumption with tolerable quality degradation

    Low-power approximate MAC unit

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    Power-precision scalable latch memories

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    Electrical Measurement of Electron and Hole Mobilities as a Function of Injection Level in Silicon

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    The first experimental method to separately measure the hole and the electron mobilities as a function of the injection level is presented. The carrier mobilities are extracted from impulsive measurements of the resistance associated with a n+-ν-n + (p+-π-p+) structure, where the conductivity of the intermediate layer is controlled by the injection of an incorporated p-n junction diode. Two-dimensional numerical simulation is used to assess the accuracy of the proposed measurement technique. Experimental results obtained at room temperature on both n-type and p-type materials are presented and compared to existing analytical mobility model

    A simplified model of current-controlled switching converters in discontinuous current-mode

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    A simplified circuit oriented model is developed for the analysis of current-mode switching power converters operated in discontinuous current-mode. The model is based on an equivalent circuit representation of the power switch following the same approach already applied in literature to modeling duty-ratio programmed PWM converters. In this way, an easy derivation of both DC and small-signal characteristics of the converter is achieved. Applications of the proposed model to buck and buck-boost topologies are presented

    Mux-based Digital Delay Interpolator

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    A digital delay interpolator may include an array of multiplexers, each multiplexer configured to be input with first and second input voltages, one of the first and second input voltages being delayed in respect to the other, and receive a respective selection signal. The digital delay interpolator may include output lines respectively coupled to the array of multiplexers, and an output terminal configured to be coupled in common to the output lines. Each multiplexer may be configured to selectively output on the respective output line one of the firrst and the second input voltages based upon a logic value of the respective selection signal
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